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1/*
2 * MCP23S08 SPI/I2C GPIO gpio expander driver
3 *
4 * The inputs and outputs of the mcp23s08, mcp23s17, mcp23008 and mcp23017 are
5 * supported.
6 * For the I2C versions of the chips (mcp23008 and mcp23017) generation of
7 * interrupts is also supported.
8 * The hardware of the SPI versions of the chips (mcp23s08 and mcp23s17) is
9 * also capable of generating interrupts, but the linux driver does not
10 * support that yet.
11 */
12
13#include <linux/kernel.h>
14#include <linux/device.h>
15#include <linux/mutex.h>
16#include <linux/module.h>
17#include <linux/gpio.h>
18#include <linux/i2c.h>
19#include <linux/spi/spi.h>
20#include <linux/spi/mcp23s08.h>
21#include <linux/slab.h>
22#include <asm/byteorder.h>
23#include <linux/interrupt.h>
24#include <linux/of_irq.h>
25#include <linux/of_device.h>
26
27/**
28 * MCP types supported by driver
29 */
30#define MCP_TYPE_S08 0
31#define MCP_TYPE_S17 1
32#define MCP_TYPE_008 2
33#define MCP_TYPE_017 3
34
35/* Registers are all 8 bits wide.
36 *
37 * The mcp23s17 has twice as many bits, and can be configured to work
38 * with either 16 bit registers or with two adjacent 8 bit banks.
39 */
40#define MCP_IODIR 0x00 /* init/reset: all ones */
41#define MCP_IPOL 0x01
42#define MCP_GPINTEN 0x02
43#define MCP_DEFVAL 0x03
44#define MCP_INTCON 0x04
45#define MCP_IOCON 0x05
46# define IOCON_MIRROR (1 << 6)
47# define IOCON_SEQOP (1 << 5)
48# define IOCON_HAEN (1 << 3)
49# define IOCON_ODR (1 << 2)
50# define IOCON_INTPOL (1 << 1)
51#define MCP_GPPU 0x06
52#define MCP_INTF 0x07
53#define MCP_INTCAP 0x08
54#define MCP_GPIO 0x09
55#define MCP_OLAT 0x0a
56
57struct mcp23s08;
58
59struct mcp23s08_ops {
60 int (*read)(struct mcp23s08 *mcp, unsigned reg);
61 int (*write)(struct mcp23s08 *mcp, unsigned reg, unsigned val);
62 int (*read_regs)(struct mcp23s08 *mcp, unsigned reg,
63 u16 *vals, unsigned n);
64};
65
66struct mcp23s08 {
67 u8 addr;
68
69 u16 cache[11];
70 u16 irq_rise;
71 u16 irq_fall;
72 int irq;
73 bool irq_controller;
74 /* lock protects the cached values */
75 struct mutex lock;
76 struct mutex irq_lock;
77 struct irq_domain *irq_domain;
78
79 struct gpio_chip chip;
80
81 const struct mcp23s08_ops *ops;
82 void *data; /* ops specific data */
83};
84
85/* A given spi_device can represent up to eight mcp23sxx chips
86 * sharing the same chipselect but using different addresses
87 * (e.g. chips #0 and #3 might be populated, but not #1 or $2).
88 * Driver data holds all the per-chip data.
89 */
90struct mcp23s08_driver_data {
91 unsigned ngpio;
92 struct mcp23s08 *mcp[8];
93 struct mcp23s08 chip[];
94};
95
96/* This lock class tells lockdep that GPIO irqs are in a different
97 * category than their parents, so it won't report false recursion.
98 */
99static struct lock_class_key gpio_lock_class;
100
101/*----------------------------------------------------------------------*/
102
103#if IS_ENABLED(CONFIG_I2C)
104
105static int mcp23008_read(struct mcp23s08 *mcp, unsigned reg)
106{
107 return i2c_smbus_read_byte_data(mcp->data, reg);
108}
109
110static int mcp23008_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
111{
112 return i2c_smbus_write_byte_data(mcp->data, reg, val);
113}
114
115static int
116mcp23008_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
117{
118 while (n--) {
119 int ret = mcp23008_read(mcp, reg++);
120 if (ret < 0)
121 return ret;
122 *vals++ = ret;
123 }
124
125 return 0;
126}
127
128static int mcp23017_read(struct mcp23s08 *mcp, unsigned reg)
129{
130 return i2c_smbus_read_word_data(mcp->data, reg << 1);
131}
132
133static int mcp23017_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
134{
135 return i2c_smbus_write_word_data(mcp->data, reg << 1, val);
136}
137
138static int
139mcp23017_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
140{
141 while (n--) {
142 int ret = mcp23017_read(mcp, reg++);
143 if (ret < 0)
144 return ret;
145 *vals++ = ret;
146 }
147
148 return 0;
149}
150
151static const struct mcp23s08_ops mcp23008_ops = {
152 .read = mcp23008_read,
153 .write = mcp23008_write,
154 .read_regs = mcp23008_read_regs,
155};
156
157static const struct mcp23s08_ops mcp23017_ops = {
158 .read = mcp23017_read,
159 .write = mcp23017_write,
160 .read_regs = mcp23017_read_regs,
161};
162
163#endif /* CONFIG_I2C */
164
165/*----------------------------------------------------------------------*/
166
167#ifdef CONFIG_SPI_MASTER
168
169static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg)
170{
171 u8 tx[2], rx[1];
172 int status;
173
174 tx[0] = mcp->addr | 0x01;
175 tx[1] = reg;
176 status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
177 return (status < 0) ? status : rx[0];
178}
179
180static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
181{
182 u8 tx[3];
183
184 tx[0] = mcp->addr;
185 tx[1] = reg;
186 tx[2] = val;
187 return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
188}
189
190static int
191mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
192{
193 u8 tx[2], *tmp;
194 int status;
195
196 if ((n + reg) > sizeof(mcp->cache))
197 return -EINVAL;
198 tx[0] = mcp->addr | 0x01;
199 tx[1] = reg;
200
201 tmp = (u8 *)vals;
202 status = spi_write_then_read(mcp->data, tx, sizeof(tx), tmp, n);
203 if (status >= 0) {
204 while (n--)
205 vals[n] = tmp[n]; /* expand to 16bit */
206 }
207 return status;
208}
209
210static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg)
211{
212 u8 tx[2], rx[2];
213 int status;
214
215 tx[0] = mcp->addr | 0x01;
216 tx[1] = reg << 1;
217 status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
218 return (status < 0) ? status : (rx[0] | (rx[1] << 8));
219}
220
221static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
222{
223 u8 tx[4];
224
225 tx[0] = mcp->addr;
226 tx[1] = reg << 1;
227 tx[2] = val;
228 tx[3] = val >> 8;
229 return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
230}
231
232static int
233mcp23s17_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
234{
235 u8 tx[2];
236 int status;
237
238 if ((n + reg) > sizeof(mcp->cache))
239 return -EINVAL;
240 tx[0] = mcp->addr | 0x01;
241 tx[1] = reg << 1;
242
243 status = spi_write_then_read(mcp->data, tx, sizeof(tx),
244 (u8 *)vals, n * 2);
245 if (status >= 0) {
246 while (n--)
247 vals[n] = __le16_to_cpu((__le16)vals[n]);
248 }
249
250 return status;
251}
252
253static const struct mcp23s08_ops mcp23s08_ops = {
254 .read = mcp23s08_read,
255 .write = mcp23s08_write,
256 .read_regs = mcp23s08_read_regs,
257};
258
259static const struct mcp23s08_ops mcp23s17_ops = {
260 .read = mcp23s17_read,
261 .write = mcp23s17_write,
262 .read_regs = mcp23s17_read_regs,
263};
264
265#endif /* CONFIG_SPI_MASTER */
266
267/*----------------------------------------------------------------------*/
268
269static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
270{
271 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
272 int status;
273
274 mutex_lock(&mcp->lock);
275 mcp->cache[MCP_IODIR] |= (1 << offset);
276 status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
277 mutex_unlock(&mcp->lock);
278 return status;
279}
280
281static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
282{
283 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
284 int status;
285
286 mutex_lock(&mcp->lock);
287
288 /* REVISIT reading this clears any IRQ ... */
289 status = mcp->ops->read(mcp, MCP_GPIO);
290 if (status < 0)
291 status = 0;
292 else {
293 mcp->cache[MCP_GPIO] = status;
294 status = !!(status & (1 << offset));
295 }
296 mutex_unlock(&mcp->lock);
297 return status;
298}
299
300static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
301{
302 unsigned olat = mcp->cache[MCP_OLAT];
303
304 if (value)
305 olat |= mask;
306 else
307 olat &= ~mask;
308 mcp->cache[MCP_OLAT] = olat;
309 return mcp->ops->write(mcp, MCP_OLAT, olat);
310}
311
312static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
313{
314 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
315 unsigned mask = 1 << offset;
316
317 mutex_lock(&mcp->lock);
318 __mcp23s08_set(mcp, mask, value);
319 mutex_unlock(&mcp->lock);
320}
321
322static int
323mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
324{
325 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
326 unsigned mask = 1 << offset;
327 int status;
328
329 mutex_lock(&mcp->lock);
330 status = __mcp23s08_set(mcp, mask, value);
331 if (status == 0) {
332 mcp->cache[MCP_IODIR] &= ~mask;
333 status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
334 }
335 mutex_unlock(&mcp->lock);
336 return status;
337}
338
339/*----------------------------------------------------------------------*/
340static irqreturn_t mcp23s08_irq(int irq, void *data)
341{
342 struct mcp23s08 *mcp = data;
343 int intcap, intf, i;
344 unsigned int child_irq;
345
346 mutex_lock(&mcp->lock);
347 intf = mcp->ops->read(mcp, MCP_INTF);
348 if (intf < 0) {
349 mutex_unlock(&mcp->lock);
350 return IRQ_HANDLED;
351 }
352
353 mcp->cache[MCP_INTF] = intf;
354
355 intcap = mcp->ops->read(mcp, MCP_INTCAP);
356 if (intcap < 0) {
357 mutex_unlock(&mcp->lock);
358 return IRQ_HANDLED;
359 }
360
361 mcp->cache[MCP_INTCAP] = intcap;
362 mutex_unlock(&mcp->lock);
363
364
365 for (i = 0; i < mcp->chip.ngpio; i++) {
366 if ((BIT(i) & mcp->cache[MCP_INTF]) &&
367 ((BIT(i) & intcap & mcp->irq_rise) ||
368 (mcp->irq_fall & ~intcap & BIT(i)))) {
369 child_irq = irq_find_mapping(mcp->irq_domain, i);
370 handle_nested_irq(child_irq);
371 }
372 }
373
374 return IRQ_HANDLED;
375}
376
377static int mcp23s08_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
378{
379 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
380
381 return irq_find_mapping(mcp->irq_domain, offset);
382}
383
384static void mcp23s08_irq_mask(struct irq_data *data)
385{
386 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
387 unsigned int pos = data->hwirq;
388
389 mcp->cache[MCP_GPINTEN] &= ~BIT(pos);
390}
391
392static void mcp23s08_irq_unmask(struct irq_data *data)
393{
394 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
395 unsigned int pos = data->hwirq;
396
397 mcp->cache[MCP_GPINTEN] |= BIT(pos);
398}
399
400static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
401{
402 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
403 unsigned int pos = data->hwirq;
404 int status = 0;
405
406 if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
407 mcp->cache[MCP_INTCON] &= ~BIT(pos);
408 mcp->irq_rise |= BIT(pos);
409 mcp->irq_fall |= BIT(pos);
410 } else if (type & IRQ_TYPE_EDGE_RISING) {
411 mcp->cache[MCP_INTCON] &= ~BIT(pos);
412 mcp->irq_rise |= BIT(pos);
413 mcp->irq_fall &= ~BIT(pos);
414 } else if (type & IRQ_TYPE_EDGE_FALLING) {
415 mcp->cache[MCP_INTCON] &= ~BIT(pos);
416 mcp->irq_rise &= ~BIT(pos);
417 mcp->irq_fall |= BIT(pos);
418 } else
419 return -EINVAL;
420
421 return status;
422}
423
424static void mcp23s08_irq_bus_lock(struct irq_data *data)
425{
426 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
427
428 mutex_lock(&mcp->irq_lock);
429}
430
431static void mcp23s08_irq_bus_unlock(struct irq_data *data)
432{
433 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
434
435 mutex_lock(&mcp->lock);
436 mcp->ops->write(mcp, MCP_GPINTEN, mcp->cache[MCP_GPINTEN]);
437 mcp->ops->write(mcp, MCP_DEFVAL, mcp->cache[MCP_DEFVAL]);
438 mcp->ops->write(mcp, MCP_INTCON, mcp->cache[MCP_INTCON]);
439 mutex_unlock(&mcp->lock);
440 mutex_unlock(&mcp->irq_lock);
441}
442
443static int mcp23s08_irq_reqres(struct irq_data *data)
444{
445 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
446
447 if (gpio_lock_as_irq(&mcp->chip, data->hwirq)) {
448 dev_err(mcp->chip.dev,
449 "unable to lock HW IRQ %lu for IRQ usage\n",
450 data->hwirq);
451 return -EINVAL;
452 }
453
454 return 0;
455}
456
457static void mcp23s08_irq_relres(struct irq_data *data)
458{
459 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
460
461 gpio_unlock_as_irq(&mcp->chip, data->hwirq);
462}
463
464static struct irq_chip mcp23s08_irq_chip = {
465 .name = "gpio-mcp23xxx",
466 .irq_mask = mcp23s08_irq_mask,
467 .irq_unmask = mcp23s08_irq_unmask,
468 .irq_set_type = mcp23s08_irq_set_type,
469 .irq_bus_lock = mcp23s08_irq_bus_lock,
470 .irq_bus_sync_unlock = mcp23s08_irq_bus_unlock,
471 .irq_request_resources = mcp23s08_irq_reqres,
472 .irq_release_resources = mcp23s08_irq_relres,
473};
474
475static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
476{
477 struct gpio_chip *chip = &mcp->chip;
478 int err, irq, j;
479
480 mutex_init(&mcp->irq_lock);
481
482 mcp->irq_domain = irq_domain_add_linear(chip->of_node, chip->ngpio,
483 &irq_domain_simple_ops, mcp);
484 if (!mcp->irq_domain)
485 return -ENODEV;
486
487 err = devm_request_threaded_irq(chip->dev, mcp->irq, NULL, mcp23s08_irq,
488 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
489 dev_name(chip->dev), mcp);
490 if (err != 0) {
491 dev_err(chip->dev, "unable to request IRQ#%d: %d\n",
492 mcp->irq, err);
493 return err;
494 }
495
496 chip->to_irq = mcp23s08_gpio_to_irq;
497
498 for (j = 0; j < mcp->chip.ngpio; j++) {
499 irq = irq_create_mapping(mcp->irq_domain, j);
500 irq_set_lockdep_class(irq, &gpio_lock_class);
501 irq_set_chip_data(irq, mcp);
502 irq_set_chip(irq, &mcp23s08_irq_chip);
503 irq_set_nested_thread(irq, true);
504#ifdef CONFIG_ARM
505 set_irq_flags(irq, IRQF_VALID);
506#else
507 irq_set_noprobe(irq);
508#endif
509 }
510 return 0;
511}
512
513static void mcp23s08_irq_teardown(struct mcp23s08 *mcp)
514{
515 unsigned int irq, i;
516
517 free_irq(mcp->irq, mcp);
518
519 for (i = 0; i < mcp->chip.ngpio; i++) {
520 irq = irq_find_mapping(mcp->irq_domain, i);
521 if (irq > 0)
522 irq_dispose_mapping(irq);
523 }
524
525 irq_domain_remove(mcp->irq_domain);
526}
527
528/*----------------------------------------------------------------------*/
529
530#ifdef CONFIG_DEBUG_FS
531
532#include <linux/seq_file.h>
533
534/*
535 * This shows more info than the generic gpio dump code:
536 * pullups, deglitching, open drain drive.
537 */
538static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
539{
540 struct mcp23s08 *mcp;
541 char bank;
542 int t;
543 unsigned mask;
544
545 mcp = container_of(chip, struct mcp23s08, chip);
546
547 /* NOTE: we only handle one bank for now ... */
548 bank = '0' + ((mcp->addr >> 1) & 0x7);
549
550 mutex_lock(&mcp->lock);
551 t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
552 if (t < 0) {
553 seq_printf(s, " I/O ERROR %d\n", t);
554 goto done;
555 }
556
557 for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) {
558 const char *label;
559
560 label = gpiochip_is_requested(chip, t);
561 if (!label)
562 continue;
563
564 seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
565 chip->base + t, bank, t, label,
566 (mcp->cache[MCP_IODIR] & mask) ? "in " : "out",
567 (mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo",
568 (mcp->cache[MCP_GPPU] & mask) ? "up" : " ");
569 /* NOTE: ignoring the irq-related registers */
570 seq_puts(s, "\n");
571 }
572done:
573 mutex_unlock(&mcp->lock);
574}
575
576#else
577#define mcp23s08_dbg_show NULL
578#endif
579
580/*----------------------------------------------------------------------*/
581
582static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
583 void *data, unsigned addr, unsigned type,
584 unsigned base, unsigned pullups)
585{
586 int status;
587 bool mirror = false;
588
589 mutex_init(&mcp->lock);
590
591 mcp->data = data;
592 mcp->addr = addr;
593
594 mcp->chip.direction_input = mcp23s08_direction_input;
595 mcp->chip.get = mcp23s08_get;
596 mcp->chip.direction_output = mcp23s08_direction_output;
597 mcp->chip.set = mcp23s08_set;
598 mcp->chip.dbg_show = mcp23s08_dbg_show;
599#ifdef CONFIG_OF
600 mcp->chip.of_gpio_n_cells = 2;
601 mcp->chip.of_node = dev->of_node;
602#endif
603
604 switch (type) {
605#ifdef CONFIG_SPI_MASTER
606 case MCP_TYPE_S08:
607 mcp->ops = &mcp23s08_ops;
608 mcp->chip.ngpio = 8;
609 mcp->chip.label = "mcp23s08";
610 break;
611
612 case MCP_TYPE_S17:
613 mcp->ops = &mcp23s17_ops;
614 mcp->chip.ngpio = 16;
615 mcp->chip.label = "mcp23s17";
616 break;
617#endif /* CONFIG_SPI_MASTER */
618
619#if IS_ENABLED(CONFIG_I2C)
620 case MCP_TYPE_008:
621 mcp->ops = &mcp23008_ops;
622 mcp->chip.ngpio = 8;
623 mcp->chip.label = "mcp23008";
624 break;
625
626 case MCP_TYPE_017:
627 mcp->ops = &mcp23017_ops;
628 mcp->chip.ngpio = 16;
629 mcp->chip.label = "mcp23017";
630 break;
631#endif /* CONFIG_I2C */
632
633 default:
634 dev_err(dev, "invalid device type (%d)\n", type);
635 return -EINVAL;
636 }
637
638 mcp->chip.base = base;
639 mcp->chip.can_sleep = true;
640 mcp->chip.dev = dev;
641 mcp->chip.owner = THIS_MODULE;
642
643 /* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
644 * and MCP_IOCON.HAEN = 1, so we work with all chips.
645 */
646
647 status = mcp->ops->read(mcp, MCP_IOCON);
648 if (status < 0)
649 goto fail;
650
651 mcp->irq_controller = of_property_read_bool(mcp->chip.of_node,
652 "interrupt-controller");
653 if (mcp->irq && mcp->irq_controller && (type == MCP_TYPE_017))
654 mirror = of_property_read_bool(mcp->chip.of_node,
655 "microchip,irq-mirror");
656
657 if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror) {
658 /* mcp23s17 has IOCON twice, make sure they are in sync */
659 status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8));
660 status |= IOCON_HAEN | (IOCON_HAEN << 8);
661 status &= ~(IOCON_INTPOL | (IOCON_INTPOL << 8));
662 if (mirror)
663 status |= IOCON_MIRROR | (IOCON_MIRROR << 8);
664
665 status = mcp->ops->write(mcp, MCP_IOCON, status);
666 if (status < 0)
667 goto fail;
668 }
669
670 /* configure ~100K pullups */
671 status = mcp->ops->write(mcp, MCP_GPPU, pullups);
672 if (status < 0)
673 goto fail;
674
675 status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
676 if (status < 0)
677 goto fail;
678
679 /* disable inverter on input */
680 if (mcp->cache[MCP_IPOL] != 0) {
681 mcp->cache[MCP_IPOL] = 0;
682 status = mcp->ops->write(mcp, MCP_IPOL, 0);
683 if (status < 0)
684 goto fail;
685 }
686
687 /* disable irqs */
688 if (mcp->cache[MCP_GPINTEN] != 0) {
689 mcp->cache[MCP_GPINTEN] = 0;
690 status = mcp->ops->write(mcp, MCP_GPINTEN, 0);
691 if (status < 0)
692 goto fail;
693 }
694
695 status = gpiochip_add(&mcp->chip);
696 if (status < 0)
697 goto fail;
698
699 if (mcp->irq && mcp->irq_controller) {
700 status = mcp23s08_irq_setup(mcp);
701 if (status) {
702 mcp23s08_irq_teardown(mcp);
703 goto fail;
704 }
705 }
706fail:
707 if (status < 0)
708 dev_dbg(dev, "can't setup chip %d, --> %d\n",
709 addr, status);
710 return status;
711}
712
713/*----------------------------------------------------------------------*/
714
715#ifdef CONFIG_OF
716#ifdef CONFIG_SPI_MASTER
717static struct of_device_id mcp23s08_spi_of_match[] = {
718 {
719 .compatible = "microchip,mcp23s08",
720 .data = (void *) MCP_TYPE_S08,
721 },
722 {
723 .compatible = "microchip,mcp23s17",
724 .data = (void *) MCP_TYPE_S17,
725 },
726/* NOTE: The use of the mcp prefix is deprecated and will be removed. */
727 {
728 .compatible = "mcp,mcp23s08",
729 .data = (void *) MCP_TYPE_S08,
730 },
731 {
732 .compatible = "mcp,mcp23s17",
733 .data = (void *) MCP_TYPE_S17,
734 },
735 { },
736};
737MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match);
738#endif
739
740#if IS_ENABLED(CONFIG_I2C)
741static struct of_device_id mcp23s08_i2c_of_match[] = {
742 {
743 .compatible = "microchip,mcp23008",
744 .data = (void *) MCP_TYPE_008,
745 },
746 {
747 .compatible = "microchip,mcp23017",
748 .data = (void *) MCP_TYPE_017,
749 },
750/* NOTE: The use of the mcp prefix is deprecated and will be removed. */
751 {
752 .compatible = "mcp,mcp23008",
753 .data = (void *) MCP_TYPE_008,
754 },
755 {
756 .compatible = "mcp,mcp23017",
757 .data = (void *) MCP_TYPE_017,
758 },
759 { },
760};
761MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match);
762#endif
763#endif /* CONFIG_OF */
764
765
766#if IS_ENABLED(CONFIG_I2C)
767
768static int mcp230xx_probe(struct i2c_client *client,
769 const struct i2c_device_id *id)
770{
771 struct mcp23s08_platform_data *pdata;
772 struct mcp23s08 *mcp;
773 int status, base, pullups;
774 const struct of_device_id *match;
775
776 match = of_match_device(of_match_ptr(mcp23s08_i2c_of_match),
777 &client->dev);
778 pdata = dev_get_platdata(&client->dev);
779 if (match || !pdata) {
780 base = -1;
781 pullups = 0;
782 client->irq = irq_of_parse_and_map(client->dev.of_node, 0);
783 } else {
784 if (!gpio_is_valid(pdata->base)) {
785 dev_dbg(&client->dev, "invalid platform data\n");
786 return -EINVAL;
787 }
788 base = pdata->base;
789 pullups = pdata->chip[0].pullups;
790 }
791
792 mcp = kzalloc(sizeof(*mcp), GFP_KERNEL);
793 if (!mcp)
794 return -ENOMEM;
795
796 mcp->irq = client->irq;
797 status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr,
798 id->driver_data, base, pullups);
799 if (status)
800 goto fail;
801
802 i2c_set_clientdata(client, mcp);
803
804 return 0;
805
806fail:
807 kfree(mcp);
808
809 return status;
810}
811
812static int mcp230xx_remove(struct i2c_client *client)
813{
814 struct mcp23s08 *mcp = i2c_get_clientdata(client);
815 int status;
816
817 if (client->irq && mcp->irq_controller)
818 mcp23s08_irq_teardown(mcp);
819
820 status = gpiochip_remove(&mcp->chip);
821 if (status == 0)
822 kfree(mcp);
823
824 return status;
825}
826
827static const struct i2c_device_id mcp230xx_id[] = {
828 { "mcp23008", MCP_TYPE_008 },
829 { "mcp23017", MCP_TYPE_017 },
830 { },
831};
832MODULE_DEVICE_TABLE(i2c, mcp230xx_id);
833
834static struct i2c_driver mcp230xx_driver = {
835 .driver = {
836 .name = "mcp230xx",
837 .owner = THIS_MODULE,
838 .of_match_table = of_match_ptr(mcp23s08_i2c_of_match),
839 },
840 .probe = mcp230xx_probe,
841 .remove = mcp230xx_remove,
842 .id_table = mcp230xx_id,
843};
844
845static int __init mcp23s08_i2c_init(void)
846{
847 return i2c_add_driver(&mcp230xx_driver);
848}
849
850static void mcp23s08_i2c_exit(void)
851{
852 i2c_del_driver(&mcp230xx_driver);
853}
854
855#else
856
857static int __init mcp23s08_i2c_init(void) { return 0; }
858static void mcp23s08_i2c_exit(void) { }
859
860#endif /* CONFIG_I2C */
861
862/*----------------------------------------------------------------------*/
863
864#ifdef CONFIG_SPI_MASTER
865
866static int mcp23s08_probe(struct spi_device *spi)
867{
868 struct mcp23s08_platform_data *pdata;
869 unsigned addr;
870 unsigned chips = 0;
871 struct mcp23s08_driver_data *data;
872 int status, type;
873 unsigned base = -1,
874 ngpio = 0,
875 pullups[ARRAY_SIZE(pdata->chip)];
876 const struct of_device_id *match;
877 u32 spi_present_mask = 0;
878
879 match = of_match_device(of_match_ptr(mcp23s08_spi_of_match), &spi->dev);
880 if (match) {
881 type = (int)(uintptr_t)match->data;
882 status = of_property_read_u32(spi->dev.of_node,
883 "microchip,spi-present-mask", &spi_present_mask);
884 if (status) {
885 status = of_property_read_u32(spi->dev.of_node,
886 "mcp,spi-present-mask", &spi_present_mask);
887 if (status) {
888 dev_err(&spi->dev,
889 "DT has no spi-present-mask\n");
890 return -ENODEV;
891 }
892 }
893 if ((spi_present_mask <= 0) || (spi_present_mask >= 256)) {
894 dev_err(&spi->dev, "invalid spi-present-mask\n");
895 return -ENODEV;
896 }
897 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
898 if ((spi_present_mask & (1 << addr)))
899 chips++;
900 pullups[addr] = 0;
901 }
902 } else {
903 type = spi_get_device_id(spi)->driver_data;
904 pdata = dev_get_platdata(&spi->dev);
905 if (!pdata || !gpio_is_valid(pdata->base)) {
906 dev_dbg(&spi->dev,
907 "invalid or missing platform data\n");
908 return -EINVAL;
909 }
910
911 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
912 if (!pdata->chip[addr].is_present)
913 continue;
914 chips++;
915 if ((type == MCP_TYPE_S08) && (addr > 3)) {
916 dev_err(&spi->dev,
917 "mcp23s08 only supports address 0..3\n");
918 return -EINVAL;
919 }
920 spi_present_mask |= 1 << addr;
921 pullups[addr] = pdata->chip[addr].pullups;
922 }
923
924 base = pdata->base;
925 }
926
927 if (!chips)
928 return -ENODEV;
929
930 data = kzalloc(sizeof(*data) + chips * sizeof(struct mcp23s08),
931 GFP_KERNEL);
932 if (!data)
933 return -ENOMEM;
934 spi_set_drvdata(spi, data);
935
936 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
937 if (!(spi_present_mask & (1 << addr)))
938 continue;
939 chips--;
940 data->mcp[addr] = &data->chip[chips];
941 status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi,
942 0x40 | (addr << 1), type, base,
943 pullups[addr]);
944 if (status < 0)
945 goto fail;
946
947 if (base != -1)
948 base += (type == MCP_TYPE_S17) ? 16 : 8;
949 ngpio += (type == MCP_TYPE_S17) ? 16 : 8;
950 }
951 data->ngpio = ngpio;
952
953 /* NOTE: these chips have a relatively sane IRQ framework, with
954 * per-signal masking and level/edge triggering. It's not yet
955 * handled here...
956 */
957
958 return 0;
959
960fail:
961 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
962 int tmp;
963
964 if (!data->mcp[addr])
965 continue;
966 tmp = gpiochip_remove(&data->mcp[addr]->chip);
967 if (tmp < 0)
968 dev_err(&spi->dev, "%s --> %d\n", "remove", tmp);
969 }
970 kfree(data);
971 return status;
972}
973
974static int mcp23s08_remove(struct spi_device *spi)
975{
976 struct mcp23s08_driver_data *data = spi_get_drvdata(spi);
977 unsigned addr;
978 int status = 0;
979
980 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
981 int tmp;
982
983 if (!data->mcp[addr])
984 continue;
985
986 tmp = gpiochip_remove(&data->mcp[addr]->chip);
987 if (tmp < 0) {
988 dev_err(&spi->dev, "%s --> %d\n", "remove", tmp);
989 status = tmp;
990 }
991 }
992 if (status == 0)
993 kfree(data);
994 return status;
995}
996
997static const struct spi_device_id mcp23s08_ids[] = {
998 { "mcp23s08", MCP_TYPE_S08 },
999 { "mcp23s17", MCP_TYPE_S17 },
1000 { },
1001};
1002MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
1003
1004static struct spi_driver mcp23s08_driver = {
1005 .probe = mcp23s08_probe,
1006 .remove = mcp23s08_remove,
1007 .id_table = mcp23s08_ids,
1008 .driver = {
1009 .name = "mcp23s08",
1010 .owner = THIS_MODULE,
1011 .of_match_table = of_match_ptr(mcp23s08_spi_of_match),
1012 },
1013};
1014
1015static int __init mcp23s08_spi_init(void)
1016{
1017 return spi_register_driver(&mcp23s08_driver);
1018}
1019
1020static void mcp23s08_spi_exit(void)
1021{
1022 spi_unregister_driver(&mcp23s08_driver);
1023}
1024
1025#else
1026
1027static int __init mcp23s08_spi_init(void) { return 0; }
1028static void mcp23s08_spi_exit(void) { }
1029
1030#endif /* CONFIG_SPI_MASTER */
1031
1032/*----------------------------------------------------------------------*/
1033
1034static int __init mcp23s08_init(void)
1035{
1036 int ret;
1037
1038 ret = mcp23s08_spi_init();
1039 if (ret)
1040 goto spi_fail;
1041
1042 ret = mcp23s08_i2c_init();
1043 if (ret)
1044 goto i2c_fail;
1045
1046 return 0;
1047
1048 i2c_fail:
1049 mcp23s08_spi_exit();
1050 spi_fail:
1051 return ret;
1052}
1053/* register after spi/i2c postcore initcall and before
1054 * subsys initcalls that may rely on these GPIOs
1055 */
1056subsys_initcall(mcp23s08_init);
1057
1058static void __exit mcp23s08_exit(void)
1059{
1060 mcp23s08_spi_exit();
1061 mcp23s08_i2c_exit();
1062}
1063module_exit(mcp23s08_exit);
1064
1065MODULE_LICENSE("GPL");
1/*
2 * MCP23S08 SPI/I2C GPIO gpio expander driver
3 *
4 * The inputs and outputs of the mcp23s08, mcp23s17, mcp23008 and mcp23017 are
5 * supported.
6 * For the I2C versions of the chips (mcp23008 and mcp23017) generation of
7 * interrupts is also supported.
8 * The hardware of the SPI versions of the chips (mcp23s08 and mcp23s17) is
9 * also capable of generating interrupts, but the linux driver does not
10 * support that yet.
11 */
12
13#include <linux/kernel.h>
14#include <linux/device.h>
15#include <linux/mutex.h>
16#include <linux/module.h>
17#include <linux/gpio.h>
18#include <linux/i2c.h>
19#include <linux/spi/spi.h>
20#include <linux/spi/mcp23s08.h>
21#include <linux/slab.h>
22#include <asm/byteorder.h>
23#include <linux/interrupt.h>
24#include <linux/of_irq.h>
25#include <linux/of_device.h>
26
27/**
28 * MCP types supported by driver
29 */
30#define MCP_TYPE_S08 0
31#define MCP_TYPE_S17 1
32#define MCP_TYPE_008 2
33#define MCP_TYPE_017 3
34#define MCP_TYPE_S18 4
35
36/* Registers are all 8 bits wide.
37 *
38 * The mcp23s17 has twice as many bits, and can be configured to work
39 * with either 16 bit registers or with two adjacent 8 bit banks.
40 */
41#define MCP_IODIR 0x00 /* init/reset: all ones */
42#define MCP_IPOL 0x01
43#define MCP_GPINTEN 0x02
44#define MCP_DEFVAL 0x03
45#define MCP_INTCON 0x04
46#define MCP_IOCON 0x05
47# define IOCON_MIRROR (1 << 6)
48# define IOCON_SEQOP (1 << 5)
49# define IOCON_HAEN (1 << 3)
50# define IOCON_ODR (1 << 2)
51# define IOCON_INTPOL (1 << 1)
52# define IOCON_INTCC (1)
53#define MCP_GPPU 0x06
54#define MCP_INTF 0x07
55#define MCP_INTCAP 0x08
56#define MCP_GPIO 0x09
57#define MCP_OLAT 0x0a
58
59struct mcp23s08;
60
61struct mcp23s08_ops {
62 int (*read)(struct mcp23s08 *mcp, unsigned reg);
63 int (*write)(struct mcp23s08 *mcp, unsigned reg, unsigned val);
64 int (*read_regs)(struct mcp23s08 *mcp, unsigned reg,
65 u16 *vals, unsigned n);
66};
67
68struct mcp23s08 {
69 u8 addr;
70 bool irq_active_high;
71
72 u16 cache[11];
73 u16 irq_rise;
74 u16 irq_fall;
75 int irq;
76 bool irq_controller;
77 /* lock protects the cached values */
78 struct mutex lock;
79 struct mutex irq_lock;
80
81 struct gpio_chip chip;
82
83 const struct mcp23s08_ops *ops;
84 void *data; /* ops specific data */
85};
86
87/* A given spi_device can represent up to eight mcp23sxx chips
88 * sharing the same chipselect but using different addresses
89 * (e.g. chips #0 and #3 might be populated, but not #1 or $2).
90 * Driver data holds all the per-chip data.
91 */
92struct mcp23s08_driver_data {
93 unsigned ngpio;
94 struct mcp23s08 *mcp[8];
95 struct mcp23s08 chip[];
96};
97
98/*----------------------------------------------------------------------*/
99
100#if IS_ENABLED(CONFIG_I2C)
101
102static int mcp23008_read(struct mcp23s08 *mcp, unsigned reg)
103{
104 return i2c_smbus_read_byte_data(mcp->data, reg);
105}
106
107static int mcp23008_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
108{
109 return i2c_smbus_write_byte_data(mcp->data, reg, val);
110}
111
112static int
113mcp23008_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
114{
115 while (n--) {
116 int ret = mcp23008_read(mcp, reg++);
117 if (ret < 0)
118 return ret;
119 *vals++ = ret;
120 }
121
122 return 0;
123}
124
125static int mcp23017_read(struct mcp23s08 *mcp, unsigned reg)
126{
127 return i2c_smbus_read_word_data(mcp->data, reg << 1);
128}
129
130static int mcp23017_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
131{
132 return i2c_smbus_write_word_data(mcp->data, reg << 1, val);
133}
134
135static int
136mcp23017_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
137{
138 while (n--) {
139 int ret = mcp23017_read(mcp, reg++);
140 if (ret < 0)
141 return ret;
142 *vals++ = ret;
143 }
144
145 return 0;
146}
147
148static const struct mcp23s08_ops mcp23008_ops = {
149 .read = mcp23008_read,
150 .write = mcp23008_write,
151 .read_regs = mcp23008_read_regs,
152};
153
154static const struct mcp23s08_ops mcp23017_ops = {
155 .read = mcp23017_read,
156 .write = mcp23017_write,
157 .read_regs = mcp23017_read_regs,
158};
159
160#endif /* CONFIG_I2C */
161
162/*----------------------------------------------------------------------*/
163
164#ifdef CONFIG_SPI_MASTER
165
166static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg)
167{
168 u8 tx[2], rx[1];
169 int status;
170
171 tx[0] = mcp->addr | 0x01;
172 tx[1] = reg;
173 status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
174 return (status < 0) ? status : rx[0];
175}
176
177static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
178{
179 u8 tx[3];
180
181 tx[0] = mcp->addr;
182 tx[1] = reg;
183 tx[2] = val;
184 return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
185}
186
187static int
188mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
189{
190 u8 tx[2], *tmp;
191 int status;
192
193 if ((n + reg) > sizeof(mcp->cache))
194 return -EINVAL;
195 tx[0] = mcp->addr | 0x01;
196 tx[1] = reg;
197
198 tmp = (u8 *)vals;
199 status = spi_write_then_read(mcp->data, tx, sizeof(tx), tmp, n);
200 if (status >= 0) {
201 while (n--)
202 vals[n] = tmp[n]; /* expand to 16bit */
203 }
204 return status;
205}
206
207static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg)
208{
209 u8 tx[2], rx[2];
210 int status;
211
212 tx[0] = mcp->addr | 0x01;
213 tx[1] = reg << 1;
214 status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
215 return (status < 0) ? status : (rx[0] | (rx[1] << 8));
216}
217
218static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
219{
220 u8 tx[4];
221
222 tx[0] = mcp->addr;
223 tx[1] = reg << 1;
224 tx[2] = val;
225 tx[3] = val >> 8;
226 return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
227}
228
229static int
230mcp23s17_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
231{
232 u8 tx[2];
233 int status;
234
235 if ((n + reg) > sizeof(mcp->cache))
236 return -EINVAL;
237 tx[0] = mcp->addr | 0x01;
238 tx[1] = reg << 1;
239
240 status = spi_write_then_read(mcp->data, tx, sizeof(tx),
241 (u8 *)vals, n * 2);
242 if (status >= 0) {
243 while (n--)
244 vals[n] = __le16_to_cpu((__le16)vals[n]);
245 }
246
247 return status;
248}
249
250static const struct mcp23s08_ops mcp23s08_ops = {
251 .read = mcp23s08_read,
252 .write = mcp23s08_write,
253 .read_regs = mcp23s08_read_regs,
254};
255
256static const struct mcp23s08_ops mcp23s17_ops = {
257 .read = mcp23s17_read,
258 .write = mcp23s17_write,
259 .read_regs = mcp23s17_read_regs,
260};
261
262#endif /* CONFIG_SPI_MASTER */
263
264/*----------------------------------------------------------------------*/
265
266static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
267{
268 struct mcp23s08 *mcp = gpiochip_get_data(chip);
269 int status;
270
271 mutex_lock(&mcp->lock);
272 mcp->cache[MCP_IODIR] |= (1 << offset);
273 status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
274 mutex_unlock(&mcp->lock);
275 return status;
276}
277
278static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
279{
280 struct mcp23s08 *mcp = gpiochip_get_data(chip);
281 int status;
282
283 mutex_lock(&mcp->lock);
284
285 /* REVISIT reading this clears any IRQ ... */
286 status = mcp->ops->read(mcp, MCP_GPIO);
287 if (status < 0)
288 status = 0;
289 else {
290 mcp->cache[MCP_GPIO] = status;
291 status = !!(status & (1 << offset));
292 }
293 mutex_unlock(&mcp->lock);
294 return status;
295}
296
297static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
298{
299 unsigned olat = mcp->cache[MCP_OLAT];
300
301 if (value)
302 olat |= mask;
303 else
304 olat &= ~mask;
305 mcp->cache[MCP_OLAT] = olat;
306 return mcp->ops->write(mcp, MCP_OLAT, olat);
307}
308
309static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
310{
311 struct mcp23s08 *mcp = gpiochip_get_data(chip);
312 unsigned mask = 1 << offset;
313
314 mutex_lock(&mcp->lock);
315 __mcp23s08_set(mcp, mask, value);
316 mutex_unlock(&mcp->lock);
317}
318
319static int
320mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
321{
322 struct mcp23s08 *mcp = gpiochip_get_data(chip);
323 unsigned mask = 1 << offset;
324 int status;
325
326 mutex_lock(&mcp->lock);
327 status = __mcp23s08_set(mcp, mask, value);
328 if (status == 0) {
329 mcp->cache[MCP_IODIR] &= ~mask;
330 status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
331 }
332 mutex_unlock(&mcp->lock);
333 return status;
334}
335
336/*----------------------------------------------------------------------*/
337static irqreturn_t mcp23s08_irq(int irq, void *data)
338{
339 struct mcp23s08 *mcp = data;
340 int intcap, intf, i;
341 unsigned int child_irq;
342
343 mutex_lock(&mcp->lock);
344 intf = mcp->ops->read(mcp, MCP_INTF);
345 if (intf < 0) {
346 mutex_unlock(&mcp->lock);
347 return IRQ_HANDLED;
348 }
349
350 mcp->cache[MCP_INTF] = intf;
351
352 intcap = mcp->ops->read(mcp, MCP_INTCAP);
353 if (intcap < 0) {
354 mutex_unlock(&mcp->lock);
355 return IRQ_HANDLED;
356 }
357
358 mcp->cache[MCP_INTCAP] = intcap;
359 mutex_unlock(&mcp->lock);
360
361
362 for (i = 0; i < mcp->chip.ngpio; i++) {
363 if ((BIT(i) & mcp->cache[MCP_INTF]) &&
364 ((BIT(i) & intcap & mcp->irq_rise) ||
365 (mcp->irq_fall & ~intcap & BIT(i)) ||
366 (BIT(i) & mcp->cache[MCP_INTCON]))) {
367 child_irq = irq_find_mapping(mcp->chip.irqdomain, i);
368 handle_nested_irq(child_irq);
369 }
370 }
371
372 return IRQ_HANDLED;
373}
374
375static void mcp23s08_irq_mask(struct irq_data *data)
376{
377 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
378 struct mcp23s08 *mcp = gpiochip_get_data(gc);
379 unsigned int pos = data->hwirq;
380
381 mcp->cache[MCP_GPINTEN] &= ~BIT(pos);
382}
383
384static void mcp23s08_irq_unmask(struct irq_data *data)
385{
386 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
387 struct mcp23s08 *mcp = gpiochip_get_data(gc);
388 unsigned int pos = data->hwirq;
389
390 mcp->cache[MCP_GPINTEN] |= BIT(pos);
391}
392
393static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
394{
395 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
396 struct mcp23s08 *mcp = gpiochip_get_data(gc);
397 unsigned int pos = data->hwirq;
398 int status = 0;
399
400 if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
401 mcp->cache[MCP_INTCON] &= ~BIT(pos);
402 mcp->irq_rise |= BIT(pos);
403 mcp->irq_fall |= BIT(pos);
404 } else if (type & IRQ_TYPE_EDGE_RISING) {
405 mcp->cache[MCP_INTCON] &= ~BIT(pos);
406 mcp->irq_rise |= BIT(pos);
407 mcp->irq_fall &= ~BIT(pos);
408 } else if (type & IRQ_TYPE_EDGE_FALLING) {
409 mcp->cache[MCP_INTCON] &= ~BIT(pos);
410 mcp->irq_rise &= ~BIT(pos);
411 mcp->irq_fall |= BIT(pos);
412 } else if (type & IRQ_TYPE_LEVEL_HIGH) {
413 mcp->cache[MCP_INTCON] |= BIT(pos);
414 mcp->cache[MCP_DEFVAL] &= ~BIT(pos);
415 } else if (type & IRQ_TYPE_LEVEL_LOW) {
416 mcp->cache[MCP_INTCON] |= BIT(pos);
417 mcp->cache[MCP_DEFVAL] |= BIT(pos);
418 } else
419 return -EINVAL;
420
421 return status;
422}
423
424static void mcp23s08_irq_bus_lock(struct irq_data *data)
425{
426 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
427 struct mcp23s08 *mcp = gpiochip_get_data(gc);
428
429 mutex_lock(&mcp->irq_lock);
430}
431
432static void mcp23s08_irq_bus_unlock(struct irq_data *data)
433{
434 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
435 struct mcp23s08 *mcp = gpiochip_get_data(gc);
436
437 mutex_lock(&mcp->lock);
438 mcp->ops->write(mcp, MCP_GPINTEN, mcp->cache[MCP_GPINTEN]);
439 mcp->ops->write(mcp, MCP_DEFVAL, mcp->cache[MCP_DEFVAL]);
440 mcp->ops->write(mcp, MCP_INTCON, mcp->cache[MCP_INTCON]);
441 mutex_unlock(&mcp->lock);
442 mutex_unlock(&mcp->irq_lock);
443}
444
445static struct irq_chip mcp23s08_irq_chip = {
446 .name = "gpio-mcp23xxx",
447 .irq_mask = mcp23s08_irq_mask,
448 .irq_unmask = mcp23s08_irq_unmask,
449 .irq_set_type = mcp23s08_irq_set_type,
450 .irq_bus_lock = mcp23s08_irq_bus_lock,
451 .irq_bus_sync_unlock = mcp23s08_irq_bus_unlock,
452};
453
454static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
455{
456 struct gpio_chip *chip = &mcp->chip;
457 int err;
458 unsigned long irqflags = IRQF_ONESHOT | IRQF_SHARED;
459
460 mutex_init(&mcp->irq_lock);
461
462 if (mcp->irq_active_high)
463 irqflags |= IRQF_TRIGGER_HIGH;
464 else
465 irqflags |= IRQF_TRIGGER_LOW;
466
467 err = devm_request_threaded_irq(chip->parent, mcp->irq, NULL,
468 mcp23s08_irq,
469 irqflags, dev_name(chip->parent), mcp);
470 if (err != 0) {
471 dev_err(chip->parent, "unable to request IRQ#%d: %d\n",
472 mcp->irq, err);
473 return err;
474 }
475
476 err = gpiochip_irqchip_add_nested(chip,
477 &mcp23s08_irq_chip,
478 0,
479 handle_simple_irq,
480 IRQ_TYPE_NONE);
481 if (err) {
482 dev_err(chip->parent,
483 "could not connect irqchip to gpiochip: %d\n", err);
484 return err;
485 }
486
487 gpiochip_set_nested_irqchip(chip,
488 &mcp23s08_irq_chip,
489 mcp->irq);
490
491 return 0;
492}
493
494/*----------------------------------------------------------------------*/
495
496#ifdef CONFIG_DEBUG_FS
497
498#include <linux/seq_file.h>
499
500/*
501 * This shows more info than the generic gpio dump code:
502 * pullups, deglitching, open drain drive.
503 */
504static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
505{
506 struct mcp23s08 *mcp;
507 char bank;
508 int t;
509 unsigned mask;
510
511 mcp = gpiochip_get_data(chip);
512
513 /* NOTE: we only handle one bank for now ... */
514 bank = '0' + ((mcp->addr >> 1) & 0x7);
515
516 mutex_lock(&mcp->lock);
517 t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
518 if (t < 0) {
519 seq_printf(s, " I/O ERROR %d\n", t);
520 goto done;
521 }
522
523 for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) {
524 const char *label;
525
526 label = gpiochip_is_requested(chip, t);
527 if (!label)
528 continue;
529
530 seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
531 chip->base + t, bank, t, label,
532 (mcp->cache[MCP_IODIR] & mask) ? "in " : "out",
533 (mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo",
534 (mcp->cache[MCP_GPPU] & mask) ? "up" : " ");
535 /* NOTE: ignoring the irq-related registers */
536 seq_puts(s, "\n");
537 }
538done:
539 mutex_unlock(&mcp->lock);
540}
541
542#else
543#define mcp23s08_dbg_show NULL
544#endif
545
546/*----------------------------------------------------------------------*/
547
548static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
549 void *data, unsigned addr, unsigned type,
550 struct mcp23s08_platform_data *pdata, int cs)
551{
552 int status;
553 bool mirror = false;
554
555 mutex_init(&mcp->lock);
556
557 mcp->data = data;
558 mcp->addr = addr;
559 mcp->irq_active_high = false;
560
561 mcp->chip.direction_input = mcp23s08_direction_input;
562 mcp->chip.get = mcp23s08_get;
563 mcp->chip.direction_output = mcp23s08_direction_output;
564 mcp->chip.set = mcp23s08_set;
565 mcp->chip.dbg_show = mcp23s08_dbg_show;
566#ifdef CONFIG_OF_GPIO
567 mcp->chip.of_gpio_n_cells = 2;
568 mcp->chip.of_node = dev->of_node;
569#endif
570
571 switch (type) {
572#ifdef CONFIG_SPI_MASTER
573 case MCP_TYPE_S08:
574 mcp->ops = &mcp23s08_ops;
575 mcp->chip.ngpio = 8;
576 mcp->chip.label = "mcp23s08";
577 break;
578
579 case MCP_TYPE_S17:
580 mcp->ops = &mcp23s17_ops;
581 mcp->chip.ngpio = 16;
582 mcp->chip.label = "mcp23s17";
583 break;
584
585 case MCP_TYPE_S18:
586 mcp->ops = &mcp23s17_ops;
587 mcp->chip.ngpio = 16;
588 mcp->chip.label = "mcp23s18";
589 break;
590#endif /* CONFIG_SPI_MASTER */
591
592#if IS_ENABLED(CONFIG_I2C)
593 case MCP_TYPE_008:
594 mcp->ops = &mcp23008_ops;
595 mcp->chip.ngpio = 8;
596 mcp->chip.label = "mcp23008";
597 break;
598
599 case MCP_TYPE_017:
600 mcp->ops = &mcp23017_ops;
601 mcp->chip.ngpio = 16;
602 mcp->chip.label = "mcp23017";
603 break;
604#endif /* CONFIG_I2C */
605
606 default:
607 dev_err(dev, "invalid device type (%d)\n", type);
608 return -EINVAL;
609 }
610
611 mcp->chip.base = pdata->base;
612 mcp->chip.can_sleep = true;
613 mcp->chip.parent = dev;
614 mcp->chip.owner = THIS_MODULE;
615
616 /* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
617 * and MCP_IOCON.HAEN = 1, so we work with all chips.
618 */
619
620 status = mcp->ops->read(mcp, MCP_IOCON);
621 if (status < 0)
622 goto fail;
623
624 mcp->irq_controller = pdata->irq_controller;
625 if (mcp->irq && mcp->irq_controller) {
626 mcp->irq_active_high =
627 of_property_read_bool(mcp->chip.parent->of_node,
628 "microchip,irq-active-high");
629
630 mirror = pdata->mirror;
631 }
632
633 if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror ||
634 mcp->irq_active_high) {
635 /* mcp23s17 has IOCON twice, make sure they are in sync */
636 status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8));
637 status |= IOCON_HAEN | (IOCON_HAEN << 8);
638 if (mcp->irq_active_high)
639 status |= IOCON_INTPOL | (IOCON_INTPOL << 8);
640 else
641 status &= ~(IOCON_INTPOL | (IOCON_INTPOL << 8));
642
643 if (mirror)
644 status |= IOCON_MIRROR | (IOCON_MIRROR << 8);
645
646 if (type == MCP_TYPE_S18)
647 status |= IOCON_INTCC | (IOCON_INTCC << 8);
648
649 status = mcp->ops->write(mcp, MCP_IOCON, status);
650 if (status < 0)
651 goto fail;
652 }
653
654 /* configure ~100K pullups */
655 status = mcp->ops->write(mcp, MCP_GPPU, pdata->chip[cs].pullups);
656 if (status < 0)
657 goto fail;
658
659 status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
660 if (status < 0)
661 goto fail;
662
663 /* disable inverter on input */
664 if (mcp->cache[MCP_IPOL] != 0) {
665 mcp->cache[MCP_IPOL] = 0;
666 status = mcp->ops->write(mcp, MCP_IPOL, 0);
667 if (status < 0)
668 goto fail;
669 }
670
671 /* disable irqs */
672 if (mcp->cache[MCP_GPINTEN] != 0) {
673 mcp->cache[MCP_GPINTEN] = 0;
674 status = mcp->ops->write(mcp, MCP_GPINTEN, 0);
675 if (status < 0)
676 goto fail;
677 }
678
679 status = gpiochip_add_data(&mcp->chip, mcp);
680 if (status < 0)
681 goto fail;
682
683 if (mcp->irq && mcp->irq_controller) {
684 status = mcp23s08_irq_setup(mcp);
685 if (status) {
686 goto fail;
687 }
688 }
689fail:
690 if (status < 0)
691 dev_dbg(dev, "can't setup chip %d, --> %d\n",
692 addr, status);
693 return status;
694}
695
696/*----------------------------------------------------------------------*/
697
698#ifdef CONFIG_OF
699#ifdef CONFIG_SPI_MASTER
700static const struct of_device_id mcp23s08_spi_of_match[] = {
701 {
702 .compatible = "microchip,mcp23s08",
703 .data = (void *) MCP_TYPE_S08,
704 },
705 {
706 .compatible = "microchip,mcp23s17",
707 .data = (void *) MCP_TYPE_S17,
708 },
709 {
710 .compatible = "microchip,mcp23s18",
711 .data = (void *) MCP_TYPE_S18,
712 },
713/* NOTE: The use of the mcp prefix is deprecated and will be removed. */
714 {
715 .compatible = "mcp,mcp23s08",
716 .data = (void *) MCP_TYPE_S08,
717 },
718 {
719 .compatible = "mcp,mcp23s17",
720 .data = (void *) MCP_TYPE_S17,
721 },
722 { },
723};
724MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match);
725#endif
726
727#if IS_ENABLED(CONFIG_I2C)
728static const struct of_device_id mcp23s08_i2c_of_match[] = {
729 {
730 .compatible = "microchip,mcp23008",
731 .data = (void *) MCP_TYPE_008,
732 },
733 {
734 .compatible = "microchip,mcp23017",
735 .data = (void *) MCP_TYPE_017,
736 },
737/* NOTE: The use of the mcp prefix is deprecated and will be removed. */
738 {
739 .compatible = "mcp,mcp23008",
740 .data = (void *) MCP_TYPE_008,
741 },
742 {
743 .compatible = "mcp,mcp23017",
744 .data = (void *) MCP_TYPE_017,
745 },
746 { },
747};
748MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match);
749#endif
750#endif /* CONFIG_OF */
751
752
753#if IS_ENABLED(CONFIG_I2C)
754
755static int mcp230xx_probe(struct i2c_client *client,
756 const struct i2c_device_id *id)
757{
758 struct mcp23s08_platform_data *pdata, local_pdata;
759 struct mcp23s08 *mcp;
760 int status;
761 const struct of_device_id *match;
762
763 match = of_match_device(of_match_ptr(mcp23s08_i2c_of_match),
764 &client->dev);
765 if (match) {
766 pdata = &local_pdata;
767 pdata->base = -1;
768 pdata->chip[0].pullups = 0;
769 pdata->irq_controller = of_property_read_bool(
770 client->dev.of_node,
771 "interrupt-controller");
772 pdata->mirror = of_property_read_bool(client->dev.of_node,
773 "microchip,irq-mirror");
774 client->irq = irq_of_parse_and_map(client->dev.of_node, 0);
775 } else {
776 pdata = dev_get_platdata(&client->dev);
777 if (!pdata) {
778 pdata = devm_kzalloc(&client->dev,
779 sizeof(struct mcp23s08_platform_data),
780 GFP_KERNEL);
781 if (!pdata)
782 return -ENOMEM;
783 pdata->base = -1;
784 }
785 }
786
787 mcp = kzalloc(sizeof(*mcp), GFP_KERNEL);
788 if (!mcp)
789 return -ENOMEM;
790
791 mcp->irq = client->irq;
792 status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr,
793 id->driver_data, pdata, 0);
794 if (status)
795 goto fail;
796
797 i2c_set_clientdata(client, mcp);
798
799 return 0;
800
801fail:
802 kfree(mcp);
803
804 return status;
805}
806
807static int mcp230xx_remove(struct i2c_client *client)
808{
809 struct mcp23s08 *mcp = i2c_get_clientdata(client);
810
811 gpiochip_remove(&mcp->chip);
812 kfree(mcp);
813
814 return 0;
815}
816
817static const struct i2c_device_id mcp230xx_id[] = {
818 { "mcp23008", MCP_TYPE_008 },
819 { "mcp23017", MCP_TYPE_017 },
820 { },
821};
822MODULE_DEVICE_TABLE(i2c, mcp230xx_id);
823
824static struct i2c_driver mcp230xx_driver = {
825 .driver = {
826 .name = "mcp230xx",
827 .of_match_table = of_match_ptr(mcp23s08_i2c_of_match),
828 },
829 .probe = mcp230xx_probe,
830 .remove = mcp230xx_remove,
831 .id_table = mcp230xx_id,
832};
833
834static int __init mcp23s08_i2c_init(void)
835{
836 return i2c_add_driver(&mcp230xx_driver);
837}
838
839static void mcp23s08_i2c_exit(void)
840{
841 i2c_del_driver(&mcp230xx_driver);
842}
843
844#else
845
846static int __init mcp23s08_i2c_init(void) { return 0; }
847static void mcp23s08_i2c_exit(void) { }
848
849#endif /* CONFIG_I2C */
850
851/*----------------------------------------------------------------------*/
852
853#ifdef CONFIG_SPI_MASTER
854
855static int mcp23s08_probe(struct spi_device *spi)
856{
857 struct mcp23s08_platform_data *pdata, local_pdata;
858 unsigned addr;
859 int chips = 0;
860 struct mcp23s08_driver_data *data;
861 int status, type;
862 unsigned ngpio = 0;
863 const struct of_device_id *match;
864 u32 spi_present_mask = 0;
865
866 match = of_match_device(of_match_ptr(mcp23s08_spi_of_match), &spi->dev);
867 if (match) {
868 type = (int)(uintptr_t)match->data;
869 status = of_property_read_u32(spi->dev.of_node,
870 "microchip,spi-present-mask", &spi_present_mask);
871 if (status) {
872 status = of_property_read_u32(spi->dev.of_node,
873 "mcp,spi-present-mask", &spi_present_mask);
874 if (status) {
875 dev_err(&spi->dev,
876 "DT has no spi-present-mask\n");
877 return -ENODEV;
878 }
879 }
880 if ((spi_present_mask <= 0) || (spi_present_mask >= 256)) {
881 dev_err(&spi->dev, "invalid spi-present-mask\n");
882 return -ENODEV;
883 }
884
885 pdata = &local_pdata;
886 pdata->base = -1;
887 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
888 pdata->chip[addr].pullups = 0;
889 if (spi_present_mask & (1 << addr))
890 chips++;
891 }
892 pdata->irq_controller = of_property_read_bool(
893 spi->dev.of_node,
894 "interrupt-controller");
895 pdata->mirror = of_property_read_bool(spi->dev.of_node,
896 "microchip,irq-mirror");
897 } else {
898 type = spi_get_device_id(spi)->driver_data;
899 pdata = dev_get_platdata(&spi->dev);
900 if (!pdata) {
901 pdata = devm_kzalloc(&spi->dev,
902 sizeof(struct mcp23s08_platform_data),
903 GFP_KERNEL);
904 pdata->base = -1;
905 }
906
907 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
908 if (!pdata->chip[addr].is_present)
909 continue;
910 chips++;
911 if ((type == MCP_TYPE_S08) && (addr > 3)) {
912 dev_err(&spi->dev,
913 "mcp23s08 only supports address 0..3\n");
914 return -EINVAL;
915 }
916 spi_present_mask |= 1 << addr;
917 }
918 }
919
920 if (!chips)
921 return -ENODEV;
922
923 data = devm_kzalloc(&spi->dev,
924 sizeof(*data) + chips * sizeof(struct mcp23s08),
925 GFP_KERNEL);
926 if (!data)
927 return -ENOMEM;
928
929 spi_set_drvdata(spi, data);
930
931 spi->irq = irq_of_parse_and_map(spi->dev.of_node, 0);
932
933 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
934 if (!(spi_present_mask & (1 << addr)))
935 continue;
936 chips--;
937 data->mcp[addr] = &data->chip[chips];
938 data->mcp[addr]->irq = spi->irq;
939 status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi,
940 0x40 | (addr << 1), type, pdata,
941 addr);
942 if (status < 0)
943 goto fail;
944
945 if (pdata->base != -1)
946 pdata->base += data->mcp[addr]->chip.ngpio;
947 ngpio += data->mcp[addr]->chip.ngpio;
948 }
949 data->ngpio = ngpio;
950
951 /* NOTE: these chips have a relatively sane IRQ framework, with
952 * per-signal masking and level/edge triggering. It's not yet
953 * handled here...
954 */
955
956 return 0;
957
958fail:
959 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
960
961 if (!data->mcp[addr])
962 continue;
963 gpiochip_remove(&data->mcp[addr]->chip);
964 }
965 return status;
966}
967
968static int mcp23s08_remove(struct spi_device *spi)
969{
970 struct mcp23s08_driver_data *data = spi_get_drvdata(spi);
971 unsigned addr;
972
973 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
974
975 if (!data->mcp[addr])
976 continue;
977
978 gpiochip_remove(&data->mcp[addr]->chip);
979 }
980
981 return 0;
982}
983
984static const struct spi_device_id mcp23s08_ids[] = {
985 { "mcp23s08", MCP_TYPE_S08 },
986 { "mcp23s17", MCP_TYPE_S17 },
987 { "mcp23s18", MCP_TYPE_S18 },
988 { },
989};
990MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
991
992static struct spi_driver mcp23s08_driver = {
993 .probe = mcp23s08_probe,
994 .remove = mcp23s08_remove,
995 .id_table = mcp23s08_ids,
996 .driver = {
997 .name = "mcp23s08",
998 .of_match_table = of_match_ptr(mcp23s08_spi_of_match),
999 },
1000};
1001
1002static int __init mcp23s08_spi_init(void)
1003{
1004 return spi_register_driver(&mcp23s08_driver);
1005}
1006
1007static void mcp23s08_spi_exit(void)
1008{
1009 spi_unregister_driver(&mcp23s08_driver);
1010}
1011
1012#else
1013
1014static int __init mcp23s08_spi_init(void) { return 0; }
1015static void mcp23s08_spi_exit(void) { }
1016
1017#endif /* CONFIG_SPI_MASTER */
1018
1019/*----------------------------------------------------------------------*/
1020
1021static int __init mcp23s08_init(void)
1022{
1023 int ret;
1024
1025 ret = mcp23s08_spi_init();
1026 if (ret)
1027 goto spi_fail;
1028
1029 ret = mcp23s08_i2c_init();
1030 if (ret)
1031 goto i2c_fail;
1032
1033 return 0;
1034
1035 i2c_fail:
1036 mcp23s08_spi_exit();
1037 spi_fail:
1038 return ret;
1039}
1040/* register after spi/i2c postcore initcall and before
1041 * subsys initcalls that may rely on these GPIOs
1042 */
1043subsys_initcall(mcp23s08_init);
1044
1045static void __exit mcp23s08_exit(void)
1046{
1047 mcp23s08_spi_exit();
1048 mcp23s08_i2c_exit();
1049}
1050module_exit(mcp23s08_exit);
1051
1052MODULE_LICENSE("GPL");