Linux Audio

Check our new training course

Loading...
v3.15
  1/*
  2 * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de>
  3 *
  4 *  For licencing details see kernel-base/COPYING
  5 */
  6#include <linux/init.h>
  7#include <linux/ioport.h>
  8#include <linux/module.h>
  9#include <linux/pci.h>
 10
 11#include <asm/bios_ebda.h>
 12#include <asm/paravirt.h>
 13#include <asm/pci_x86.h>
 14#include <asm/pci.h>
 15#include <asm/mpspec.h>
 16#include <asm/setup.h>
 17#include <asm/apic.h>
 18#include <asm/e820.h>
 19#include <asm/time.h>
 20#include <asm/irq.h>
 21#include <asm/io_apic.h>
 22#include <asm/hpet.h>
 23#include <asm/pat.h>
 24#include <asm/tsc.h>
 25#include <asm/iommu.h>
 26#include <asm/mach_traps.h>
 27
 28void x86_init_noop(void) { }
 29void __init x86_init_uint_noop(unsigned int unused) { }
 30int __init iommu_init_noop(void) { return 0; }
 31void iommu_shutdown_noop(void) { }
 32
 33/*
 34 * The platform setup functions are preset with the default functions
 35 * for standard PC hardware.
 36 */
 37struct x86_init_ops x86_init __initdata = {
 38
 39	.resources = {
 40		.probe_roms		= probe_roms,
 41		.reserve_resources	= reserve_standard_io_resources,
 42		.memory_setup		= default_machine_specific_memory_setup,
 43	},
 44
 45	.mpparse = {
 46		.mpc_record		= x86_init_uint_noop,
 47		.setup_ioapic_ids	= x86_init_noop,
 48		.mpc_apic_id		= default_mpc_apic_id,
 49		.smp_read_mpc_oem	= default_smp_read_mpc_oem,
 50		.mpc_oem_bus_info	= default_mpc_oem_bus_info,
 51		.find_smp_config	= default_find_smp_config,
 52		.get_smp_config		= default_get_smp_config,
 53	},
 54
 55	.irqs = {
 56		.pre_vector_init	= init_ISA_irqs,
 57		.intr_init		= native_init_IRQ,
 58		.trap_init		= x86_init_noop,
 59	},
 60
 61	.oem = {
 62		.arch_setup		= x86_init_noop,
 63		.banner			= default_banner,
 64	},
 65
 66	.paging = {
 67		.pagetable_init		= native_pagetable_init,
 68	},
 69
 70	.timers = {
 71		.setup_percpu_clockev	= setup_boot_APIC_clock,
 72		.tsc_pre_init		= x86_init_noop,
 73		.timer_init		= hpet_time_init,
 74		.wallclock_init		= x86_init_noop,
 75	},
 76
 77	.iommu = {
 78		.iommu_init		= iommu_init_noop,
 79	},
 80
 81	.pci = {
 82		.init			= x86_default_pci_init,
 83		.init_irq		= x86_default_pci_init_irq,
 84		.fixup_irqs		= x86_default_pci_fixup_irqs,
 85	},
 86};
 87
 88struct x86_cpuinit_ops x86_cpuinit = {
 89	.early_percpu_clock_init	= x86_init_noop,
 90	.setup_percpu_clockev		= setup_secondary_APIC_clock,
 91};
 92
 93static void default_nmi_init(void) { };
 94static int default_i8042_detect(void) { return 1; };
 95
 96struct x86_platform_ops x86_platform = {
 
 97	.calibrate_tsc			= native_calibrate_tsc,
 98	.get_wallclock			= mach_get_cmos_time,
 99	.set_wallclock			= mach_set_rtc_mmss,
100	.iommu_shutdown			= iommu_shutdown_noop,
101	.is_untracked_pat_range		= is_ISA_range,
102	.nmi_init			= default_nmi_init,
103	.get_nmi_reason			= default_get_nmi_reason,
104	.i8042_detect			= default_i8042_detect,
105	.save_sched_clock_state 	= tsc_save_sched_clock_state,
106	.restore_sched_clock_state 	= tsc_restore_sched_clock_state,
107};
108
109EXPORT_SYMBOL_GPL(x86_platform);
110
111#if defined(CONFIG_PCI_MSI)
112struct x86_msi_ops x86_msi = {
113	.setup_msi_irqs		= native_setup_msi_irqs,
114	.compose_msi_msg	= native_compose_msi_msg,
115	.teardown_msi_irq	= native_teardown_msi_irq,
116	.teardown_msi_irqs	= default_teardown_msi_irqs,
117	.restore_msi_irqs	= default_restore_msi_irqs,
118	.setup_hpet_msi		= default_setup_hpet_msi,
119	.msi_mask_irq		= default_msi_mask_irq,
120	.msix_mask_irq		= default_msix_mask_irq,
121};
122
123/* MSI arch specific hooks */
124int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
125{
126	return x86_msi.setup_msi_irqs(dev, nvec, type);
127}
128
129void arch_teardown_msi_irqs(struct pci_dev *dev)
130{
131	x86_msi.teardown_msi_irqs(dev);
132}
133
134void arch_teardown_msi_irq(unsigned int irq)
135{
136	x86_msi.teardown_msi_irq(irq);
137}
138
139void arch_restore_msi_irqs(struct pci_dev *dev)
140{
141	x86_msi.restore_msi_irqs(dev);
142}
143u32 arch_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
144{
145	return x86_msi.msi_mask_irq(desc, mask, flag);
146}
147u32 arch_msix_mask_irq(struct msi_desc *desc, u32 flag)
148{
149	return x86_msi.msix_mask_irq(desc, flag);
150}
151#endif
152
153struct x86_io_apic_ops x86_io_apic_ops = {
154	.init			= native_io_apic_init_mappings,
155	.read			= native_io_apic_read,
156	.write			= native_io_apic_write,
157	.modify			= native_io_apic_modify,
158	.disable		= native_disable_io_apic,
159	.print_entries		= native_io_apic_print_entries,
160	.set_affinity		= native_ioapic_set_affinity,
161	.setup_entry		= native_setup_ioapic_entry,
162	.eoi_ioapic_pin		= native_eoi_ioapic_pin,
163};
v4.10.11
  1/*
  2 * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de>
  3 *
  4 *  For licencing details see kernel-base/COPYING
  5 */
  6#include <linux/init.h>
  7#include <linux/ioport.h>
  8#include <linux/export.h>
  9#include <linux/pci.h>
 10
 11#include <asm/bios_ebda.h>
 12#include <asm/paravirt.h>
 13#include <asm/pci_x86.h>
 
 14#include <asm/mpspec.h>
 15#include <asm/setup.h>
 16#include <asm/apic.h>
 17#include <asm/e820.h>
 18#include <asm/time.h>
 19#include <asm/irq.h>
 20#include <asm/io_apic.h>
 21#include <asm/hpet.h>
 22#include <asm/pat.h>
 23#include <asm/tsc.h>
 24#include <asm/iommu.h>
 25#include <asm/mach_traps.h>
 26
 27void x86_init_noop(void) { }
 28void __init x86_init_uint_noop(unsigned int unused) { }
 29int __init iommu_init_noop(void) { return 0; }
 30void iommu_shutdown_noop(void) { }
 31
 32/*
 33 * The platform setup functions are preset with the default functions
 34 * for standard PC hardware.
 35 */
 36struct x86_init_ops x86_init __initdata = {
 37
 38	.resources = {
 39		.probe_roms		= probe_roms,
 40		.reserve_resources	= reserve_standard_io_resources,
 41		.memory_setup		= default_machine_specific_memory_setup,
 42	},
 43
 44	.mpparse = {
 45		.mpc_record		= x86_init_uint_noop,
 46		.setup_ioapic_ids	= x86_init_noop,
 47		.mpc_apic_id		= default_mpc_apic_id,
 48		.smp_read_mpc_oem	= default_smp_read_mpc_oem,
 49		.mpc_oem_bus_info	= default_mpc_oem_bus_info,
 50		.find_smp_config	= default_find_smp_config,
 51		.get_smp_config		= default_get_smp_config,
 52	},
 53
 54	.irqs = {
 55		.pre_vector_init	= init_ISA_irqs,
 56		.intr_init		= native_init_IRQ,
 57		.trap_init		= x86_init_noop,
 58	},
 59
 60	.oem = {
 61		.arch_setup		= x86_init_noop,
 62		.banner			= default_banner,
 63	},
 64
 65	.paging = {
 66		.pagetable_init		= native_pagetable_init,
 67	},
 68
 69	.timers = {
 70		.setup_percpu_clockev	= setup_boot_APIC_clock,
 
 71		.timer_init		= hpet_time_init,
 72		.wallclock_init		= x86_init_noop,
 73	},
 74
 75	.iommu = {
 76		.iommu_init		= iommu_init_noop,
 77	},
 78
 79	.pci = {
 80		.init			= x86_default_pci_init,
 81		.init_irq		= x86_default_pci_init_irq,
 82		.fixup_irqs		= x86_default_pci_fixup_irqs,
 83	},
 84};
 85
 86struct x86_cpuinit_ops x86_cpuinit = {
 87	.early_percpu_clock_init	= x86_init_noop,
 88	.setup_percpu_clockev		= setup_secondary_APIC_clock,
 89};
 90
 91static void default_nmi_init(void) { };
 
 92
 93struct x86_platform_ops x86_platform __ro_after_init = {
 94	.calibrate_cpu			= native_calibrate_cpu,
 95	.calibrate_tsc			= native_calibrate_tsc,
 96	.get_wallclock			= mach_get_cmos_time,
 97	.set_wallclock			= mach_set_rtc_mmss,
 98	.iommu_shutdown			= iommu_shutdown_noop,
 99	.is_untracked_pat_range		= is_ISA_range,
100	.nmi_init			= default_nmi_init,
101	.get_nmi_reason			= default_get_nmi_reason,
 
102	.save_sched_clock_state 	= tsc_save_sched_clock_state,
103	.restore_sched_clock_state 	= tsc_restore_sched_clock_state,
104};
105
106EXPORT_SYMBOL_GPL(x86_platform);
107
108#if defined(CONFIG_PCI_MSI)
109struct x86_msi_ops x86_msi __ro_after_init = {
110	.setup_msi_irqs		= native_setup_msi_irqs,
 
111	.teardown_msi_irq	= native_teardown_msi_irq,
112	.teardown_msi_irqs	= default_teardown_msi_irqs,
113	.restore_msi_irqs	= default_restore_msi_irqs,
 
 
 
114};
115
116/* MSI arch specific hooks */
117int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
118{
119	return x86_msi.setup_msi_irqs(dev, nvec, type);
120}
121
122void arch_teardown_msi_irqs(struct pci_dev *dev)
123{
124	x86_msi.teardown_msi_irqs(dev);
125}
126
127void arch_teardown_msi_irq(unsigned int irq)
128{
129	x86_msi.teardown_msi_irq(irq);
130}
131
132void arch_restore_msi_irqs(struct pci_dev *dev)
133{
134	x86_msi.restore_msi_irqs(dev);
135}
 
 
 
 
 
 
 
 
136#endif
137
138struct x86_io_apic_ops x86_io_apic_ops __ro_after_init = {
 
139	.read			= native_io_apic_read,
 
 
140	.disable		= native_disable_io_apic,
 
 
 
 
141};