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1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for Silicon Labs 3054/5 modem codec
5 *
6 * Copyright (c) 2005 Sasha Khapyorsky <sashak@alsa-project.org>
7 * Takashi Iwai <tiwai@suse.de>
8 *
9 *
10 * This driver is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This driver is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 */
24
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/slab.h>
28#include <linux/module.h>
29#include <sound/core.h>
30#include "hda_codec.h"
31#include "hda_local.h"
32
33/* si3054 verbs */
34#define SI3054_VERB_READ_NODE 0x900
35#define SI3054_VERB_WRITE_NODE 0x100
36
37/* si3054 nodes (registers) */
38#define SI3054_EXTENDED_MID 2
39#define SI3054_LINE_RATE 3
40#define SI3054_LINE_LEVEL 4
41#define SI3054_GPIO_CFG 5
42#define SI3054_GPIO_POLARITY 6
43#define SI3054_GPIO_STICKY 7
44#define SI3054_GPIO_WAKEUP 8
45#define SI3054_GPIO_STATUS 9
46#define SI3054_GPIO_CONTROL 10
47#define SI3054_MISC_AFE 11
48#define SI3054_CHIPID 12
49#define SI3054_LINE_CFG1 13
50#define SI3054_LINE_STATUS 14
51#define SI3054_DC_TERMINATION 15
52#define SI3054_LINE_CONFIG 16
53#define SI3054_CALLPROG_ATT 17
54#define SI3054_SQ_CONTROL 18
55#define SI3054_MISC_CONTROL 19
56#define SI3054_RING_CTRL1 20
57#define SI3054_RING_CTRL2 21
58
59/* extended MID */
60#define SI3054_MEI_READY 0xf
61
62/* line level */
63#define SI3054_ATAG_MASK 0x00f0
64#define SI3054_DTAG_MASK 0xf000
65
66/* GPIO bits */
67#define SI3054_GPIO_OH 0x0001
68#define SI3054_GPIO_CID 0x0002
69
70/* chipid and revisions */
71#define SI3054_CHIPID_CODEC_REV_MASK 0x000f
72#define SI3054_CHIPID_DAA_REV_MASK 0x00f0
73#define SI3054_CHIPID_INTERNATIONAL 0x0100
74#define SI3054_CHIPID_DAA_ID 0x0f00
75#define SI3054_CHIPID_CODEC_ID (1<<12)
76
77/* si3054 codec registers (nodes) access macros */
78#define GET_REG(codec,reg) (snd_hda_codec_read(codec,reg,0,SI3054_VERB_READ_NODE,0))
79#define SET_REG(codec,reg,val) (snd_hda_codec_write(codec,reg,0,SI3054_VERB_WRITE_NODE,val))
80#define SET_REG_CACHE(codec,reg,val) \
81 snd_hda_codec_write_cache(codec,reg,0,SI3054_VERB_WRITE_NODE,val)
82
83
84struct si3054_spec {
85 unsigned international;
86 struct hda_pcm pcm;
87};
88
89
90/*
91 * Modem mixer
92 */
93
94#define PRIVATE_VALUE(reg,mask) ((reg<<16)|(mask&0xffff))
95#define PRIVATE_REG(val) ((val>>16)&0xffff)
96#define PRIVATE_MASK(val) (val&0xffff)
97
98#define si3054_switch_info snd_ctl_boolean_mono_info
99
100static int si3054_switch_get(struct snd_kcontrol *kcontrol,
101 struct snd_ctl_elem_value *uvalue)
102{
103 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
104 u16 reg = PRIVATE_REG(kcontrol->private_value);
105 u16 mask = PRIVATE_MASK(kcontrol->private_value);
106 uvalue->value.integer.value[0] = (GET_REG(codec, reg)) & mask ? 1 : 0 ;
107 return 0;
108}
109
110static int si3054_switch_put(struct snd_kcontrol *kcontrol,
111 struct snd_ctl_elem_value *uvalue)
112{
113 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
114 u16 reg = PRIVATE_REG(kcontrol->private_value);
115 u16 mask = PRIVATE_MASK(kcontrol->private_value);
116 if (uvalue->value.integer.value[0])
117 SET_REG_CACHE(codec, reg, (GET_REG(codec, reg)) | mask);
118 else
119 SET_REG_CACHE(codec, reg, (GET_REG(codec, reg)) & ~mask);
120 return 0;
121}
122
123#define SI3054_KCONTROL(kname,reg,mask) { \
124 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
125 .name = kname, \
126 .subdevice = HDA_SUBDEV_NID_FLAG | reg, \
127 .info = si3054_switch_info, \
128 .get = si3054_switch_get, \
129 .put = si3054_switch_put, \
130 .private_value = PRIVATE_VALUE(reg,mask), \
131}
132
133
134static const struct snd_kcontrol_new si3054_modem_mixer[] = {
135 SI3054_KCONTROL("Off-hook Switch", SI3054_GPIO_CONTROL, SI3054_GPIO_OH),
136 SI3054_KCONTROL("Caller ID Switch", SI3054_GPIO_CONTROL, SI3054_GPIO_CID),
137 {}
138};
139
140static int si3054_build_controls(struct hda_codec *codec)
141{
142 return snd_hda_add_new_ctls(codec, si3054_modem_mixer);
143}
144
145
146/*
147 * PCM callbacks
148 */
149
150static int si3054_pcm_prepare(struct hda_pcm_stream *hinfo,
151 struct hda_codec *codec,
152 unsigned int stream_tag,
153 unsigned int format,
154 struct snd_pcm_substream *substream)
155{
156 u16 val;
157
158 SET_REG(codec, SI3054_LINE_RATE, substream->runtime->rate);
159 val = GET_REG(codec, SI3054_LINE_LEVEL);
160 val &= 0xff << (8 * (substream->stream != SNDRV_PCM_STREAM_PLAYBACK));
161 val |= ((stream_tag & 0xf) << 4) << (8 * (substream->stream == SNDRV_PCM_STREAM_PLAYBACK));
162 SET_REG(codec, SI3054_LINE_LEVEL, val);
163
164 snd_hda_codec_setup_stream(codec, hinfo->nid,
165 stream_tag, 0, format);
166 return 0;
167}
168
169static int si3054_pcm_open(struct hda_pcm_stream *hinfo,
170 struct hda_codec *codec,
171 struct snd_pcm_substream *substream)
172{
173 static unsigned int rates[] = { 8000, 9600, 16000 };
174 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
175 .count = ARRAY_SIZE(rates),
176 .list = rates,
177 .mask = 0,
178 };
179 substream->runtime->hw.period_bytes_min = 80;
180 return snd_pcm_hw_constraint_list(substream->runtime, 0,
181 SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
182}
183
184
185static const struct hda_pcm_stream si3054_pcm = {
186 .substreams = 1,
187 .channels_min = 1,
188 .channels_max = 1,
189 .nid = 0x1,
190 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_KNOT,
191 .formats = SNDRV_PCM_FMTBIT_S16_LE,
192 .maxbps = 16,
193 .ops = {
194 .open = si3054_pcm_open,
195 .prepare = si3054_pcm_prepare,
196 },
197};
198
199
200static int si3054_build_pcms(struct hda_codec *codec)
201{
202 struct si3054_spec *spec = codec->spec;
203 struct hda_pcm *info = &spec->pcm;
204 codec->num_pcms = 1;
205 codec->pcm_info = info;
206 info->name = "Si3054 Modem";
207 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = si3054_pcm;
208 info->stream[SNDRV_PCM_STREAM_CAPTURE] = si3054_pcm;
209 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = codec->mfg;
210 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = codec->mfg;
211 info->pcm_type = HDA_PCM_TYPE_MODEM;
212 return 0;
213}
214
215
216/*
217 * Init part
218 */
219
220static int si3054_init(struct hda_codec *codec)
221{
222 struct si3054_spec *spec = codec->spec;
223 unsigned wait_count;
224 u16 val;
225
226 snd_hda_codec_write(codec, AC_NODE_ROOT, 0, AC_VERB_SET_CODEC_RESET, 0);
227 snd_hda_codec_write(codec, codec->mfg, 0, AC_VERB_SET_STREAM_FORMAT, 0);
228 SET_REG(codec, SI3054_LINE_RATE, 9600);
229 SET_REG(codec, SI3054_LINE_LEVEL, SI3054_DTAG_MASK|SI3054_ATAG_MASK);
230 SET_REG(codec, SI3054_EXTENDED_MID, 0);
231
232 wait_count = 10;
233 do {
234 msleep(2);
235 val = GET_REG(codec, SI3054_EXTENDED_MID);
236 } while ((val & SI3054_MEI_READY) != SI3054_MEI_READY && wait_count--);
237
238 if((val&SI3054_MEI_READY) != SI3054_MEI_READY) {
239 codec_err(codec, "si3054: cannot initialize. EXT MID = %04x\n", val);
240 /* let's pray that this is no fatal error */
241 /* return -EACCES; */
242 }
243
244 SET_REG(codec, SI3054_GPIO_POLARITY, 0xffff);
245 SET_REG(codec, SI3054_GPIO_CFG, 0x0);
246 SET_REG(codec, SI3054_MISC_AFE, 0);
247 SET_REG(codec, SI3054_LINE_CFG1,0x200);
248
249 if((GET_REG(codec,SI3054_LINE_STATUS) & (1<<6)) == 0) {
250 codec_dbg(codec,
251 "Link Frame Detect(FDT) is not ready (line status: %04x)\n",
252 GET_REG(codec,SI3054_LINE_STATUS));
253 }
254
255 spec->international = GET_REG(codec, SI3054_CHIPID) & SI3054_CHIPID_INTERNATIONAL;
256
257 return 0;
258}
259
260static void si3054_free(struct hda_codec *codec)
261{
262 kfree(codec->spec);
263}
264
265
266/*
267 */
268
269static const struct hda_codec_ops si3054_patch_ops = {
270 .build_controls = si3054_build_controls,
271 .build_pcms = si3054_build_pcms,
272 .init = si3054_init,
273 .free = si3054_free,
274};
275
276static int patch_si3054(struct hda_codec *codec)
277{
278 struct si3054_spec *spec = kzalloc(sizeof(*spec), GFP_KERNEL);
279 if (spec == NULL)
280 return -ENOMEM;
281 codec->spec = spec;
282 codec->patch_ops = si3054_patch_ops;
283 return 0;
284}
285
286/*
287 * patch entries
288 */
289static const struct hda_codec_preset snd_hda_preset_si3054[] = {
290 { .id = 0x163c3055, .name = "Si3054", .patch = patch_si3054 },
291 { .id = 0x163c3155, .name = "Si3054", .patch = patch_si3054 },
292 { .id = 0x11c13026, .name = "Si3054", .patch = patch_si3054 },
293 { .id = 0x11c13055, .name = "Si3054", .patch = patch_si3054 },
294 { .id = 0x11c13155, .name = "Si3054", .patch = patch_si3054 },
295 { .id = 0x10573055, .name = "Si3054", .patch = patch_si3054 },
296 { .id = 0x10573057, .name = "Si3054", .patch = patch_si3054 },
297 { .id = 0x10573155, .name = "Si3054", .patch = patch_si3054 },
298 /* VIA HDA on Clevo m540 */
299 { .id = 0x11063288, .name = "Si3054", .patch = patch_si3054 },
300 /* Asus A8J Modem (SM56) */
301 { .id = 0x15433155, .name = "Si3054", .patch = patch_si3054 },
302 /* LG LW20 modem */
303 { .id = 0x18540018, .name = "Si3054", .patch = patch_si3054 },
304 {}
305};
306
307MODULE_ALIAS("snd-hda-codec-id:163c3055");
308MODULE_ALIAS("snd-hda-codec-id:163c3155");
309MODULE_ALIAS("snd-hda-codec-id:11c13026");
310MODULE_ALIAS("snd-hda-codec-id:11c13055");
311MODULE_ALIAS("snd-hda-codec-id:11c13155");
312MODULE_ALIAS("snd-hda-codec-id:10573055");
313MODULE_ALIAS("snd-hda-codec-id:10573057");
314MODULE_ALIAS("snd-hda-codec-id:10573155");
315MODULE_ALIAS("snd-hda-codec-id:11063288");
316MODULE_ALIAS("snd-hda-codec-id:15433155");
317MODULE_ALIAS("snd-hda-codec-id:18540018");
318
319MODULE_LICENSE("GPL");
320MODULE_DESCRIPTION("Si3054 HD-audio modem codec");
321
322static struct hda_codec_preset_list si3054_list = {
323 .preset = snd_hda_preset_si3054,
324 .owner = THIS_MODULE,
325};
326
327static int __init patch_si3054_init(void)
328{
329 return snd_hda_add_codec_preset(&si3054_list);
330}
331
332static void __exit patch_si3054_exit(void)
333{
334 snd_hda_delete_codec_preset(&si3054_list);
335}
336
337module_init(patch_si3054_init)
338module_exit(patch_si3054_exit)
1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for Silicon Labs 3054/5 modem codec
5 *
6 * Copyright (c) 2005 Sasha Khapyorsky <sashak@alsa-project.org>
7 * Takashi Iwai <tiwai@suse.de>
8 *
9 *
10 * This driver is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This driver is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 */
24
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/slab.h>
28#include <linux/module.h>
29#include <sound/core.h>
30#include "hda_codec.h"
31#include "hda_local.h"
32
33/* si3054 verbs */
34#define SI3054_VERB_READ_NODE 0x900
35#define SI3054_VERB_WRITE_NODE 0x100
36
37/* si3054 nodes (registers) */
38#define SI3054_EXTENDED_MID 2
39#define SI3054_LINE_RATE 3
40#define SI3054_LINE_LEVEL 4
41#define SI3054_GPIO_CFG 5
42#define SI3054_GPIO_POLARITY 6
43#define SI3054_GPIO_STICKY 7
44#define SI3054_GPIO_WAKEUP 8
45#define SI3054_GPIO_STATUS 9
46#define SI3054_GPIO_CONTROL 10
47#define SI3054_MISC_AFE 11
48#define SI3054_CHIPID 12
49#define SI3054_LINE_CFG1 13
50#define SI3054_LINE_STATUS 14
51#define SI3054_DC_TERMINATION 15
52#define SI3054_LINE_CONFIG 16
53#define SI3054_CALLPROG_ATT 17
54#define SI3054_SQ_CONTROL 18
55#define SI3054_MISC_CONTROL 19
56#define SI3054_RING_CTRL1 20
57#define SI3054_RING_CTRL2 21
58
59/* extended MID */
60#define SI3054_MEI_READY 0xf
61
62/* line level */
63#define SI3054_ATAG_MASK 0x00f0
64#define SI3054_DTAG_MASK 0xf000
65
66/* GPIO bits */
67#define SI3054_GPIO_OH 0x0001
68#define SI3054_GPIO_CID 0x0002
69
70/* chipid and revisions */
71#define SI3054_CHIPID_CODEC_REV_MASK 0x000f
72#define SI3054_CHIPID_DAA_REV_MASK 0x00f0
73#define SI3054_CHIPID_INTERNATIONAL 0x0100
74#define SI3054_CHIPID_DAA_ID 0x0f00
75#define SI3054_CHIPID_CODEC_ID (1<<12)
76
77/* si3054 codec registers (nodes) access macros */
78#define GET_REG(codec,reg) (snd_hda_codec_read(codec,reg,0,SI3054_VERB_READ_NODE,0))
79#define SET_REG(codec,reg,val) (snd_hda_codec_write(codec,reg,0,SI3054_VERB_WRITE_NODE,val))
80#define SET_REG_CACHE(codec,reg,val) \
81 snd_hda_codec_write_cache(codec,reg,0,SI3054_VERB_WRITE_NODE,val)
82
83
84struct si3054_spec {
85 unsigned international;
86 struct hda_pcm pcm;
87};
88
89
90/*
91 * Modem mixer
92 */
93
94#define PRIVATE_VALUE(reg,mask) ((reg<<16)|(mask&0xffff))
95#define PRIVATE_REG(val) ((val>>16)&0xffff)
96#define PRIVATE_MASK(val) (val&0xffff)
97
98#define si3054_switch_info snd_ctl_boolean_mono_info
99
100static int si3054_switch_get(struct snd_kcontrol *kcontrol,
101 struct snd_ctl_elem_value *uvalue)
102{
103 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
104 u16 reg = PRIVATE_REG(kcontrol->private_value);
105 u16 mask = PRIVATE_MASK(kcontrol->private_value);
106 uvalue->value.integer.value[0] = (GET_REG(codec, reg)) & mask ? 1 : 0 ;
107 return 0;
108}
109
110static int si3054_switch_put(struct snd_kcontrol *kcontrol,
111 struct snd_ctl_elem_value *uvalue)
112{
113 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
114 u16 reg = PRIVATE_REG(kcontrol->private_value);
115 u16 mask = PRIVATE_MASK(kcontrol->private_value);
116 if (uvalue->value.integer.value[0])
117 SET_REG_CACHE(codec, reg, (GET_REG(codec, reg)) | mask);
118 else
119 SET_REG_CACHE(codec, reg, (GET_REG(codec, reg)) & ~mask);
120 return 0;
121}
122
123#define SI3054_KCONTROL(kname,reg,mask) { \
124 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
125 .name = kname, \
126 .subdevice = HDA_SUBDEV_NID_FLAG | reg, \
127 .info = si3054_switch_info, \
128 .get = si3054_switch_get, \
129 .put = si3054_switch_put, \
130 .private_value = PRIVATE_VALUE(reg,mask), \
131}
132
133
134static const struct snd_kcontrol_new si3054_modem_mixer[] = {
135 SI3054_KCONTROL("Off-hook Switch", SI3054_GPIO_CONTROL, SI3054_GPIO_OH),
136 SI3054_KCONTROL("Caller ID Switch", SI3054_GPIO_CONTROL, SI3054_GPIO_CID),
137 {}
138};
139
140static int si3054_build_controls(struct hda_codec *codec)
141{
142 return snd_hda_add_new_ctls(codec, si3054_modem_mixer);
143}
144
145
146/*
147 * PCM callbacks
148 */
149
150static int si3054_pcm_prepare(struct hda_pcm_stream *hinfo,
151 struct hda_codec *codec,
152 unsigned int stream_tag,
153 unsigned int format,
154 struct snd_pcm_substream *substream)
155{
156 u16 val;
157
158 SET_REG(codec, SI3054_LINE_RATE, substream->runtime->rate);
159 val = GET_REG(codec, SI3054_LINE_LEVEL);
160 val &= 0xff << (8 * (substream->stream != SNDRV_PCM_STREAM_PLAYBACK));
161 val |= ((stream_tag & 0xf) << 4) << (8 * (substream->stream == SNDRV_PCM_STREAM_PLAYBACK));
162 SET_REG(codec, SI3054_LINE_LEVEL, val);
163
164 snd_hda_codec_setup_stream(codec, hinfo->nid,
165 stream_tag, 0, format);
166 return 0;
167}
168
169static int si3054_pcm_open(struct hda_pcm_stream *hinfo,
170 struct hda_codec *codec,
171 struct snd_pcm_substream *substream)
172{
173 static unsigned int rates[] = { 8000, 9600, 16000 };
174 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
175 .count = ARRAY_SIZE(rates),
176 .list = rates,
177 .mask = 0,
178 };
179 substream->runtime->hw.period_bytes_min = 80;
180 return snd_pcm_hw_constraint_list(substream->runtime, 0,
181 SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
182}
183
184
185static const struct hda_pcm_stream si3054_pcm = {
186 .substreams = 1,
187 .channels_min = 1,
188 .channels_max = 1,
189 .nid = 0x1,
190 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_KNOT,
191 .formats = SNDRV_PCM_FMTBIT_S16_LE,
192 .maxbps = 16,
193 .ops = {
194 .open = si3054_pcm_open,
195 .prepare = si3054_pcm_prepare,
196 },
197};
198
199
200static int si3054_build_pcms(struct hda_codec *codec)
201{
202 struct si3054_spec *spec = codec->spec;
203 struct hda_pcm *info = &spec->pcm;
204 codec->num_pcms = 1;
205 codec->pcm_info = info;
206 info->name = "Si3054 Modem";
207 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = si3054_pcm;
208 info->stream[SNDRV_PCM_STREAM_CAPTURE] = si3054_pcm;
209 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = codec->mfg;
210 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = codec->mfg;
211 info->pcm_type = HDA_PCM_TYPE_MODEM;
212 return 0;
213}
214
215
216/*
217 * Init part
218 */
219
220static int si3054_init(struct hda_codec *codec)
221{
222 struct si3054_spec *spec = codec->spec;
223 unsigned wait_count;
224 u16 val;
225
226 snd_hda_codec_write(codec, AC_NODE_ROOT, 0, AC_VERB_SET_CODEC_RESET, 0);
227 snd_hda_codec_write(codec, codec->mfg, 0, AC_VERB_SET_STREAM_FORMAT, 0);
228 SET_REG(codec, SI3054_LINE_RATE, 9600);
229 SET_REG(codec, SI3054_LINE_LEVEL, SI3054_DTAG_MASK|SI3054_ATAG_MASK);
230 SET_REG(codec, SI3054_EXTENDED_MID, 0);
231
232 wait_count = 10;
233 do {
234 msleep(2);
235 val = GET_REG(codec, SI3054_EXTENDED_MID);
236 } while ((val & SI3054_MEI_READY) != SI3054_MEI_READY && wait_count--);
237
238 if((val&SI3054_MEI_READY) != SI3054_MEI_READY) {
239 snd_printk(KERN_ERR "si3054: cannot initialize. EXT MID = %04x\n", val);
240 /* let's pray that this is no fatal error */
241 /* return -EACCES; */
242 }
243
244 SET_REG(codec, SI3054_GPIO_POLARITY, 0xffff);
245 SET_REG(codec, SI3054_GPIO_CFG, 0x0);
246 SET_REG(codec, SI3054_MISC_AFE, 0);
247 SET_REG(codec, SI3054_LINE_CFG1,0x200);
248
249 if((GET_REG(codec,SI3054_LINE_STATUS) & (1<<6)) == 0) {
250 snd_printd("Link Frame Detect(FDT) is not ready (line status: %04x)\n",
251 GET_REG(codec,SI3054_LINE_STATUS));
252 }
253
254 spec->international = GET_REG(codec, SI3054_CHIPID) & SI3054_CHIPID_INTERNATIONAL;
255
256 return 0;
257}
258
259static void si3054_free(struct hda_codec *codec)
260{
261 kfree(codec->spec);
262}
263
264
265/*
266 */
267
268static const struct hda_codec_ops si3054_patch_ops = {
269 .build_controls = si3054_build_controls,
270 .build_pcms = si3054_build_pcms,
271 .init = si3054_init,
272 .free = si3054_free,
273};
274
275static int patch_si3054(struct hda_codec *codec)
276{
277 struct si3054_spec *spec = kzalloc(sizeof(*spec), GFP_KERNEL);
278 if (spec == NULL)
279 return -ENOMEM;
280 codec->spec = spec;
281 codec->patch_ops = si3054_patch_ops;
282 return 0;
283}
284
285/*
286 * patch entries
287 */
288static const struct hda_codec_preset snd_hda_preset_si3054[] = {
289 { .id = 0x163c3055, .name = "Si3054", .patch = patch_si3054 },
290 { .id = 0x163c3155, .name = "Si3054", .patch = patch_si3054 },
291 { .id = 0x11c13026, .name = "Si3054", .patch = patch_si3054 },
292 { .id = 0x11c13055, .name = "Si3054", .patch = patch_si3054 },
293 { .id = 0x11c13155, .name = "Si3054", .patch = patch_si3054 },
294 { .id = 0x10573055, .name = "Si3054", .patch = patch_si3054 },
295 { .id = 0x10573057, .name = "Si3054", .patch = patch_si3054 },
296 { .id = 0x10573155, .name = "Si3054", .patch = patch_si3054 },
297 /* VIA HDA on Clevo m540 */
298 { .id = 0x11063288, .name = "Si3054", .patch = patch_si3054 },
299 /* Asus A8J Modem (SM56) */
300 { .id = 0x15433155, .name = "Si3054", .patch = patch_si3054 },
301 /* LG LW20 modem */
302 { .id = 0x18540018, .name = "Si3054", .patch = patch_si3054 },
303 {}
304};
305
306MODULE_ALIAS("snd-hda-codec-id:163c3055");
307MODULE_ALIAS("snd-hda-codec-id:163c3155");
308MODULE_ALIAS("snd-hda-codec-id:11c13026");
309MODULE_ALIAS("snd-hda-codec-id:11c13055");
310MODULE_ALIAS("snd-hda-codec-id:11c13155");
311MODULE_ALIAS("snd-hda-codec-id:10573055");
312MODULE_ALIAS("snd-hda-codec-id:10573057");
313MODULE_ALIAS("snd-hda-codec-id:10573155");
314MODULE_ALIAS("snd-hda-codec-id:11063288");
315MODULE_ALIAS("snd-hda-codec-id:15433155");
316MODULE_ALIAS("snd-hda-codec-id:18540018");
317
318MODULE_LICENSE("GPL");
319MODULE_DESCRIPTION("Si3054 HD-audio modem codec");
320
321static struct hda_codec_preset_list si3054_list = {
322 .preset = snd_hda_preset_si3054,
323 .owner = THIS_MODULE,
324};
325
326static int __init patch_si3054_init(void)
327{
328 return snd_hda_add_codec_preset(&si3054_list);
329}
330
331static void __exit patch_si3054_exit(void)
332{
333 snd_hda_delete_codec_preset(&si3054_list);
334}
335
336module_init(patch_si3054_init)
337module_exit(patch_si3054_exit)