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1/*
2 * linux/arch/arm/mach-omap1/board-h3.c
3 *
4 * This file contains OMAP1710 H3 specific code.
5 *
6 * Copyright (C) 2004 Texas Instruments, Inc.
7 * Copyright (C) 2002 MontaVista Software, Inc.
8 * Copyright (C) 2001 RidgeRun, Inc.
9 * Author: RidgeRun, Inc.
10 * Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16#include <linux/gpio.h>
17#include <linux/types.h>
18#include <linux/init.h>
19#include <linux/major.h>
20#include <linux/kernel.h>
21#include <linux/platform_device.h>
22#include <linux/errno.h>
23#include <linux/workqueue.h>
24#include <linux/i2c.h>
25#include <linux/mtd/mtd.h>
26#include <linux/mtd/nand.h>
27#include <linux/mtd/partitions.h>
28#include <linux/mtd/physmap.h>
29#include <linux/input.h>
30#include <linux/spi/spi.h>
31#include <linux/i2c/tps65010.h>
32#include <linux/smc91x.h>
33#include <linux/omapfb.h>
34#include <linux/platform_data/gpio-omap.h>
35#include <linux/leds.h>
36
37#include <asm/setup.h>
38#include <asm/page.h>
39#include <asm/mach-types.h>
40#include <asm/mach/arch.h>
41#include <asm/mach/map.h>
42
43#include <mach/mux.h>
44#include <mach/tc.h>
45#include <linux/platform_data/keypad-omap.h>
46#include <linux/omap-dma.h>
47#include <mach/flash.h>
48
49#include <mach/hardware.h>
50#include <mach/irqs.h>
51#include <mach/usb.h>
52
53#include "common.h"
54#include "board-h3.h"
55
56/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
57#define OMAP1710_ETHR_START 0x04000300
58
59#define H3_TS_GPIO 48
60
61static const unsigned int h3_keymap[] = {
62 KEY(0, 0, KEY_LEFT),
63 KEY(1, 0, KEY_RIGHT),
64 KEY(2, 0, KEY_3),
65 KEY(3, 0, KEY_F10),
66 KEY(4, 0, KEY_F5),
67 KEY(5, 0, KEY_9),
68 KEY(0, 1, KEY_DOWN),
69 KEY(1, 1, KEY_UP),
70 KEY(2, 1, KEY_2),
71 KEY(3, 1, KEY_F9),
72 KEY(4, 1, KEY_F7),
73 KEY(5, 1, KEY_0),
74 KEY(0, 2, KEY_ENTER),
75 KEY(1, 2, KEY_6),
76 KEY(2, 2, KEY_1),
77 KEY(3, 2, KEY_F2),
78 KEY(4, 2, KEY_F6),
79 KEY(5, 2, KEY_HOME),
80 KEY(0, 3, KEY_8),
81 KEY(1, 3, KEY_5),
82 KEY(2, 3, KEY_F12),
83 KEY(3, 3, KEY_F3),
84 KEY(4, 3, KEY_F8),
85 KEY(5, 3, KEY_END),
86 KEY(0, 4, KEY_7),
87 KEY(1, 4, KEY_4),
88 KEY(2, 4, KEY_F11),
89 KEY(3, 4, KEY_F1),
90 KEY(4, 4, KEY_F4),
91 KEY(5, 4, KEY_ESC),
92 KEY(0, 5, KEY_F13),
93 KEY(1, 5, KEY_F14),
94 KEY(2, 5, KEY_F15),
95 KEY(3, 5, KEY_F16),
96 KEY(4, 5, KEY_SLEEP),
97};
98
99
100static struct mtd_partition nor_partitions[] = {
101 /* bootloader (U-Boot, etc) in first sector */
102 {
103 .name = "bootloader",
104 .offset = 0,
105 .size = SZ_128K,
106 .mask_flags = MTD_WRITEABLE, /* force read-only */
107 },
108 /* bootloader params in the next sector */
109 {
110 .name = "params",
111 .offset = MTDPART_OFS_APPEND,
112 .size = SZ_128K,
113 .mask_flags = 0,
114 },
115 /* kernel */
116 {
117 .name = "kernel",
118 .offset = MTDPART_OFS_APPEND,
119 .size = SZ_2M,
120 .mask_flags = 0
121 },
122 /* file system */
123 {
124 .name = "filesystem",
125 .offset = MTDPART_OFS_APPEND,
126 .size = MTDPART_SIZ_FULL,
127 .mask_flags = 0
128 }
129};
130
131static struct physmap_flash_data nor_data = {
132 .width = 2,
133 .set_vpp = omap1_set_vpp,
134 .parts = nor_partitions,
135 .nr_parts = ARRAY_SIZE(nor_partitions),
136};
137
138static struct resource nor_resource = {
139 /* This is on CS3, wherever it's mapped */
140 .flags = IORESOURCE_MEM,
141};
142
143static struct platform_device nor_device = {
144 .name = "physmap-flash",
145 .id = 0,
146 .dev = {
147 .platform_data = &nor_data,
148 },
149 .num_resources = 1,
150 .resource = &nor_resource,
151};
152
153static struct mtd_partition nand_partitions[] = {
154#if 0
155 /* REVISIT: enable these partitions if you make NAND BOOT work */
156 {
157 .name = "xloader",
158 .offset = 0,
159 .size = 64 * 1024,
160 .mask_flags = MTD_WRITEABLE, /* force read-only */
161 },
162 {
163 .name = "bootloader",
164 .offset = MTDPART_OFS_APPEND,
165 .size = 256 * 1024,
166 .mask_flags = MTD_WRITEABLE, /* force read-only */
167 },
168 {
169 .name = "params",
170 .offset = MTDPART_OFS_APPEND,
171 .size = 192 * 1024,
172 },
173 {
174 .name = "kernel",
175 .offset = MTDPART_OFS_APPEND,
176 .size = 2 * SZ_1M,
177 },
178#endif
179 {
180 .name = "filesystem",
181 .size = MTDPART_SIZ_FULL,
182 .offset = MTDPART_OFS_APPEND,
183 },
184};
185
186#define H3_NAND_RB_GPIO_PIN 10
187
188static int nand_dev_ready(struct mtd_info *mtd)
189{
190 return gpio_get_value(H3_NAND_RB_GPIO_PIN);
191}
192
193static struct platform_nand_data nand_platdata = {
194 .chip = {
195 .nr_chips = 1,
196 .chip_offset = 0,
197 .nr_partitions = ARRAY_SIZE(nand_partitions),
198 .partitions = nand_partitions,
199 .options = NAND_SAMSUNG_LP_OPTIONS,
200 },
201 .ctrl = {
202 .cmd_ctrl = omap1_nand_cmd_ctl,
203 .dev_ready = nand_dev_ready,
204
205 },
206};
207
208static struct resource nand_resource = {
209 .flags = IORESOURCE_MEM,
210};
211
212static struct platform_device nand_device = {
213 .name = "gen_nand",
214 .id = 0,
215 .dev = {
216 .platform_data = &nand_platdata,
217 },
218 .num_resources = 1,
219 .resource = &nand_resource,
220};
221
222static struct smc91x_platdata smc91x_info = {
223 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
224 .leda = RPC_LED_100_10,
225 .ledb = RPC_LED_TX_RX,
226};
227
228static struct resource smc91x_resources[] = {
229 [0] = {
230 .start = OMAP1710_ETHR_START, /* Physical */
231 .end = OMAP1710_ETHR_START + 0xf,
232 .flags = IORESOURCE_MEM,
233 },
234 [1] = {
235 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
236 },
237};
238
239static struct platform_device smc91x_device = {
240 .name = "smc91x",
241 .id = 0,
242 .dev = {
243 .platform_data = &smc91x_info,
244 },
245 .num_resources = ARRAY_SIZE(smc91x_resources),
246 .resource = smc91x_resources,
247};
248
249static void __init h3_init_smc91x(void)
250{
251 omap_cfg_reg(W15_1710_GPIO40);
252 if (gpio_request(40, "SMC91x irq") < 0) {
253 printk("Error requesting gpio 40 for smc91x irq\n");
254 return;
255 }
256}
257
258#define GPTIMER_BASE 0xFFFB1400
259#define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
260#define GPTIMER_REGS_SIZE 0x46
261
262static struct resource intlat_resources[] = {
263 [0] = {
264 .start = GPTIMER_REGS(0), /* Physical */
265 .end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
266 .flags = IORESOURCE_MEM,
267 },
268 [1] = {
269 .start = INT_1610_GPTIMER1,
270 .end = INT_1610_GPTIMER1,
271 .flags = IORESOURCE_IRQ,
272 },
273};
274
275static struct platform_device intlat_device = {
276 .name = "omap_intlat",
277 .id = 0,
278 .num_resources = ARRAY_SIZE(intlat_resources),
279 .resource = intlat_resources,
280};
281
282static struct resource h3_kp_resources[] = {
283 [0] = {
284 .start = INT_KEYBOARD,
285 .end = INT_KEYBOARD,
286 .flags = IORESOURCE_IRQ,
287 },
288};
289
290static const struct matrix_keymap_data h3_keymap_data = {
291 .keymap = h3_keymap,
292 .keymap_size = ARRAY_SIZE(h3_keymap),
293};
294
295static struct omap_kp_platform_data h3_kp_data = {
296 .rows = 8,
297 .cols = 8,
298 .keymap_data = &h3_keymap_data,
299 .rep = true,
300 .delay = 9,
301 .dbounce = true,
302};
303
304static struct platform_device h3_kp_device = {
305 .name = "omap-keypad",
306 .id = -1,
307 .dev = {
308 .platform_data = &h3_kp_data,
309 },
310 .num_resources = ARRAY_SIZE(h3_kp_resources),
311 .resource = h3_kp_resources,
312};
313
314static struct platform_device h3_lcd_device = {
315 .name = "lcd_h3",
316 .id = -1,
317};
318
319static struct spi_board_info h3_spi_board_info[] __initdata = {
320 [0] = {
321 .modalias = "tsc2101",
322 .bus_num = 2,
323 .chip_select = 0,
324 .max_speed_hz = 16000000,
325 /* .platform_data = &tsc_platform_data, */
326 },
327};
328
329static struct gpio_led h3_gpio_led_pins[] = {
330 {
331 .name = "h3:red",
332 .default_trigger = "heartbeat",
333 .gpio = 3,
334 },
335 {
336 .name = "h3:green",
337 .default_trigger = "cpu0",
338 .gpio = OMAP_MPUIO(4),
339 },
340};
341
342static struct gpio_led_platform_data h3_gpio_led_data = {
343 .leds = h3_gpio_led_pins,
344 .num_leds = ARRAY_SIZE(h3_gpio_led_pins),
345};
346
347static struct platform_device h3_gpio_leds = {
348 .name = "leds-gpio",
349 .id = -1,
350 .dev = {
351 .platform_data = &h3_gpio_led_data,
352 },
353};
354
355static struct platform_device *devices[] __initdata = {
356 &nor_device,
357 &nand_device,
358 &smc91x_device,
359 &intlat_device,
360 &h3_kp_device,
361 &h3_lcd_device,
362 &h3_gpio_leds,
363};
364
365static struct omap_usb_config h3_usb_config __initdata = {
366 /* usb1 has a Mini-AB port and external isp1301 transceiver */
367 .otg = 2,
368
369#ifdef CONFIG_USB_GADGET_OMAP
370 .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
371#elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
372 /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
373 .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */
374#endif
375
376 .pins[1] = 3,
377};
378
379static struct omap_lcd_config h3_lcd_config __initdata = {
380 .ctrl_name = "internal",
381};
382
383static struct i2c_board_info __initdata h3_i2c_board_info[] = {
384 {
385 I2C_BOARD_INFO("tps65013", 0x48),
386 },
387 {
388 I2C_BOARD_INFO("isp1301_omap", 0x2d),
389 },
390};
391
392static void __init h3_init(void)
393{
394 h3_init_smc91x();
395
396 /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
397 * to address 0 by a dip switch), NAND on CS2B. The NAND driver will
398 * notice whether a NAND chip is enabled at probe time.
399 *
400 * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
401 * (which on H2 may be 16bit) on CS3. Try detecting that in code here,
402 * to avoid probing every possible flash configuration...
403 */
404 nor_resource.end = nor_resource.start = omap_cs3_phys();
405 nor_resource.end += SZ_32M - 1;
406
407 nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
408 nand_resource.end += SZ_4K - 1;
409 BUG_ON(gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0);
410 gpio_direction_input(H3_NAND_RB_GPIO_PIN);
411
412 /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
413 /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
414 omap_cfg_reg(V2_1710_GPIO10);
415
416 /* Mux pins for keypad */
417 omap_cfg_reg(F18_1610_KBC0);
418 omap_cfg_reg(D20_1610_KBC1);
419 omap_cfg_reg(D19_1610_KBC2);
420 omap_cfg_reg(E18_1610_KBC3);
421 omap_cfg_reg(C21_1610_KBC4);
422 omap_cfg_reg(G18_1610_KBR0);
423 omap_cfg_reg(F19_1610_KBR1);
424 omap_cfg_reg(H14_1610_KBR2);
425 omap_cfg_reg(E20_1610_KBR3);
426 omap_cfg_reg(E19_1610_KBR4);
427 omap_cfg_reg(N19_1610_KBR5);
428
429 /* GPIO based LEDs */
430 omap_cfg_reg(P18_1610_GPIO3);
431 omap_cfg_reg(MPUIO4);
432
433 smc91x_resources[1].start = gpio_to_irq(40);
434 smc91x_resources[1].end = gpio_to_irq(40);
435 platform_add_devices(devices, ARRAY_SIZE(devices));
436 h3_spi_board_info[0].irq = gpio_to_irq(H3_TS_GPIO);
437 spi_register_board_info(h3_spi_board_info,
438 ARRAY_SIZE(h3_spi_board_info));
439 omap_serial_init();
440 h3_i2c_board_info[1].irq = gpio_to_irq(14);
441 omap_register_i2c_bus(1, 100, h3_i2c_board_info,
442 ARRAY_SIZE(h3_i2c_board_info));
443 omap1_usb_init(&h3_usb_config);
444 h3_mmc_init();
445
446 omapfb_set_lcd_config(&h3_lcd_config);
447}
448
449MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
450 /* Maintainer: Texas Instruments, Inc. */
451 .atag_offset = 0x100,
452 .map_io = omap16xx_map_io,
453 .init_early = omap1_init_early,
454 .init_irq = omap1_init_irq,
455 .init_machine = h3_init,
456 .init_late = omap1_init_late,
457 .init_time = omap1_timer_init,
458 .restart = omap1_restart,
459MACHINE_END
1/*
2 * linux/arch/arm/mach-omap1/board-h3.c
3 *
4 * This file contains OMAP1710 H3 specific code.
5 *
6 * Copyright (C) 2004 Texas Instruments, Inc.
7 * Copyright (C) 2002 MontaVista Software, Inc.
8 * Copyright (C) 2001 RidgeRun, Inc.
9 * Author: RidgeRun, Inc.
10 * Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16#include <linux/gpio.h>
17#include <linux/types.h>
18#include <linux/init.h>
19#include <linux/major.h>
20#include <linux/kernel.h>
21#include <linux/platform_device.h>
22#include <linux/errno.h>
23#include <linux/workqueue.h>
24#include <linux/i2c.h>
25#include <linux/mtd/mtd.h>
26#include <linux/mtd/nand.h>
27#include <linux/mtd/partitions.h>
28#include <linux/mtd/physmap.h>
29#include <linux/input.h>
30#include <linux/spi/spi.h>
31#include <linux/i2c/tps65010.h>
32#include <linux/smc91x.h>
33#include <linux/omapfb.h>
34
35#include <asm/setup.h>
36#include <asm/page.h>
37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
39#include <asm/mach/map.h>
40
41#include <plat/mux.h>
42#include <plat/tc.h>
43#include <plat/usb.h>
44#include <plat/keypad.h>
45#include <plat/dma.h>
46#include <plat/flash.h>
47
48#include <mach/hardware.h>
49#include <mach/irqs.h>
50
51#include "common.h"
52#include "board-h3.h"
53
54/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
55#define OMAP1710_ETHR_START 0x04000300
56
57#define H3_TS_GPIO 48
58
59static const unsigned int h3_keymap[] = {
60 KEY(0, 0, KEY_LEFT),
61 KEY(1, 0, KEY_RIGHT),
62 KEY(2, 0, KEY_3),
63 KEY(3, 0, KEY_F10),
64 KEY(4, 0, KEY_F5),
65 KEY(5, 0, KEY_9),
66 KEY(0, 1, KEY_DOWN),
67 KEY(1, 1, KEY_UP),
68 KEY(2, 1, KEY_2),
69 KEY(3, 1, KEY_F9),
70 KEY(4, 1, KEY_F7),
71 KEY(5, 1, KEY_0),
72 KEY(0, 2, KEY_ENTER),
73 KEY(1, 2, KEY_6),
74 KEY(2, 2, KEY_1),
75 KEY(3, 2, KEY_F2),
76 KEY(4, 2, KEY_F6),
77 KEY(5, 2, KEY_HOME),
78 KEY(0, 3, KEY_8),
79 KEY(1, 3, KEY_5),
80 KEY(2, 3, KEY_F12),
81 KEY(3, 3, KEY_F3),
82 KEY(4, 3, KEY_F8),
83 KEY(5, 3, KEY_END),
84 KEY(0, 4, KEY_7),
85 KEY(1, 4, KEY_4),
86 KEY(2, 4, KEY_F11),
87 KEY(3, 4, KEY_F1),
88 KEY(4, 4, KEY_F4),
89 KEY(5, 4, KEY_ESC),
90 KEY(0, 5, KEY_F13),
91 KEY(1, 5, KEY_F14),
92 KEY(2, 5, KEY_F15),
93 KEY(3, 5, KEY_F16),
94 KEY(4, 5, KEY_SLEEP),
95};
96
97
98static struct mtd_partition nor_partitions[] = {
99 /* bootloader (U-Boot, etc) in first sector */
100 {
101 .name = "bootloader",
102 .offset = 0,
103 .size = SZ_128K,
104 .mask_flags = MTD_WRITEABLE, /* force read-only */
105 },
106 /* bootloader params in the next sector */
107 {
108 .name = "params",
109 .offset = MTDPART_OFS_APPEND,
110 .size = SZ_128K,
111 .mask_flags = 0,
112 },
113 /* kernel */
114 {
115 .name = "kernel",
116 .offset = MTDPART_OFS_APPEND,
117 .size = SZ_2M,
118 .mask_flags = 0
119 },
120 /* file system */
121 {
122 .name = "filesystem",
123 .offset = MTDPART_OFS_APPEND,
124 .size = MTDPART_SIZ_FULL,
125 .mask_flags = 0
126 }
127};
128
129static struct physmap_flash_data nor_data = {
130 .width = 2,
131 .set_vpp = omap1_set_vpp,
132 .parts = nor_partitions,
133 .nr_parts = ARRAY_SIZE(nor_partitions),
134};
135
136static struct resource nor_resource = {
137 /* This is on CS3, wherever it's mapped */
138 .flags = IORESOURCE_MEM,
139};
140
141static struct platform_device nor_device = {
142 .name = "physmap-flash",
143 .id = 0,
144 .dev = {
145 .platform_data = &nor_data,
146 },
147 .num_resources = 1,
148 .resource = &nor_resource,
149};
150
151static struct mtd_partition nand_partitions[] = {
152#if 0
153 /* REVISIT: enable these partitions if you make NAND BOOT work */
154 {
155 .name = "xloader",
156 .offset = 0,
157 .size = 64 * 1024,
158 .mask_flags = MTD_WRITEABLE, /* force read-only */
159 },
160 {
161 .name = "bootloader",
162 .offset = MTDPART_OFS_APPEND,
163 .size = 256 * 1024,
164 .mask_flags = MTD_WRITEABLE, /* force read-only */
165 },
166 {
167 .name = "params",
168 .offset = MTDPART_OFS_APPEND,
169 .size = 192 * 1024,
170 },
171 {
172 .name = "kernel",
173 .offset = MTDPART_OFS_APPEND,
174 .size = 2 * SZ_1M,
175 },
176#endif
177 {
178 .name = "filesystem",
179 .size = MTDPART_SIZ_FULL,
180 .offset = MTDPART_OFS_APPEND,
181 },
182};
183
184#define H3_NAND_RB_GPIO_PIN 10
185
186static int nand_dev_ready(struct mtd_info *mtd)
187{
188 return gpio_get_value(H3_NAND_RB_GPIO_PIN);
189}
190
191static struct platform_nand_data nand_platdata = {
192 .chip = {
193 .nr_chips = 1,
194 .chip_offset = 0,
195 .nr_partitions = ARRAY_SIZE(nand_partitions),
196 .partitions = nand_partitions,
197 .options = NAND_SAMSUNG_LP_OPTIONS,
198 },
199 .ctrl = {
200 .cmd_ctrl = omap1_nand_cmd_ctl,
201 .dev_ready = nand_dev_ready,
202
203 },
204};
205
206static struct resource nand_resource = {
207 .flags = IORESOURCE_MEM,
208};
209
210static struct platform_device nand_device = {
211 .name = "gen_nand",
212 .id = 0,
213 .dev = {
214 .platform_data = &nand_platdata,
215 },
216 .num_resources = 1,
217 .resource = &nand_resource,
218};
219
220static struct smc91x_platdata smc91x_info = {
221 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
222 .leda = RPC_LED_100_10,
223 .ledb = RPC_LED_TX_RX,
224};
225
226static struct resource smc91x_resources[] = {
227 [0] = {
228 .start = OMAP1710_ETHR_START, /* Physical */
229 .end = OMAP1710_ETHR_START + 0xf,
230 .flags = IORESOURCE_MEM,
231 },
232 [1] = {
233 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
234 },
235};
236
237static struct platform_device smc91x_device = {
238 .name = "smc91x",
239 .id = 0,
240 .dev = {
241 .platform_data = &smc91x_info,
242 },
243 .num_resources = ARRAY_SIZE(smc91x_resources),
244 .resource = smc91x_resources,
245};
246
247static void __init h3_init_smc91x(void)
248{
249 omap_cfg_reg(W15_1710_GPIO40);
250 if (gpio_request(40, "SMC91x irq") < 0) {
251 printk("Error requesting gpio 40 for smc91x irq\n");
252 return;
253 }
254}
255
256#define GPTIMER_BASE 0xFFFB1400
257#define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
258#define GPTIMER_REGS_SIZE 0x46
259
260static struct resource intlat_resources[] = {
261 [0] = {
262 .start = GPTIMER_REGS(0), /* Physical */
263 .end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
264 .flags = IORESOURCE_MEM,
265 },
266 [1] = {
267 .start = INT_1610_GPTIMER1,
268 .end = INT_1610_GPTIMER1,
269 .flags = IORESOURCE_IRQ,
270 },
271};
272
273static struct platform_device intlat_device = {
274 .name = "omap_intlat",
275 .id = 0,
276 .num_resources = ARRAY_SIZE(intlat_resources),
277 .resource = intlat_resources,
278};
279
280static struct resource h3_kp_resources[] = {
281 [0] = {
282 .start = INT_KEYBOARD,
283 .end = INT_KEYBOARD,
284 .flags = IORESOURCE_IRQ,
285 },
286};
287
288static const struct matrix_keymap_data h3_keymap_data = {
289 .keymap = h3_keymap,
290 .keymap_size = ARRAY_SIZE(h3_keymap),
291};
292
293static struct omap_kp_platform_data h3_kp_data = {
294 .rows = 8,
295 .cols = 8,
296 .keymap_data = &h3_keymap_data,
297 .rep = true,
298 .delay = 9,
299 .dbounce = true,
300};
301
302static struct platform_device h3_kp_device = {
303 .name = "omap-keypad",
304 .id = -1,
305 .dev = {
306 .platform_data = &h3_kp_data,
307 },
308 .num_resources = ARRAY_SIZE(h3_kp_resources),
309 .resource = h3_kp_resources,
310};
311
312static struct platform_device h3_lcd_device = {
313 .name = "lcd_h3",
314 .id = -1,
315};
316
317static struct spi_board_info h3_spi_board_info[] __initdata = {
318 [0] = {
319 .modalias = "tsc2101",
320 .bus_num = 2,
321 .chip_select = 0,
322 .max_speed_hz = 16000000,
323 /* .platform_data = &tsc_platform_data, */
324 },
325};
326
327static struct platform_device *devices[] __initdata = {
328 &nor_device,
329 &nand_device,
330 &smc91x_device,
331 &intlat_device,
332 &h3_kp_device,
333 &h3_lcd_device,
334};
335
336static struct omap_usb_config h3_usb_config __initdata = {
337 /* usb1 has a Mini-AB port and external isp1301 transceiver */
338 .otg = 2,
339
340#ifdef CONFIG_USB_GADGET_OMAP
341 .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
342#elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
343 /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
344 .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */
345#endif
346
347 .pins[1] = 3,
348};
349
350static struct omap_lcd_config h3_lcd_config __initdata = {
351 .ctrl_name = "internal",
352};
353
354static struct i2c_board_info __initdata h3_i2c_board_info[] = {
355 {
356 I2C_BOARD_INFO("tps65013", 0x48),
357 },
358 {
359 I2C_BOARD_INFO("isp1301_omap", 0x2d),
360 },
361};
362
363static void __init h3_init(void)
364{
365 h3_init_smc91x();
366
367 /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
368 * to address 0 by a dip switch), NAND on CS2B. The NAND driver will
369 * notice whether a NAND chip is enabled at probe time.
370 *
371 * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
372 * (which on H2 may be 16bit) on CS3. Try detecting that in code here,
373 * to avoid probing every possible flash configuration...
374 */
375 nor_resource.end = nor_resource.start = omap_cs3_phys();
376 nor_resource.end += SZ_32M - 1;
377
378 nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
379 nand_resource.end += SZ_4K - 1;
380 if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
381 BUG();
382 gpio_direction_input(H3_NAND_RB_GPIO_PIN);
383
384 /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
385 /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
386 omap_cfg_reg(V2_1710_GPIO10);
387
388 /* Mux pins for keypad */
389 omap_cfg_reg(F18_1610_KBC0);
390 omap_cfg_reg(D20_1610_KBC1);
391 omap_cfg_reg(D19_1610_KBC2);
392 omap_cfg_reg(E18_1610_KBC3);
393 omap_cfg_reg(C21_1610_KBC4);
394 omap_cfg_reg(G18_1610_KBR0);
395 omap_cfg_reg(F19_1610_KBR1);
396 omap_cfg_reg(H14_1610_KBR2);
397 omap_cfg_reg(E20_1610_KBR3);
398 omap_cfg_reg(E19_1610_KBR4);
399 omap_cfg_reg(N19_1610_KBR5);
400
401 smc91x_resources[1].start = gpio_to_irq(40);
402 smc91x_resources[1].end = gpio_to_irq(40);
403 platform_add_devices(devices, ARRAY_SIZE(devices));
404 h3_spi_board_info[0].irq = gpio_to_irq(H3_TS_GPIO);
405 spi_register_board_info(h3_spi_board_info,
406 ARRAY_SIZE(h3_spi_board_info));
407 omap_serial_init();
408 h3_i2c_board_info[1].irq = gpio_to_irq(14);
409 omap_register_i2c_bus(1, 100, h3_i2c_board_info,
410 ARRAY_SIZE(h3_i2c_board_info));
411 omap1_usb_init(&h3_usb_config);
412 h3_mmc_init();
413
414 omapfb_set_lcd_config(&h3_lcd_config);
415}
416
417MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
418 /* Maintainer: Texas Instruments, Inc. */
419 .atag_offset = 0x100,
420 .map_io = omap16xx_map_io,
421 .init_early = omap1_init_early,
422 .reserve = omap_reserve,
423 .init_irq = omap1_init_irq,
424 .init_machine = h3_init,
425 .init_late = omap1_init_late,
426 .timer = &omap1_timer,
427 .restart = omap1_restart,
428MACHINE_END