Loading...
1#ifndef ASMARM_DMA_MAPPING_H
2#define ASMARM_DMA_MAPPING_H
3
4#ifdef __KERNEL__
5
6#include <linux/mm_types.h>
7#include <linux/scatterlist.h>
8#include <linux/dma-attrs.h>
9#include <linux/dma-debug.h>
10
11#include <asm-generic/dma-coherent.h>
12#include <asm/memory.h>
13
14#include <xen/xen.h>
15#include <asm/xen/hypervisor.h>
16
17#define DMA_ERROR_CODE (~0)
18extern struct dma_map_ops arm_dma_ops;
19extern struct dma_map_ops arm_coherent_dma_ops;
20
21static inline struct dma_map_ops *__generic_dma_ops(struct device *dev)
22{
23 if (dev && dev->archdata.dma_ops)
24 return dev->archdata.dma_ops;
25 return &arm_dma_ops;
26}
27
28static inline struct dma_map_ops *get_dma_ops(struct device *dev)
29{
30 if (xen_initial_domain())
31 return xen_dma_ops;
32 else
33 return __generic_dma_ops(dev);
34}
35
36static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
37{
38 BUG_ON(!dev);
39 dev->archdata.dma_ops = ops;
40}
41
42#include <asm-generic/dma-mapping-common.h>
43
44static inline int dma_set_mask(struct device *dev, u64 mask)
45{
46 return get_dma_ops(dev)->set_dma_mask(dev, mask);
47}
48
49#ifdef __arch_page_to_dma
50#error Please update to __arch_pfn_to_dma
51#endif
52
53/*
54 * dma_to_pfn/pfn_to_dma/dma_to_virt/virt_to_dma are architecture private
55 * functions used internally by the DMA-mapping API to provide DMA
56 * addresses. They must not be used by drivers.
57 */
58#ifndef __arch_pfn_to_dma
59static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
60{
61 return (dma_addr_t)__pfn_to_bus(pfn);
62}
63
64static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
65{
66 return __bus_to_pfn(addr);
67}
68
69static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
70{
71 return (void *)__bus_to_virt((unsigned long)addr);
72}
73
74static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
75{
76 return (dma_addr_t)__virt_to_bus((unsigned long)(addr));
77}
78
79#else
80static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
81{
82 return __arch_pfn_to_dma(dev, pfn);
83}
84
85static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
86{
87 return __arch_dma_to_pfn(dev, addr);
88}
89
90static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
91{
92 return __arch_dma_to_virt(dev, addr);
93}
94
95static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
96{
97 return __arch_virt_to_dma(dev, addr);
98}
99#endif
100
101/* The ARM override for dma_max_pfn() */
102static inline unsigned long dma_max_pfn(struct device *dev)
103{
104 return PHYS_PFN_OFFSET + dma_to_pfn(dev, *dev->dma_mask);
105}
106#define dma_max_pfn(dev) dma_max_pfn(dev)
107
108static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
109{
110 unsigned int offset = paddr & ~PAGE_MASK;
111 return pfn_to_dma(dev, __phys_to_pfn(paddr)) + offset;
112}
113
114static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr)
115{
116 unsigned int offset = dev_addr & ~PAGE_MASK;
117 return __pfn_to_phys(dma_to_pfn(dev, dev_addr)) + offset;
118}
119
120static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
121{
122 u64 limit, mask;
123
124 if (!dev->dma_mask)
125 return 0;
126
127 mask = *dev->dma_mask;
128
129 limit = (mask + 1) & ~mask;
130 if (limit && size > limit)
131 return 0;
132
133 if ((addr | (addr + size - 1)) & ~mask)
134 return 0;
135
136 return 1;
137}
138
139static inline void dma_mark_clean(void *addr, size_t size) { }
140
141/*
142 * DMA errors are defined by all-bits-set in the DMA address.
143 */
144static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
145{
146 debug_dma_mapping_error(dev, dma_addr);
147 return dma_addr == DMA_ERROR_CODE;
148}
149
150/*
151 * Dummy noncoherent implementation. We don't provide a dma_cache_sync
152 * function so drivers using this API are highlighted with build warnings.
153 */
154static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
155 dma_addr_t *handle, gfp_t gfp)
156{
157 return NULL;
158}
159
160static inline void dma_free_noncoherent(struct device *dev, size_t size,
161 void *cpu_addr, dma_addr_t handle)
162{
163}
164
165extern int dma_supported(struct device *dev, u64 mask);
166
167extern int arm_dma_set_mask(struct device *dev, u64 dma_mask);
168
169/**
170 * arm_dma_alloc - allocate consistent memory for DMA
171 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
172 * @size: required memory size
173 * @handle: bus-specific DMA address
174 * @attrs: optinal attributes that specific mapping properties
175 *
176 * Allocate some memory for a device for performing DMA. This function
177 * allocates pages, and will return the CPU-viewed address, and sets @handle
178 * to be the device-viewed address.
179 */
180extern void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
181 gfp_t gfp, struct dma_attrs *attrs);
182
183#define dma_alloc_coherent(d, s, h, f) dma_alloc_attrs(d, s, h, f, NULL)
184
185static inline void *dma_alloc_attrs(struct device *dev, size_t size,
186 dma_addr_t *dma_handle, gfp_t flag,
187 struct dma_attrs *attrs)
188{
189 struct dma_map_ops *ops = get_dma_ops(dev);
190 void *cpu_addr;
191 BUG_ON(!ops);
192
193 cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
194 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
195 return cpu_addr;
196}
197
198/**
199 * arm_dma_free - free memory allocated by arm_dma_alloc
200 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
201 * @size: size of memory originally requested in dma_alloc_coherent
202 * @cpu_addr: CPU-view address returned from dma_alloc_coherent
203 * @handle: device-view address returned from dma_alloc_coherent
204 * @attrs: optinal attributes that specific mapping properties
205 *
206 * Free (and unmap) a DMA buffer previously allocated by
207 * arm_dma_alloc().
208 *
209 * References to memory and mappings associated with cpu_addr/handle
210 * during and after this call executing are illegal.
211 */
212extern void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
213 dma_addr_t handle, struct dma_attrs *attrs);
214
215#define dma_free_coherent(d, s, c, h) dma_free_attrs(d, s, c, h, NULL)
216
217static inline void dma_free_attrs(struct device *dev, size_t size,
218 void *cpu_addr, dma_addr_t dma_handle,
219 struct dma_attrs *attrs)
220{
221 struct dma_map_ops *ops = get_dma_ops(dev);
222 BUG_ON(!ops);
223
224 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
225 ops->free(dev, size, cpu_addr, dma_handle, attrs);
226}
227
228/**
229 * arm_dma_mmap - map a coherent DMA allocation into user space
230 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
231 * @vma: vm_area_struct describing requested user mapping
232 * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
233 * @handle: device-view address returned from dma_alloc_coherent
234 * @size: size of memory originally requested in dma_alloc_coherent
235 * @attrs: optinal attributes that specific mapping properties
236 *
237 * Map a coherent DMA buffer previously allocated by dma_alloc_coherent
238 * into user space. The coherent DMA buffer must not be freed by the
239 * driver until the user space mapping has been released.
240 */
241extern int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
242 void *cpu_addr, dma_addr_t dma_addr, size_t size,
243 struct dma_attrs *attrs);
244
245static inline void *dma_alloc_writecombine(struct device *dev, size_t size,
246 dma_addr_t *dma_handle, gfp_t flag)
247{
248 DEFINE_DMA_ATTRS(attrs);
249 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
250 return dma_alloc_attrs(dev, size, dma_handle, flag, &attrs);
251}
252
253static inline void dma_free_writecombine(struct device *dev, size_t size,
254 void *cpu_addr, dma_addr_t dma_handle)
255{
256 DEFINE_DMA_ATTRS(attrs);
257 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
258 return dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs);
259}
260
261/*
262 * This can be called during early boot to increase the size of the atomic
263 * coherent DMA pool above the default value of 256KiB. It must be called
264 * before postcore_initcall.
265 */
266extern void __init init_dma_coherent_pool_size(unsigned long size);
267
268/*
269 * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
270 * and utilize bounce buffers as needed to work around limited DMA windows.
271 *
272 * On the SA-1111, a bug limits DMA to only certain regions of RAM.
273 * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
274 * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
275 *
276 * The following are helper functions used by the dmabounce subystem
277 *
278 */
279
280/**
281 * dmabounce_register_dev
282 *
283 * @dev: valid struct device pointer
284 * @small_buf_size: size of buffers to use with small buffer pool
285 * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
286 * @needs_bounce_fn: called to determine whether buffer needs bouncing
287 *
288 * This function should be called by low-level platform code to register
289 * a device as requireing DMA buffer bouncing. The function will allocate
290 * appropriate DMA pools for the device.
291 */
292extern int dmabounce_register_dev(struct device *, unsigned long,
293 unsigned long, int (*)(struct device *, dma_addr_t, size_t));
294
295/**
296 * dmabounce_unregister_dev
297 *
298 * @dev: valid struct device pointer
299 *
300 * This function should be called by low-level platform code when device
301 * that was previously registered with dmabounce_register_dev is removed
302 * from the system.
303 *
304 */
305extern void dmabounce_unregister_dev(struct device *);
306
307
308
309/*
310 * The scatter list versions of the above methods.
311 */
312extern int arm_dma_map_sg(struct device *, struct scatterlist *, int,
313 enum dma_data_direction, struct dma_attrs *attrs);
314extern void arm_dma_unmap_sg(struct device *, struct scatterlist *, int,
315 enum dma_data_direction, struct dma_attrs *attrs);
316extern void arm_dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int,
317 enum dma_data_direction);
318extern void arm_dma_sync_sg_for_device(struct device *, struct scatterlist *, int,
319 enum dma_data_direction);
320extern int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
321 void *cpu_addr, dma_addr_t dma_addr, size_t size,
322 struct dma_attrs *attrs);
323
324#endif /* __KERNEL__ */
325#endif
1#ifndef ASMARM_DMA_MAPPING_H
2#define ASMARM_DMA_MAPPING_H
3
4#ifdef __KERNEL__
5
6#include <linux/mm_types.h>
7#include <linux/scatterlist.h>
8#include <linux/dma-attrs.h>
9#include <linux/dma-debug.h>
10
11#include <asm-generic/dma-coherent.h>
12#include <asm/memory.h>
13
14#define DMA_ERROR_CODE (~0)
15extern struct dma_map_ops arm_dma_ops;
16
17static inline struct dma_map_ops *get_dma_ops(struct device *dev)
18{
19 if (dev && dev->archdata.dma_ops)
20 return dev->archdata.dma_ops;
21 return &arm_dma_ops;
22}
23
24static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
25{
26 BUG_ON(!dev);
27 dev->archdata.dma_ops = ops;
28}
29
30#include <asm-generic/dma-mapping-common.h>
31
32static inline int dma_set_mask(struct device *dev, u64 mask)
33{
34 return get_dma_ops(dev)->set_dma_mask(dev, mask);
35}
36
37#ifdef __arch_page_to_dma
38#error Please update to __arch_pfn_to_dma
39#endif
40
41/*
42 * dma_to_pfn/pfn_to_dma/dma_to_virt/virt_to_dma are architecture private
43 * functions used internally by the DMA-mapping API to provide DMA
44 * addresses. They must not be used by drivers.
45 */
46#ifndef __arch_pfn_to_dma
47static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
48{
49 return (dma_addr_t)__pfn_to_bus(pfn);
50}
51
52static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
53{
54 return __bus_to_pfn(addr);
55}
56
57static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
58{
59 return (void *)__bus_to_virt((unsigned long)addr);
60}
61
62static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
63{
64 return (dma_addr_t)__virt_to_bus((unsigned long)(addr));
65}
66#else
67static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
68{
69 return __arch_pfn_to_dma(dev, pfn);
70}
71
72static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
73{
74 return __arch_dma_to_pfn(dev, addr);
75}
76
77static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
78{
79 return __arch_dma_to_virt(dev, addr);
80}
81
82static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
83{
84 return __arch_virt_to_dma(dev, addr);
85}
86#endif
87
88/*
89 * DMA errors are defined by all-bits-set in the DMA address.
90 */
91static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
92{
93 return dma_addr == DMA_ERROR_CODE;
94}
95
96/*
97 * Dummy noncoherent implementation. We don't provide a dma_cache_sync
98 * function so drivers using this API are highlighted with build warnings.
99 */
100static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
101 dma_addr_t *handle, gfp_t gfp)
102{
103 return NULL;
104}
105
106static inline void dma_free_noncoherent(struct device *dev, size_t size,
107 void *cpu_addr, dma_addr_t handle)
108{
109}
110
111extern int dma_supported(struct device *dev, u64 mask);
112
113/**
114 * arm_dma_alloc - allocate consistent memory for DMA
115 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
116 * @size: required memory size
117 * @handle: bus-specific DMA address
118 * @attrs: optinal attributes that specific mapping properties
119 *
120 * Allocate some memory for a device for performing DMA. This function
121 * allocates pages, and will return the CPU-viewed address, and sets @handle
122 * to be the device-viewed address.
123 */
124extern void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
125 gfp_t gfp, struct dma_attrs *attrs);
126
127#define dma_alloc_coherent(d, s, h, f) dma_alloc_attrs(d, s, h, f, NULL)
128
129static inline void *dma_alloc_attrs(struct device *dev, size_t size,
130 dma_addr_t *dma_handle, gfp_t flag,
131 struct dma_attrs *attrs)
132{
133 struct dma_map_ops *ops = get_dma_ops(dev);
134 void *cpu_addr;
135 BUG_ON(!ops);
136
137 cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
138 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
139 return cpu_addr;
140}
141
142/**
143 * arm_dma_free - free memory allocated by arm_dma_alloc
144 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
145 * @size: size of memory originally requested in dma_alloc_coherent
146 * @cpu_addr: CPU-view address returned from dma_alloc_coherent
147 * @handle: device-view address returned from dma_alloc_coherent
148 * @attrs: optinal attributes that specific mapping properties
149 *
150 * Free (and unmap) a DMA buffer previously allocated by
151 * arm_dma_alloc().
152 *
153 * References to memory and mappings associated with cpu_addr/handle
154 * during and after this call executing are illegal.
155 */
156extern void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
157 dma_addr_t handle, struct dma_attrs *attrs);
158
159#define dma_free_coherent(d, s, c, h) dma_free_attrs(d, s, c, h, NULL)
160
161static inline void dma_free_attrs(struct device *dev, size_t size,
162 void *cpu_addr, dma_addr_t dma_handle,
163 struct dma_attrs *attrs)
164{
165 struct dma_map_ops *ops = get_dma_ops(dev);
166 BUG_ON(!ops);
167
168 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
169 ops->free(dev, size, cpu_addr, dma_handle, attrs);
170}
171
172/**
173 * arm_dma_mmap - map a coherent DMA allocation into user space
174 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
175 * @vma: vm_area_struct describing requested user mapping
176 * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
177 * @handle: device-view address returned from dma_alloc_coherent
178 * @size: size of memory originally requested in dma_alloc_coherent
179 * @attrs: optinal attributes that specific mapping properties
180 *
181 * Map a coherent DMA buffer previously allocated by dma_alloc_coherent
182 * into user space. The coherent DMA buffer must not be freed by the
183 * driver until the user space mapping has been released.
184 */
185extern int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
186 void *cpu_addr, dma_addr_t dma_addr, size_t size,
187 struct dma_attrs *attrs);
188
189#define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, NULL)
190
191static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
192 void *cpu_addr, dma_addr_t dma_addr,
193 size_t size, struct dma_attrs *attrs)
194{
195 struct dma_map_ops *ops = get_dma_ops(dev);
196 BUG_ON(!ops);
197 return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
198}
199
200static inline void *dma_alloc_writecombine(struct device *dev, size_t size,
201 dma_addr_t *dma_handle, gfp_t flag)
202{
203 DEFINE_DMA_ATTRS(attrs);
204 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
205 return dma_alloc_attrs(dev, size, dma_handle, flag, &attrs);
206}
207
208static inline void dma_free_writecombine(struct device *dev, size_t size,
209 void *cpu_addr, dma_addr_t dma_handle)
210{
211 DEFINE_DMA_ATTRS(attrs);
212 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
213 return dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs);
214}
215
216static inline int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
217 void *cpu_addr, dma_addr_t dma_addr, size_t size)
218{
219 DEFINE_DMA_ATTRS(attrs);
220 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
221 return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, &attrs);
222}
223
224/*
225 * This can be called during boot to increase the size of the consistent
226 * DMA region above it's default value of 2MB. It must be called before the
227 * memory allocator is initialised, i.e. before any core_initcall.
228 */
229extern void __init init_consistent_dma_size(unsigned long size);
230
231/*
232 * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
233 * and utilize bounce buffers as needed to work around limited DMA windows.
234 *
235 * On the SA-1111, a bug limits DMA to only certain regions of RAM.
236 * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
237 * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
238 *
239 * The following are helper functions used by the dmabounce subystem
240 *
241 */
242
243/**
244 * dmabounce_register_dev
245 *
246 * @dev: valid struct device pointer
247 * @small_buf_size: size of buffers to use with small buffer pool
248 * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
249 * @needs_bounce_fn: called to determine whether buffer needs bouncing
250 *
251 * This function should be called by low-level platform code to register
252 * a device as requireing DMA buffer bouncing. The function will allocate
253 * appropriate DMA pools for the device.
254 */
255extern int dmabounce_register_dev(struct device *, unsigned long,
256 unsigned long, int (*)(struct device *, dma_addr_t, size_t));
257
258/**
259 * dmabounce_unregister_dev
260 *
261 * @dev: valid struct device pointer
262 *
263 * This function should be called by low-level platform code when device
264 * that was previously registered with dmabounce_register_dev is removed
265 * from the system.
266 *
267 */
268extern void dmabounce_unregister_dev(struct device *);
269
270
271
272/*
273 * The scatter list versions of the above methods.
274 */
275extern int arm_dma_map_sg(struct device *, struct scatterlist *, int,
276 enum dma_data_direction, struct dma_attrs *attrs);
277extern void arm_dma_unmap_sg(struct device *, struct scatterlist *, int,
278 enum dma_data_direction, struct dma_attrs *attrs);
279extern void arm_dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int,
280 enum dma_data_direction);
281extern void arm_dma_sync_sg_for_device(struct device *, struct scatterlist *, int,
282 enum dma_data_direction);
283
284#endif /* __KERNEL__ */
285#endif