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1/*
2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/sched.h>
16#include <linux/kernel.h>
17#include <linux/kprobes.h>
18#include <linux/kdebug.h>
19#include <linux/module.h>
20#include <linux/reboot.h>
21#include <linux/uaccess.h>
22#include <linux/ptrace.h>
23#include <asm/stack.h>
24#include <asm/traps.h>
25#include <asm/setup.h>
26
27#include <arch/interrupts.h>
28#include <arch/spr_def.h>
29#include <arch/opcode.h>
30
31void __init trap_init(void)
32{
33 /* Nothing needed here since we link code at .intrpt */
34}
35
36int unaligned_fixup = 1;
37
38static int __init setup_unaligned_fixup(char *str)
39{
40 /*
41 * Say "=-1" to completely disable it. If you just do "=0", we
42 * will still parse the instruction, then fire a SIGBUS with
43 * the correct address from inside the single_step code.
44 */
45 long val;
46 if (strict_strtol(str, 0, &val) != 0)
47 return 0;
48 unaligned_fixup = val;
49 pr_info("Fixups for unaligned data accesses are %s\n",
50 unaligned_fixup >= 0 ?
51 (unaligned_fixup ? "enabled" : "disabled") :
52 "completely disabled");
53 return 1;
54}
55__setup("unaligned_fixup=", setup_unaligned_fixup);
56
57#if CHIP_HAS_TILE_DMA()
58
59static int dma_disabled;
60
61static int __init nodma(char *str)
62{
63 pr_info("User-space DMA is disabled\n");
64 dma_disabled = 1;
65 return 1;
66}
67__setup("nodma", nodma);
68
69/* How to decode SPR_GPV_REASON */
70#define IRET_ERROR (1U << 31)
71#define MT_ERROR (1U << 30)
72#define MF_ERROR (1U << 29)
73#define SPR_INDEX ((1U << 15) - 1)
74#define SPR_MPL_SHIFT 9 /* starting bit position for MPL encoded in SPR */
75
76/*
77 * See if this GPV is just to notify the kernel of SPR use and we can
78 * retry the user instruction after adjusting some MPLs suitably.
79 */
80static int retry_gpv(unsigned int gpv_reason)
81{
82 int mpl;
83
84 if (gpv_reason & IRET_ERROR)
85 return 0;
86
87 BUG_ON((gpv_reason & (MT_ERROR|MF_ERROR)) == 0);
88 mpl = (gpv_reason & SPR_INDEX) >> SPR_MPL_SHIFT;
89 if (mpl == INT_DMA_NOTIFY && !dma_disabled) {
90 /* User is turning on DMA. Allow it and retry. */
91 printk(KERN_DEBUG "Process %d/%s is now enabled for DMA\n",
92 current->pid, current->comm);
93 BUG_ON(current->thread.tile_dma_state.enabled);
94 current->thread.tile_dma_state.enabled = 1;
95 grant_dma_mpls();
96 return 1;
97 }
98
99 return 0;
100}
101
102#endif /* CHIP_HAS_TILE_DMA() */
103
104extern tile_bundle_bits bpt_code;
105
106asm(".pushsection .rodata.bpt_code,\"a\";"
107 ".align 8;"
108 "bpt_code: bpt;"
109 ".size bpt_code,.-bpt_code;"
110 ".popsection");
111
112static int special_ill(tile_bundle_bits bundle, int *sigp, int *codep)
113{
114 int sig, code, maxcode;
115
116 if (bundle == bpt_code) {
117 *sigp = SIGTRAP;
118 *codep = TRAP_BRKPT;
119 return 1;
120 }
121
122 /* If it's a "raise" bundle, then "ill" must be in pipe X1. */
123#ifdef __tilegx__
124 if ((bundle & TILEGX_BUNDLE_MODE_MASK) != 0)
125 return 0;
126 if (get_Opcode_X1(bundle) != RRR_0_OPCODE_X1)
127 return 0;
128 if (get_RRROpcodeExtension_X1(bundle) != UNARY_RRR_0_OPCODE_X1)
129 return 0;
130 if (get_UnaryOpcodeExtension_X1(bundle) != ILL_UNARY_OPCODE_X1)
131 return 0;
132#else
133 if (bundle & TILEPRO_BUNDLE_Y_ENCODING_MASK)
134 return 0;
135 if (get_Opcode_X1(bundle) != SHUN_0_OPCODE_X1)
136 return 0;
137 if (get_UnShOpcodeExtension_X1(bundle) != UN_0_SHUN_0_OPCODE_X1)
138 return 0;
139 if (get_UnOpcodeExtension_X1(bundle) != ILL_UN_0_SHUN_0_OPCODE_X1)
140 return 0;
141#endif
142
143 /* Check that the magic distinguishers are set to mean "raise". */
144 if (get_Dest_X1(bundle) != 29 || get_SrcA_X1(bundle) != 37)
145 return 0;
146
147 /* There must be an "addli zero, zero, VAL" in X0. */
148 if (get_Opcode_X0(bundle) != ADDLI_OPCODE_X0)
149 return 0;
150 if (get_Dest_X0(bundle) != TREG_ZERO)
151 return 0;
152 if (get_SrcA_X0(bundle) != TREG_ZERO)
153 return 0;
154
155 /*
156 * Validate the proposed signal number and si_code value.
157 * Note that we embed these in the static instruction itself
158 * so that we perturb the register state as little as possible
159 * at the time of the actual fault; it's unlikely you'd ever
160 * need to dynamically choose which kind of fault to raise
161 * from user space.
162 */
163 sig = get_Imm16_X0(bundle) & 0x3f;
164 switch (sig) {
165 case SIGILL:
166 maxcode = NSIGILL;
167 break;
168 case SIGFPE:
169 maxcode = NSIGFPE;
170 break;
171 case SIGSEGV:
172 maxcode = NSIGSEGV;
173 break;
174 case SIGBUS:
175 maxcode = NSIGBUS;
176 break;
177 case SIGTRAP:
178 maxcode = NSIGTRAP;
179 break;
180 default:
181 return 0;
182 }
183 code = (get_Imm16_X0(bundle) >> 6) & 0xf;
184 if (code <= 0 || code > maxcode)
185 return 0;
186
187 /* Make it the requested signal. */
188 *sigp = sig;
189 *codep = code | __SI_FAULT;
190 return 1;
191}
192
193static const char *const int_name[] = {
194 [INT_MEM_ERROR] = "Memory error",
195 [INT_ILL] = "Illegal instruction",
196 [INT_GPV] = "General protection violation",
197 [INT_UDN_ACCESS] = "UDN access",
198 [INT_IDN_ACCESS] = "IDN access",
199#if CHIP_HAS_SN()
200 [INT_SN_ACCESS] = "SN access",
201#endif
202 [INT_SWINT_3] = "Software interrupt 3",
203 [INT_SWINT_2] = "Software interrupt 2",
204 [INT_SWINT_0] = "Software interrupt 0",
205 [INT_UNALIGN_DATA] = "Unaligned data",
206 [INT_DOUBLE_FAULT] = "Double fault",
207#ifdef __tilegx__
208 [INT_ILL_TRANS] = "Illegal virtual address",
209#endif
210};
211
212static int do_bpt(struct pt_regs *regs)
213{
214 unsigned long bundle, bcode, bpt;
215
216 bundle = *(unsigned long *)instruction_pointer(regs);
217
218 /*
219 * bpt shoule be { bpt; nop }, which is 0x286a44ae51485000ULL.
220 * we encode the unused least significant bits for other purpose.
221 */
222 bpt = bundle & ~((1ULL << 12) - 1);
223 if (bpt != TILE_BPT_BUNDLE)
224 return 0;
225
226 bcode = bundle & ((1ULL << 12) - 1);
227 /*
228 * notify the kprobe handlers, if instruction is likely to
229 * pertain to them.
230 */
231 switch (bcode) {
232 /* breakpoint_insn */
233 case 0:
234 notify_die(DIE_BREAK, "debug", regs, bundle,
235 INT_ILL, SIGTRAP);
236 break;
237 /* compiled_bpt */
238 case DIE_COMPILED_BPT:
239 notify_die(DIE_COMPILED_BPT, "debug", regs, bundle,
240 INT_ILL, SIGTRAP);
241 break;
242 /* breakpoint2_insn */
243 case DIE_SSTEPBP:
244 notify_die(DIE_SSTEPBP, "single_step", regs, bundle,
245 INT_ILL, SIGTRAP);
246 break;
247 default:
248 return 0;
249 }
250
251 return 1;
252}
253
254void __kprobes do_trap(struct pt_regs *regs, int fault_num,
255 unsigned long reason)
256{
257 siginfo_t info = { 0 };
258 int signo, code;
259 unsigned long address = 0;
260 tile_bundle_bits instr;
261 int is_kernel = !user_mode(regs);
262
263 /* Handle breakpoints, etc. */
264 if (is_kernel && fault_num == INT_ILL && do_bpt(regs))
265 return;
266
267 /* Re-enable interrupts, if they were previously enabled. */
268 if (!(regs->flags & PT_FLAGS_DISABLE_IRQ))
269 local_irq_enable();
270
271 /*
272 * If it hits in kernel mode and we can't fix it up, just exit the
273 * current process and hope for the best.
274 */
275 if (is_kernel) {
276 const char *name;
277 char buf[100];
278 if (fixup_exception(regs)) /* ILL_TRANS or UNALIGN_DATA */
279 return;
280 if (fault_num >= 0 &&
281 fault_num < sizeof(int_name)/sizeof(int_name[0]) &&
282 int_name[fault_num] != NULL)
283 name = int_name[fault_num];
284 else
285 name = "Unknown interrupt";
286 if (fault_num == INT_GPV)
287 snprintf(buf, sizeof(buf), "; GPV_REASON %#lx", reason);
288#ifdef __tilegx__
289 else if (fault_num == INT_ILL_TRANS)
290 snprintf(buf, sizeof(buf), "; address %#lx", reason);
291#endif
292 else
293 buf[0] = '\0';
294 pr_alert("Kernel took bad trap %d (%s) at PC %#lx%s\n",
295 fault_num, name, regs->pc, buf);
296 show_regs(regs);
297 do_exit(SIGKILL); /* FIXME: implement i386 die() */
298 return;
299 }
300
301 switch (fault_num) {
302 case INT_MEM_ERROR:
303 signo = SIGBUS;
304 code = BUS_OBJERR;
305 break;
306 case INT_ILL:
307 if (copy_from_user(&instr, (void __user *)regs->pc,
308 sizeof(instr))) {
309 pr_err("Unreadable instruction for INT_ILL:"
310 " %#lx\n", regs->pc);
311 do_exit(SIGKILL);
312 return;
313 }
314 if (!special_ill(instr, &signo, &code)) {
315 signo = SIGILL;
316 code = ILL_ILLOPC;
317 }
318 address = regs->pc;
319 break;
320 case INT_GPV:
321#if CHIP_HAS_TILE_DMA()
322 if (retry_gpv(reason))
323 return;
324#endif
325 /*FALLTHROUGH*/
326 case INT_UDN_ACCESS:
327 case INT_IDN_ACCESS:
328#if CHIP_HAS_SN()
329 case INT_SN_ACCESS:
330#endif
331 signo = SIGILL;
332 code = ILL_PRVREG;
333 address = regs->pc;
334 break;
335 case INT_SWINT_3:
336 case INT_SWINT_2:
337 case INT_SWINT_0:
338 signo = SIGILL;
339 code = ILL_ILLTRP;
340 address = regs->pc;
341 break;
342 case INT_UNALIGN_DATA:
343#ifndef __tilegx__ /* Emulated support for single step debugging */
344 if (unaligned_fixup >= 0) {
345 struct single_step_state *state =
346 current_thread_info()->step_state;
347 if (!state ||
348 (void __user *)(regs->pc) != state->buffer) {
349 single_step_once(regs);
350 return;
351 }
352 }
353#endif
354 signo = SIGBUS;
355 code = BUS_ADRALN;
356 address = 0;
357 break;
358 case INT_DOUBLE_FAULT:
359 /*
360 * For double fault, "reason" is actually passed as
361 * SYSTEM_SAVE_K_2, the hypervisor's double-fault info, so
362 * we can provide the original fault number rather than
363 * the uninteresting "INT_DOUBLE_FAULT" so the user can
364 * learn what actually struck while PL0 ICS was set.
365 */
366 fault_num = reason;
367 signo = SIGILL;
368 code = ILL_DBLFLT;
369 address = regs->pc;
370 break;
371#ifdef __tilegx__
372 case INT_ILL_TRANS: {
373 /* Avoid a hardware erratum with the return address stack. */
374 fill_ra_stack();
375
376 signo = SIGSEGV;
377 address = reason;
378 code = SEGV_MAPERR;
379 break;
380 }
381#endif
382 default:
383 panic("Unexpected do_trap interrupt number %d", fault_num);
384 return;
385 }
386
387 info.si_signo = signo;
388 info.si_code = code;
389 info.si_addr = (void __user *)address;
390 if (signo == SIGILL)
391 info.si_trapno = fault_num;
392 if (signo != SIGTRAP)
393 trace_unhandled_signal("trap", regs, address, signo);
394 force_sig_info(signo, &info, current);
395}
396
397void kernel_double_fault(int dummy, ulong pc, ulong lr, ulong sp, ulong r52)
398{
399 _dump_stack(dummy, pc, lr, sp, r52);
400 pr_emerg("Double fault: exiting\n");
401 machine_halt();
402}
1/*
2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/sched.h>
16#include <linux/kernel.h>
17#include <linux/kprobes.h>
18#include <linux/module.h>
19#include <linux/reboot.h>
20#include <linux/uaccess.h>
21#include <linux/ptrace.h>
22#include <asm/stack.h>
23#include <asm/traps.h>
24#include <asm/setup.h>
25
26#include <arch/interrupts.h>
27#include <arch/spr_def.h>
28#include <arch/opcode.h>
29
30void __init trap_init(void)
31{
32 /* Nothing needed here since we link code at .intrpt1 */
33}
34
35int unaligned_fixup = 1;
36
37static int __init setup_unaligned_fixup(char *str)
38{
39 /*
40 * Say "=-1" to completely disable it. If you just do "=0", we
41 * will still parse the instruction, then fire a SIGBUS with
42 * the correct address from inside the single_step code.
43 */
44 long val;
45 if (strict_strtol(str, 0, &val) != 0)
46 return 0;
47 unaligned_fixup = val;
48 pr_info("Fixups for unaligned data accesses are %s\n",
49 unaligned_fixup >= 0 ?
50 (unaligned_fixup ? "enabled" : "disabled") :
51 "completely disabled");
52 return 1;
53}
54__setup("unaligned_fixup=", setup_unaligned_fixup);
55
56#if CHIP_HAS_TILE_DMA()
57
58static int dma_disabled;
59
60static int __init nodma(char *str)
61{
62 pr_info("User-space DMA is disabled\n");
63 dma_disabled = 1;
64 return 1;
65}
66__setup("nodma", nodma);
67
68/* How to decode SPR_GPV_REASON */
69#define IRET_ERROR (1U << 31)
70#define MT_ERROR (1U << 30)
71#define MF_ERROR (1U << 29)
72#define SPR_INDEX ((1U << 15) - 1)
73#define SPR_MPL_SHIFT 9 /* starting bit position for MPL encoded in SPR */
74
75/*
76 * See if this GPV is just to notify the kernel of SPR use and we can
77 * retry the user instruction after adjusting some MPLs suitably.
78 */
79static int retry_gpv(unsigned int gpv_reason)
80{
81 int mpl;
82
83 if (gpv_reason & IRET_ERROR)
84 return 0;
85
86 BUG_ON((gpv_reason & (MT_ERROR|MF_ERROR)) == 0);
87 mpl = (gpv_reason & SPR_INDEX) >> SPR_MPL_SHIFT;
88 if (mpl == INT_DMA_NOTIFY && !dma_disabled) {
89 /* User is turning on DMA. Allow it and retry. */
90 printk(KERN_DEBUG "Process %d/%s is now enabled for DMA\n",
91 current->pid, current->comm);
92 BUG_ON(current->thread.tile_dma_state.enabled);
93 current->thread.tile_dma_state.enabled = 1;
94 grant_dma_mpls();
95 return 1;
96 }
97
98 return 0;
99}
100
101#endif /* CHIP_HAS_TILE_DMA() */
102
103#ifdef __tilegx__
104#define bundle_bits tilegx_bundle_bits
105#else
106#define bundle_bits tile_bundle_bits
107#endif
108
109extern bundle_bits bpt_code;
110
111asm(".pushsection .rodata.bpt_code,\"a\";"
112 ".align 8;"
113 "bpt_code: bpt;"
114 ".size bpt_code,.-bpt_code;"
115 ".popsection");
116
117static int special_ill(bundle_bits bundle, int *sigp, int *codep)
118{
119 int sig, code, maxcode;
120
121 if (bundle == bpt_code) {
122 *sigp = SIGTRAP;
123 *codep = TRAP_BRKPT;
124 return 1;
125 }
126
127 /* If it's a "raise" bundle, then "ill" must be in pipe X1. */
128#ifdef __tilegx__
129 if ((bundle & TILEGX_BUNDLE_MODE_MASK) != 0)
130 return 0;
131 if (get_Opcode_X1(bundle) != RRR_0_OPCODE_X1)
132 return 0;
133 if (get_RRROpcodeExtension_X1(bundle) != UNARY_RRR_0_OPCODE_X1)
134 return 0;
135 if (get_UnaryOpcodeExtension_X1(bundle) != ILL_UNARY_OPCODE_X1)
136 return 0;
137#else
138 if (bundle & TILEPRO_BUNDLE_Y_ENCODING_MASK)
139 return 0;
140 if (get_Opcode_X1(bundle) != SHUN_0_OPCODE_X1)
141 return 0;
142 if (get_UnShOpcodeExtension_X1(bundle) != UN_0_SHUN_0_OPCODE_X1)
143 return 0;
144 if (get_UnOpcodeExtension_X1(bundle) != ILL_UN_0_SHUN_0_OPCODE_X1)
145 return 0;
146#endif
147
148 /* Check that the magic distinguishers are set to mean "raise". */
149 if (get_Dest_X1(bundle) != 29 || get_SrcA_X1(bundle) != 37)
150 return 0;
151
152 /* There must be an "addli zero, zero, VAL" in X0. */
153 if (get_Opcode_X0(bundle) != ADDLI_OPCODE_X0)
154 return 0;
155 if (get_Dest_X0(bundle) != TREG_ZERO)
156 return 0;
157 if (get_SrcA_X0(bundle) != TREG_ZERO)
158 return 0;
159
160 /*
161 * Validate the proposed signal number and si_code value.
162 * Note that we embed these in the static instruction itself
163 * so that we perturb the register state as little as possible
164 * at the time of the actual fault; it's unlikely you'd ever
165 * need to dynamically choose which kind of fault to raise
166 * from user space.
167 */
168 sig = get_Imm16_X0(bundle) & 0x3f;
169 switch (sig) {
170 case SIGILL:
171 maxcode = NSIGILL;
172 break;
173 case SIGFPE:
174 maxcode = NSIGFPE;
175 break;
176 case SIGSEGV:
177 maxcode = NSIGSEGV;
178 break;
179 case SIGBUS:
180 maxcode = NSIGBUS;
181 break;
182 case SIGTRAP:
183 maxcode = NSIGTRAP;
184 break;
185 default:
186 return 0;
187 }
188 code = (get_Imm16_X0(bundle) >> 6) & 0xf;
189 if (code <= 0 || code > maxcode)
190 return 0;
191
192 /* Make it the requested signal. */
193 *sigp = sig;
194 *codep = code | __SI_FAULT;
195 return 1;
196}
197
198static const char *const int_name[] = {
199 [INT_MEM_ERROR] = "Memory error",
200 [INT_ILL] = "Illegal instruction",
201 [INT_GPV] = "General protection violation",
202 [INT_UDN_ACCESS] = "UDN access",
203 [INT_IDN_ACCESS] = "IDN access",
204#if CHIP_HAS_SN()
205 [INT_SN_ACCESS] = "SN access",
206#endif
207 [INT_SWINT_3] = "Software interrupt 3",
208 [INT_SWINT_2] = "Software interrupt 2",
209 [INT_SWINT_0] = "Software interrupt 0",
210 [INT_UNALIGN_DATA] = "Unaligned data",
211 [INT_DOUBLE_FAULT] = "Double fault",
212#ifdef __tilegx__
213 [INT_ILL_TRANS] = "Illegal virtual address",
214#endif
215};
216
217void __kprobes do_trap(struct pt_regs *regs, int fault_num,
218 unsigned long reason)
219{
220 siginfo_t info = { 0 };
221 int signo, code;
222 unsigned long address = 0;
223 bundle_bits instr;
224
225 /* Re-enable interrupts. */
226 local_irq_enable();
227
228 /*
229 * If it hits in kernel mode and we can't fix it up, just exit the
230 * current process and hope for the best.
231 */
232 if (!user_mode(regs)) {
233 const char *name;
234 if (fixup_exception(regs)) /* only UNALIGN_DATA in practice */
235 return;
236 if (fault_num >= 0 &&
237 fault_num < sizeof(int_name)/sizeof(int_name[0]) &&
238 int_name[fault_num] != NULL)
239 name = int_name[fault_num];
240 else
241 name = "Unknown interrupt";
242 pr_alert("Kernel took bad trap %d (%s) at PC %#lx\n",
243 fault_num, name, regs->pc);
244 if (fault_num == INT_GPV)
245 pr_alert("GPV_REASON is %#lx\n", reason);
246 show_regs(regs);
247 do_exit(SIGKILL); /* FIXME: implement i386 die() */
248 return;
249 }
250
251 switch (fault_num) {
252 case INT_MEM_ERROR:
253 signo = SIGBUS;
254 code = BUS_OBJERR;
255 break;
256 case INT_ILL:
257 if (copy_from_user(&instr, (void __user *)regs->pc,
258 sizeof(instr))) {
259 pr_err("Unreadable instruction for INT_ILL:"
260 " %#lx\n", regs->pc);
261 do_exit(SIGKILL);
262 return;
263 }
264 if (!special_ill(instr, &signo, &code)) {
265 signo = SIGILL;
266 code = ILL_ILLOPC;
267 }
268 address = regs->pc;
269 break;
270 case INT_GPV:
271#if CHIP_HAS_TILE_DMA()
272 if (retry_gpv(reason))
273 return;
274#endif
275 /*FALLTHROUGH*/
276 case INT_UDN_ACCESS:
277 case INT_IDN_ACCESS:
278#if CHIP_HAS_SN()
279 case INT_SN_ACCESS:
280#endif
281 signo = SIGILL;
282 code = ILL_PRVREG;
283 address = regs->pc;
284 break;
285 case INT_SWINT_3:
286 case INT_SWINT_2:
287 case INT_SWINT_0:
288 signo = SIGILL;
289 code = ILL_ILLTRP;
290 address = regs->pc;
291 break;
292 case INT_UNALIGN_DATA:
293#ifndef __tilegx__ /* Emulated support for single step debugging */
294 if (unaligned_fixup >= 0) {
295 struct single_step_state *state =
296 current_thread_info()->step_state;
297 if (!state ||
298 (void __user *)(regs->pc) != state->buffer) {
299 single_step_once(regs);
300 return;
301 }
302 }
303#endif
304 signo = SIGBUS;
305 code = BUS_ADRALN;
306 address = 0;
307 break;
308 case INT_DOUBLE_FAULT:
309 /*
310 * For double fault, "reason" is actually passed as
311 * SYSTEM_SAVE_K_2, the hypervisor's double-fault info, so
312 * we can provide the original fault number rather than
313 * the uninteresting "INT_DOUBLE_FAULT" so the user can
314 * learn what actually struck while PL0 ICS was set.
315 */
316 fault_num = reason;
317 signo = SIGILL;
318 code = ILL_DBLFLT;
319 address = regs->pc;
320 break;
321#ifdef __tilegx__
322 case INT_ILL_TRANS: {
323 /* Avoid a hardware erratum with the return address stack. */
324 fill_ra_stack();
325
326 signo = SIGSEGV;
327 code = SEGV_MAPERR;
328 if (reason & SPR_ILL_TRANS_REASON__I_STREAM_VA_RMASK)
329 address = regs->pc;
330 else
331 address = 0; /* FIXME: GX: single-step for address */
332 break;
333 }
334#endif
335 default:
336 panic("Unexpected do_trap interrupt number %d", fault_num);
337 return;
338 }
339
340 info.si_signo = signo;
341 info.si_code = code;
342 info.si_addr = (void __user *)address;
343 if (signo == SIGILL)
344 info.si_trapno = fault_num;
345 if (signo != SIGTRAP)
346 trace_unhandled_signal("trap", regs, address, signo);
347 force_sig_info(signo, &info, current);
348}
349
350void kernel_double_fault(int dummy, ulong pc, ulong lr, ulong sp, ulong r52)
351{
352 _dump_stack(dummy, pc, lr, sp, r52);
353 pr_emerg("Double fault: exiting\n");
354 machine_halt();
355}