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v3.15
  1/*
  2 *  Routines for control of the AK4117 via 4-wire serial interface
  3 *  IEC958 (S/PDIF) receiver by Asahi Kasei
  4 *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  5 *
  6 *
  7 *   This program is free software; you can redistribute it and/or modify
  8 *   it under the terms of the GNU General Public License as published by
  9 *   the Free Software Foundation; either version 2 of the License, or
 10 *   (at your option) any later version.
 11 *
 12 *   This program is distributed in the hope that it will be useful,
 13 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 14 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 15 *   GNU General Public License for more details.
 16 *
 17 *   You should have received a copy of the GNU General Public License
 18 *   along with this program; if not, write to the Free Software
 19 *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 20 *
 21 */
 22
 23#include <linux/slab.h>
 24#include <linux/delay.h>
 25#include <linux/module.h>
 26#include <sound/core.h>
 27#include <sound/control.h>
 28#include <sound/pcm.h>
 29#include <sound/ak4117.h>
 30#include <sound/asoundef.h>
 31
 32MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
 33MODULE_DESCRIPTION("AK4117 IEC958 (S/PDIF) receiver by Asahi Kasei");
 34MODULE_LICENSE("GPL");
 35
 36#define AK4117_ADDR			0x00 /* fixed address */
 37
 38static void snd_ak4117_timer(unsigned long data);
 39
 40static void reg_write(struct ak4117 *ak4117, unsigned char reg, unsigned char val)
 41{
 42	ak4117->write(ak4117->private_data, reg, val);
 43	if (reg < sizeof(ak4117->regmap))
 44		ak4117->regmap[reg] = val;
 45}
 46
 47static inline unsigned char reg_read(struct ak4117 *ak4117, unsigned char reg)
 48{
 49	return ak4117->read(ak4117->private_data, reg);
 50}
 51
 52#if 0
 53static void reg_dump(struct ak4117 *ak4117)
 54{
 55	int i;
 56
 57	printk(KERN_DEBUG "AK4117 REG DUMP:\n");
 58	for (i = 0; i < 0x1b; i++)
 59		printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4117, i), i < sizeof(ak4117->regmap) ? ak4117->regmap[i] : 0);
 60}
 61#endif
 62
 63static void snd_ak4117_free(struct ak4117 *chip)
 64{
 65	del_timer_sync(&chip->timer);
 66	kfree(chip);
 67}
 68
 69static int snd_ak4117_dev_free(struct snd_device *device)
 70{
 71	struct ak4117 *chip = device->device_data;
 72	snd_ak4117_free(chip);
 73	return 0;
 74}
 75
 76int snd_ak4117_create(struct snd_card *card, ak4117_read_t *read, ak4117_write_t *write,
 77		      const unsigned char pgm[5], void *private_data, struct ak4117 **r_ak4117)
 78{
 79	struct ak4117 *chip;
 80	int err = 0;
 81	unsigned char reg;
 82	static struct snd_device_ops ops = {
 83		.dev_free =     snd_ak4117_dev_free,
 84	};
 85
 86	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
 87	if (chip == NULL)
 88		return -ENOMEM;
 89	spin_lock_init(&chip->lock);
 90	chip->card = card;
 91	chip->read = read;
 92	chip->write = write;
 93	chip->private_data = private_data;
 94	init_timer(&chip->timer);
 95	chip->timer.data = (unsigned long)chip;
 96	chip->timer.function = snd_ak4117_timer;
 97
 98	for (reg = 0; reg < 5; reg++)
 99		chip->regmap[reg] = pgm[reg];
100	snd_ak4117_reinit(chip);
101
102	chip->rcs0 = reg_read(chip, AK4117_REG_RCS0) & ~(AK4117_QINT | AK4117_CINT | AK4117_STC);
103	chip->rcs1 = reg_read(chip, AK4117_REG_RCS1);
104	chip->rcs2 = reg_read(chip, AK4117_REG_RCS2);
105
106	if ((err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops)) < 0)
107		goto __fail;
108
109	if (r_ak4117)
110		*r_ak4117 = chip;
111	return 0;
112
113      __fail:
114	snd_ak4117_free(chip);
115	return err < 0 ? err : -EIO;
116}
117
118void snd_ak4117_reg_write(struct ak4117 *chip, unsigned char reg, unsigned char mask, unsigned char val)
119{
120	if (reg >= 5)
121		return;
122	reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
123}
124
125void snd_ak4117_reinit(struct ak4117 *chip)
126{
127	unsigned char old = chip->regmap[AK4117_REG_PWRDN], reg;
128
129	del_timer(&chip->timer);
130	chip->init = 1;
131	/* bring the chip to reset state and powerdown state */
132	reg_write(chip, AK4117_REG_PWRDN, 0);
133	udelay(200);
134	/* release reset, but leave powerdown */
135	reg_write(chip, AK4117_REG_PWRDN, (old | AK4117_RST) & ~AK4117_PWN);
136	udelay(200);
137	for (reg = 1; reg < 5; reg++)
138		reg_write(chip, reg, chip->regmap[reg]);
139	/* release powerdown, everything is initialized now */
140	reg_write(chip, AK4117_REG_PWRDN, old | AK4117_RST | AK4117_PWN);
141	chip->init = 0;
142	chip->timer.expires = 1 + jiffies;
143	add_timer(&chip->timer);
144}
145
146static unsigned int external_rate(unsigned char rcs1)
147{
148	switch (rcs1 & (AK4117_FS0|AK4117_FS1|AK4117_FS2|AK4117_FS3)) {
149	case AK4117_FS_32000HZ: return 32000;
150	case AK4117_FS_44100HZ: return 44100;
151	case AK4117_FS_48000HZ: return 48000;
152	case AK4117_FS_88200HZ: return 88200;
153	case AK4117_FS_96000HZ: return 96000;
154	case AK4117_FS_176400HZ: return 176400;
155	case AK4117_FS_192000HZ: return 192000;
156	default:		return 0;
157	}
158}
159
160static int snd_ak4117_in_error_info(struct snd_kcontrol *kcontrol,
161				    struct snd_ctl_elem_info *uinfo)
162{
163	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
164	uinfo->count = 1;
165	uinfo->value.integer.min = 0;
166	uinfo->value.integer.max = LONG_MAX;
167	return 0;
168}
169
170static int snd_ak4117_in_error_get(struct snd_kcontrol *kcontrol,
171				   struct snd_ctl_elem_value *ucontrol)
172{
173	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
174	long *ptr;
175
176	spin_lock_irq(&chip->lock);
177	ptr = (long *)(((char *)chip) + kcontrol->private_value);
178	ucontrol->value.integer.value[0] = *ptr;
179	*ptr = 0;
180	spin_unlock_irq(&chip->lock);
181	return 0;
182}
183
184#define snd_ak4117_in_bit_info		snd_ctl_boolean_mono_info
185
186static int snd_ak4117_in_bit_get(struct snd_kcontrol *kcontrol,
187				 struct snd_ctl_elem_value *ucontrol)
188{
189	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
190	unsigned char reg = kcontrol->private_value & 0xff;
191	unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
192	unsigned char inv = (kcontrol->private_value >> 31) & 1;
193
194	ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
195	return 0;
196}
197
198static int snd_ak4117_rx_info(struct snd_kcontrol *kcontrol,
199			      struct snd_ctl_elem_info *uinfo)
200{
201	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
202	uinfo->count = 1;
203	uinfo->value.integer.min = 0;
204	uinfo->value.integer.max = 1;
205	return 0;
206}
207
208static int snd_ak4117_rx_get(struct snd_kcontrol *kcontrol,
209			     struct snd_ctl_elem_value *ucontrol)
210{
211	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
212
213	ucontrol->value.integer.value[0] = (chip->regmap[AK4117_REG_IO] & AK4117_IPS) ? 1 : 0;
214	return 0;
215}
216
217static int snd_ak4117_rx_put(struct snd_kcontrol *kcontrol,
218			     struct snd_ctl_elem_value *ucontrol)
219{
220	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
221	int change;
222	u8 old_val;
223	
224	spin_lock_irq(&chip->lock);
225	old_val = chip->regmap[AK4117_REG_IO];
226	change = !!ucontrol->value.integer.value[0] != ((old_val & AK4117_IPS) ? 1 : 0);
227	if (change)
228		reg_write(chip, AK4117_REG_IO, (old_val & ~AK4117_IPS) | (ucontrol->value.integer.value[0] ? AK4117_IPS : 0));
229	spin_unlock_irq(&chip->lock);
230	return change;
231}
232
233static int snd_ak4117_rate_info(struct snd_kcontrol *kcontrol,
234				struct snd_ctl_elem_info *uinfo)
235{
236	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
237	uinfo->count = 1;
238	uinfo->value.integer.min = 0;
239	uinfo->value.integer.max = 192000;
240	return 0;
241}
242
243static int snd_ak4117_rate_get(struct snd_kcontrol *kcontrol,
244			       struct snd_ctl_elem_value *ucontrol)
245{
246	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
247
248	ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4117_REG_RCS1));
249	return 0;
250}
251
252static int snd_ak4117_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
253{
254	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
255	uinfo->count = 1;
256	return 0;
257}
258
259static int snd_ak4117_spdif_get(struct snd_kcontrol *kcontrol,
260				struct snd_ctl_elem_value *ucontrol)
261{
262	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
263	unsigned i;
264
265	for (i = 0; i < AK4117_REG_RXCSB_SIZE; i++)
266		ucontrol->value.iec958.status[i] = reg_read(chip, AK4117_REG_RXCSB0 + i);
267	return 0;
268}
269
270static int snd_ak4117_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
271{
272	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
273	uinfo->count = 1;
274	return 0;
275}
276
277static int snd_ak4117_spdif_mask_get(struct snd_kcontrol *kcontrol,
278				      struct snd_ctl_elem_value *ucontrol)
279{
280	memset(ucontrol->value.iec958.status, 0xff, AK4117_REG_RXCSB_SIZE);
281	return 0;
282}
283
284static int snd_ak4117_spdif_pinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
285{
286	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
287	uinfo->value.integer.min = 0;
288	uinfo->value.integer.max = 0xffff;
289	uinfo->count = 4;
290	return 0;
291}
292
293static int snd_ak4117_spdif_pget(struct snd_kcontrol *kcontrol,
294				 struct snd_ctl_elem_value *ucontrol)
295{
296	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
297	unsigned short tmp;
298
299	ucontrol->value.integer.value[0] = 0xf8f2;
300	ucontrol->value.integer.value[1] = 0x4e1f;
301	tmp = reg_read(chip, AK4117_REG_Pc0) | (reg_read(chip, AK4117_REG_Pc1) << 8);
302	ucontrol->value.integer.value[2] = tmp;
303	tmp = reg_read(chip, AK4117_REG_Pd0) | (reg_read(chip, AK4117_REG_Pd1) << 8);
304	ucontrol->value.integer.value[3] = tmp;
305	return 0;
306}
307
308static int snd_ak4117_spdif_qinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
309{
310	uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
311	uinfo->count = AK4117_REG_QSUB_SIZE;
312	return 0;
313}
314
315static int snd_ak4117_spdif_qget(struct snd_kcontrol *kcontrol,
316				 struct snd_ctl_elem_value *ucontrol)
317{
318	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
319	unsigned i;
320
321	for (i = 0; i < AK4117_REG_QSUB_SIZE; i++)
322		ucontrol->value.bytes.data[i] = reg_read(chip, AK4117_REG_QSUB_ADDR + i);
323	return 0;
324}
325
326/* Don't forget to change AK4117_CONTROLS define!!! */
327static struct snd_kcontrol_new snd_ak4117_iec958_controls[] = {
328{
329	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
330	.name =		"IEC958 Parity Errors",
331	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
332	.info =		snd_ak4117_in_error_info,
333	.get =		snd_ak4117_in_error_get,
334	.private_value = offsetof(struct ak4117, parity_errors),
335},
336{
337	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
338	.name =		"IEC958 V-Bit Errors",
339	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
340	.info =		snd_ak4117_in_error_info,
341	.get =		snd_ak4117_in_error_get,
342	.private_value = offsetof(struct ak4117, v_bit_errors),
343},
344{
345	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
346	.name =		"IEC958 C-CRC Errors",
347	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
348	.info =		snd_ak4117_in_error_info,
349	.get =		snd_ak4117_in_error_get,
350	.private_value = offsetof(struct ak4117, ccrc_errors),
351},
352{
353	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
354	.name =		"IEC958 Q-CRC Errors",
355	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
356	.info =		snd_ak4117_in_error_info,
357	.get =		snd_ak4117_in_error_get,
358	.private_value = offsetof(struct ak4117, qcrc_errors),
359},
360{
361	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
362	.name =		"IEC958 External Rate",
363	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
364	.info =		snd_ak4117_rate_info,
365	.get =		snd_ak4117_rate_get,
366},
367{
368	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
369	.name =		SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
370	.access =	SNDRV_CTL_ELEM_ACCESS_READ,
371	.info =		snd_ak4117_spdif_mask_info,
372	.get =		snd_ak4117_spdif_mask_get,
373},
374{
375	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
376	.name =		SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
377	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
378	.info =		snd_ak4117_spdif_info,
379	.get =		snd_ak4117_spdif_get,
380},
381{
382	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
383	.name =		"IEC958 Preamble Capture Default",
384	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
385	.info =		snd_ak4117_spdif_pinfo,
386	.get =		snd_ak4117_spdif_pget,
387},
388{
389	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
390	.name =		"IEC958 Q-subcode Capture Default",
391	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
392	.info =		snd_ak4117_spdif_qinfo,
393	.get =		snd_ak4117_spdif_qget,
394},
395{
396	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
397	.name =		"IEC958 Audio",
398	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
399	.info =		snd_ak4117_in_bit_info,
400	.get =		snd_ak4117_in_bit_get,
401	.private_value = (1<<31) | (3<<8) | AK4117_REG_RCS0,
402},
403{
404	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
405	.name =		"IEC958 Non-PCM Bitstream",
406	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
407	.info =		snd_ak4117_in_bit_info,
408	.get =		snd_ak4117_in_bit_get,
409	.private_value = (5<<8) | AK4117_REG_RCS1,
410},
411{
412	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
413	.name =		"IEC958 DTS Bitstream",
414	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
415	.info =		snd_ak4117_in_bit_info,
416	.get =		snd_ak4117_in_bit_get,
417	.private_value = (6<<8) | AK4117_REG_RCS1,
418},
419{
420	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
421	.name =		"AK4117 Input Select",
422	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE,
423	.info =		snd_ak4117_rx_info,
424	.get =		snd_ak4117_rx_get,
425	.put =		snd_ak4117_rx_put,
426}
427};
428
429int snd_ak4117_build(struct ak4117 *ak4117, struct snd_pcm_substream *cap_substream)
430{
431	struct snd_kcontrol *kctl;
432	unsigned int idx;
433	int err;
434
435	if (snd_BUG_ON(!cap_substream))
436		return -EINVAL;
437	ak4117->substream = cap_substream;
438	for (idx = 0; idx < AK4117_CONTROLS; idx++) {
439		kctl = snd_ctl_new1(&snd_ak4117_iec958_controls[idx], ak4117);
440		if (kctl == NULL)
441			return -ENOMEM;
442		kctl->id.device = cap_substream->pcm->device;
443		kctl->id.subdevice = cap_substream->number;
444		err = snd_ctl_add(ak4117->card, kctl);
445		if (err < 0)
446			return err;
447		ak4117->kctls[idx] = kctl;
448	}
449	return 0;
450}
451
452int snd_ak4117_external_rate(struct ak4117 *ak4117)
453{
454	unsigned char rcs1;
455
456	rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
457	return external_rate(rcs1);
458}
459
460int snd_ak4117_check_rate_and_errors(struct ak4117 *ak4117, unsigned int flags)
461{
462	struct snd_pcm_runtime *runtime = ak4117->substream ? ak4117->substream->runtime : NULL;
463	unsigned long _flags;
464	int res = 0;
465	unsigned char rcs0, rcs1, rcs2;
466	unsigned char c0, c1;
467
468	rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
469	if (flags & AK4117_CHECK_NO_STAT)
470		goto __rate;
471	rcs0 = reg_read(ak4117, AK4117_REG_RCS0);
472	rcs2 = reg_read(ak4117, AK4117_REG_RCS2);
473	// printk(KERN_DEBUG "AK IRQ: rcs0 = 0x%x, rcs1 = 0x%x, rcs2 = 0x%x\n", rcs0, rcs1, rcs2);
474	spin_lock_irqsave(&ak4117->lock, _flags);
475	if (rcs0 & AK4117_PAR)
476		ak4117->parity_errors++;
477	if (rcs0 & AK4117_V)
478		ak4117->v_bit_errors++;
479	if (rcs2 & AK4117_CCRC)
480		ak4117->ccrc_errors++;
481	if (rcs2 & AK4117_QCRC)
482		ak4117->qcrc_errors++;
483	c0 = (ak4117->rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK)) ^
484                     (rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK));
485	c1 = (ak4117->rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f)) ^
486	             (rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f));
487	ak4117->rcs0 = rcs0 & ~(AK4117_QINT | AK4117_CINT | AK4117_STC);
488	ak4117->rcs1 = rcs1;
489	ak4117->rcs2 = rcs2;
490	spin_unlock_irqrestore(&ak4117->lock, _flags);
491
492	if (rcs0 & AK4117_PAR)
493		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[0]->id);
494	if (rcs0 & AK4117_V)
495		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[1]->id);
496	if (rcs2 & AK4117_CCRC)
497		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[2]->id);
498	if (rcs2 & AK4117_QCRC)
499		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[3]->id);
500
501	/* rate change */
502	if (c1 & 0x0f)
503		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[4]->id);
504
505	if ((c1 & AK4117_PEM) | (c0 & AK4117_CINT))
506		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[6]->id);
507	if (c0 & AK4117_QINT)
508		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[8]->id);
509
510	if (c0 & AK4117_AUDION)
511		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[9]->id);
512	if (c1 & AK4117_NPCM)
513		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[10]->id);
514	if (c1 & AK4117_DTSCD)
515		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[11]->id);
516		
517	if (ak4117->change_callback && (c0 | c1) != 0)
518		ak4117->change_callback(ak4117, c0, c1);
519
520      __rate:
521	/* compare rate */
522	res = external_rate(rcs1);
523	if (!(flags & AK4117_CHECK_NO_RATE) && runtime && runtime->rate != res) {
524		snd_pcm_stream_lock_irqsave(ak4117->substream, _flags);
525		if (snd_pcm_running(ak4117->substream)) {
526			// printk(KERN_DEBUG "rate changed (%i <- %i)\n", runtime->rate, res);
527			snd_pcm_stop(ak4117->substream, SNDRV_PCM_STATE_DRAINING);
528			wake_up(&runtime->sleep);
529			res = 1;
530		}
531		snd_pcm_stream_unlock_irqrestore(ak4117->substream, _flags);
532	}
533	return res;
534}
535
536static void snd_ak4117_timer(unsigned long data)
537{
538	struct ak4117 *chip = (struct ak4117 *)data;
539
540	if (chip->init)
541		return;
542	snd_ak4117_check_rate_and_errors(chip, 0);
543	chip->timer.expires = 1 + jiffies;
544	add_timer(&chip->timer);
545}
546
547EXPORT_SYMBOL(snd_ak4117_create);
548EXPORT_SYMBOL(snd_ak4117_reg_write);
549EXPORT_SYMBOL(snd_ak4117_reinit);
550EXPORT_SYMBOL(snd_ak4117_build);
551EXPORT_SYMBOL(snd_ak4117_external_rate);
552EXPORT_SYMBOL(snd_ak4117_check_rate_and_errors);
v3.1
  1/*
  2 *  Routines for control of the AK4117 via 4-wire serial interface
  3 *  IEC958 (S/PDIF) receiver by Asahi Kasei
  4 *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  5 *
  6 *
  7 *   This program is free software; you can redistribute it and/or modify
  8 *   it under the terms of the GNU General Public License as published by
  9 *   the Free Software Foundation; either version 2 of the License, or
 10 *   (at your option) any later version.
 11 *
 12 *   This program is distributed in the hope that it will be useful,
 13 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 14 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 15 *   GNU General Public License for more details.
 16 *
 17 *   You should have received a copy of the GNU General Public License
 18 *   along with this program; if not, write to the Free Software
 19 *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 20 *
 21 */
 22
 23#include <linux/slab.h>
 24#include <linux/delay.h>
 
 25#include <sound/core.h>
 26#include <sound/control.h>
 27#include <sound/pcm.h>
 28#include <sound/ak4117.h>
 29#include <sound/asoundef.h>
 30
 31MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
 32MODULE_DESCRIPTION("AK4117 IEC958 (S/PDIF) receiver by Asahi Kasei");
 33MODULE_LICENSE("GPL");
 34
 35#define AK4117_ADDR			0x00 /* fixed address */
 36
 37static void snd_ak4117_timer(unsigned long data);
 38
 39static void reg_write(struct ak4117 *ak4117, unsigned char reg, unsigned char val)
 40{
 41	ak4117->write(ak4117->private_data, reg, val);
 42	if (reg < sizeof(ak4117->regmap))
 43		ak4117->regmap[reg] = val;
 44}
 45
 46static inline unsigned char reg_read(struct ak4117 *ak4117, unsigned char reg)
 47{
 48	return ak4117->read(ak4117->private_data, reg);
 49}
 50
 51#if 0
 52static void reg_dump(struct ak4117 *ak4117)
 53{
 54	int i;
 55
 56	printk(KERN_DEBUG "AK4117 REG DUMP:\n");
 57	for (i = 0; i < 0x1b; i++)
 58		printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4117, i), i < sizeof(ak4117->regmap) ? ak4117->regmap[i] : 0);
 59}
 60#endif
 61
 62static void snd_ak4117_free(struct ak4117 *chip)
 63{
 64	del_timer(&chip->timer);
 65	kfree(chip);
 66}
 67
 68static int snd_ak4117_dev_free(struct snd_device *device)
 69{
 70	struct ak4117 *chip = device->device_data;
 71	snd_ak4117_free(chip);
 72	return 0;
 73}
 74
 75int snd_ak4117_create(struct snd_card *card, ak4117_read_t *read, ak4117_write_t *write,
 76		      const unsigned char pgm[5], void *private_data, struct ak4117 **r_ak4117)
 77{
 78	struct ak4117 *chip;
 79	int err = 0;
 80	unsigned char reg;
 81	static struct snd_device_ops ops = {
 82		.dev_free =     snd_ak4117_dev_free,
 83	};
 84
 85	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
 86	if (chip == NULL)
 87		return -ENOMEM;
 88	spin_lock_init(&chip->lock);
 89	chip->card = card;
 90	chip->read = read;
 91	chip->write = write;
 92	chip->private_data = private_data;
 93	init_timer(&chip->timer);
 94	chip->timer.data = (unsigned long)chip;
 95	chip->timer.function = snd_ak4117_timer;
 96
 97	for (reg = 0; reg < 5; reg++)
 98		chip->regmap[reg] = pgm[reg];
 99	snd_ak4117_reinit(chip);
100
101	chip->rcs0 = reg_read(chip, AK4117_REG_RCS0) & ~(AK4117_QINT | AK4117_CINT | AK4117_STC);
102	chip->rcs1 = reg_read(chip, AK4117_REG_RCS1);
103	chip->rcs2 = reg_read(chip, AK4117_REG_RCS2);
104
105	if ((err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops)) < 0)
106		goto __fail;
107
108	if (r_ak4117)
109		*r_ak4117 = chip;
110	return 0;
111
112      __fail:
113	snd_ak4117_free(chip);
114	return err < 0 ? err : -EIO;
115}
116
117void snd_ak4117_reg_write(struct ak4117 *chip, unsigned char reg, unsigned char mask, unsigned char val)
118{
119	if (reg >= 5)
120		return;
121	reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
122}
123
124void snd_ak4117_reinit(struct ak4117 *chip)
125{
126	unsigned char old = chip->regmap[AK4117_REG_PWRDN], reg;
127
128	del_timer(&chip->timer);
129	chip->init = 1;
130	/* bring the chip to reset state and powerdown state */
131	reg_write(chip, AK4117_REG_PWRDN, 0);
132	udelay(200);
133	/* release reset, but leave powerdown */
134	reg_write(chip, AK4117_REG_PWRDN, (old | AK4117_RST) & ~AK4117_PWN);
135	udelay(200);
136	for (reg = 1; reg < 5; reg++)
137		reg_write(chip, reg, chip->regmap[reg]);
138	/* release powerdown, everything is initialized now */
139	reg_write(chip, AK4117_REG_PWRDN, old | AK4117_RST | AK4117_PWN);
140	chip->init = 0;
141	chip->timer.expires = 1 + jiffies;
142	add_timer(&chip->timer);
143}
144
145static unsigned int external_rate(unsigned char rcs1)
146{
147	switch (rcs1 & (AK4117_FS0|AK4117_FS1|AK4117_FS2|AK4117_FS3)) {
148	case AK4117_FS_32000HZ: return 32000;
149	case AK4117_FS_44100HZ: return 44100;
150	case AK4117_FS_48000HZ: return 48000;
151	case AK4117_FS_88200HZ: return 88200;
152	case AK4117_FS_96000HZ: return 96000;
153	case AK4117_FS_176400HZ: return 176400;
154	case AK4117_FS_192000HZ: return 192000;
155	default:		return 0;
156	}
157}
158
159static int snd_ak4117_in_error_info(struct snd_kcontrol *kcontrol,
160				    struct snd_ctl_elem_info *uinfo)
161{
162	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
163	uinfo->count = 1;
164	uinfo->value.integer.min = 0;
165	uinfo->value.integer.max = LONG_MAX;
166	return 0;
167}
168
169static int snd_ak4117_in_error_get(struct snd_kcontrol *kcontrol,
170				   struct snd_ctl_elem_value *ucontrol)
171{
172	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
173	long *ptr;
174
175	spin_lock_irq(&chip->lock);
176	ptr = (long *)(((char *)chip) + kcontrol->private_value);
177	ucontrol->value.integer.value[0] = *ptr;
178	*ptr = 0;
179	spin_unlock_irq(&chip->lock);
180	return 0;
181}
182
183#define snd_ak4117_in_bit_info		snd_ctl_boolean_mono_info
184
185static int snd_ak4117_in_bit_get(struct snd_kcontrol *kcontrol,
186				 struct snd_ctl_elem_value *ucontrol)
187{
188	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
189	unsigned char reg = kcontrol->private_value & 0xff;
190	unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
191	unsigned char inv = (kcontrol->private_value >> 31) & 1;
192
193	ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
194	return 0;
195}
196
197static int snd_ak4117_rx_info(struct snd_kcontrol *kcontrol,
198			      struct snd_ctl_elem_info *uinfo)
199{
200	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
201	uinfo->count = 1;
202	uinfo->value.integer.min = 0;
203	uinfo->value.integer.max = 1;
204	return 0;
205}
206
207static int snd_ak4117_rx_get(struct snd_kcontrol *kcontrol,
208			     struct snd_ctl_elem_value *ucontrol)
209{
210	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
211
212	ucontrol->value.integer.value[0] = (chip->regmap[AK4117_REG_IO] & AK4117_IPS) ? 1 : 0;
213	return 0;
214}
215
216static int snd_ak4117_rx_put(struct snd_kcontrol *kcontrol,
217			     struct snd_ctl_elem_value *ucontrol)
218{
219	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
220	int change;
221	u8 old_val;
222	
223	spin_lock_irq(&chip->lock);
224	old_val = chip->regmap[AK4117_REG_IO];
225	change = !!ucontrol->value.integer.value[0] != ((old_val & AK4117_IPS) ? 1 : 0);
226	if (change)
227		reg_write(chip, AK4117_REG_IO, (old_val & ~AK4117_IPS) | (ucontrol->value.integer.value[0] ? AK4117_IPS : 0));
228	spin_unlock_irq(&chip->lock);
229	return change;
230}
231
232static int snd_ak4117_rate_info(struct snd_kcontrol *kcontrol,
233				struct snd_ctl_elem_info *uinfo)
234{
235	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
236	uinfo->count = 1;
237	uinfo->value.integer.min = 0;
238	uinfo->value.integer.max = 192000;
239	return 0;
240}
241
242static int snd_ak4117_rate_get(struct snd_kcontrol *kcontrol,
243			       struct snd_ctl_elem_value *ucontrol)
244{
245	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
246
247	ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4117_REG_RCS1));
248	return 0;
249}
250
251static int snd_ak4117_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
252{
253	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
254	uinfo->count = 1;
255	return 0;
256}
257
258static int snd_ak4117_spdif_get(struct snd_kcontrol *kcontrol,
259				struct snd_ctl_elem_value *ucontrol)
260{
261	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
262	unsigned i;
263
264	for (i = 0; i < AK4117_REG_RXCSB_SIZE; i++)
265		ucontrol->value.iec958.status[i] = reg_read(chip, AK4117_REG_RXCSB0 + i);
266	return 0;
267}
268
269static int snd_ak4117_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
270{
271	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
272	uinfo->count = 1;
273	return 0;
274}
275
276static int snd_ak4117_spdif_mask_get(struct snd_kcontrol *kcontrol,
277				      struct snd_ctl_elem_value *ucontrol)
278{
279	memset(ucontrol->value.iec958.status, 0xff, AK4117_REG_RXCSB_SIZE);
280	return 0;
281}
282
283static int snd_ak4117_spdif_pinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
284{
285	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
286	uinfo->value.integer.min = 0;
287	uinfo->value.integer.max = 0xffff;
288	uinfo->count = 4;
289	return 0;
290}
291
292static int snd_ak4117_spdif_pget(struct snd_kcontrol *kcontrol,
293				 struct snd_ctl_elem_value *ucontrol)
294{
295	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
296	unsigned short tmp;
297
298	ucontrol->value.integer.value[0] = 0xf8f2;
299	ucontrol->value.integer.value[1] = 0x4e1f;
300	tmp = reg_read(chip, AK4117_REG_Pc0) | (reg_read(chip, AK4117_REG_Pc1) << 8);
301	ucontrol->value.integer.value[2] = tmp;
302	tmp = reg_read(chip, AK4117_REG_Pd0) | (reg_read(chip, AK4117_REG_Pd1) << 8);
303	ucontrol->value.integer.value[3] = tmp;
304	return 0;
305}
306
307static int snd_ak4117_spdif_qinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
308{
309	uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
310	uinfo->count = AK4117_REG_QSUB_SIZE;
311	return 0;
312}
313
314static int snd_ak4117_spdif_qget(struct snd_kcontrol *kcontrol,
315				 struct snd_ctl_elem_value *ucontrol)
316{
317	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
318	unsigned i;
319
320	for (i = 0; i < AK4117_REG_QSUB_SIZE; i++)
321		ucontrol->value.bytes.data[i] = reg_read(chip, AK4117_REG_QSUB_ADDR + i);
322	return 0;
323}
324
325/* Don't forget to change AK4117_CONTROLS define!!! */
326static struct snd_kcontrol_new snd_ak4117_iec958_controls[] = {
327{
328	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
329	.name =		"IEC958 Parity Errors",
330	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
331	.info =		snd_ak4117_in_error_info,
332	.get =		snd_ak4117_in_error_get,
333	.private_value = offsetof(struct ak4117, parity_errors),
334},
335{
336	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
337	.name =		"IEC958 V-Bit Errors",
338	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
339	.info =		snd_ak4117_in_error_info,
340	.get =		snd_ak4117_in_error_get,
341	.private_value = offsetof(struct ak4117, v_bit_errors),
342},
343{
344	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
345	.name =		"IEC958 C-CRC Errors",
346	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
347	.info =		snd_ak4117_in_error_info,
348	.get =		snd_ak4117_in_error_get,
349	.private_value = offsetof(struct ak4117, ccrc_errors),
350},
351{
352	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
353	.name =		"IEC958 Q-CRC Errors",
354	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
355	.info =		snd_ak4117_in_error_info,
356	.get =		snd_ak4117_in_error_get,
357	.private_value = offsetof(struct ak4117, qcrc_errors),
358},
359{
360	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
361	.name =		"IEC958 External Rate",
362	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
363	.info =		snd_ak4117_rate_info,
364	.get =		snd_ak4117_rate_get,
365},
366{
367	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
368	.name =		SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
369	.access =	SNDRV_CTL_ELEM_ACCESS_READ,
370	.info =		snd_ak4117_spdif_mask_info,
371	.get =		snd_ak4117_spdif_mask_get,
372},
373{
374	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
375	.name =		SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
376	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
377	.info =		snd_ak4117_spdif_info,
378	.get =		snd_ak4117_spdif_get,
379},
380{
381	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
382	.name =		"IEC958 Preample Capture Default",
383	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
384	.info =		snd_ak4117_spdif_pinfo,
385	.get =		snd_ak4117_spdif_pget,
386},
387{
388	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
389	.name =		"IEC958 Q-subcode Capture Default",
390	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
391	.info =		snd_ak4117_spdif_qinfo,
392	.get =		snd_ak4117_spdif_qget,
393},
394{
395	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
396	.name =		"IEC958 Audio",
397	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
398	.info =		snd_ak4117_in_bit_info,
399	.get =		snd_ak4117_in_bit_get,
400	.private_value = (1<<31) | (3<<8) | AK4117_REG_RCS0,
401},
402{
403	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
404	.name =		"IEC958 Non-PCM Bitstream",
405	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
406	.info =		snd_ak4117_in_bit_info,
407	.get =		snd_ak4117_in_bit_get,
408	.private_value = (5<<8) | AK4117_REG_RCS1,
409},
410{
411	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
412	.name =		"IEC958 DTS Bitstream",
413	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
414	.info =		snd_ak4117_in_bit_info,
415	.get =		snd_ak4117_in_bit_get,
416	.private_value = (6<<8) | AK4117_REG_RCS1,
417},
418{
419	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
420	.name =		"AK4117 Input Select",
421	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE,
422	.info =		snd_ak4117_rx_info,
423	.get =		snd_ak4117_rx_get,
424	.put =		snd_ak4117_rx_put,
425}
426};
427
428int snd_ak4117_build(struct ak4117 *ak4117, struct snd_pcm_substream *cap_substream)
429{
430	struct snd_kcontrol *kctl;
431	unsigned int idx;
432	int err;
433
434	if (snd_BUG_ON(!cap_substream))
435		return -EINVAL;
436	ak4117->substream = cap_substream;
437	for (idx = 0; idx < AK4117_CONTROLS; idx++) {
438		kctl = snd_ctl_new1(&snd_ak4117_iec958_controls[idx], ak4117);
439		if (kctl == NULL)
440			return -ENOMEM;
441		kctl->id.device = cap_substream->pcm->device;
442		kctl->id.subdevice = cap_substream->number;
443		err = snd_ctl_add(ak4117->card, kctl);
444		if (err < 0)
445			return err;
446		ak4117->kctls[idx] = kctl;
447	}
448	return 0;
449}
450
451int snd_ak4117_external_rate(struct ak4117 *ak4117)
452{
453	unsigned char rcs1;
454
455	rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
456	return external_rate(rcs1);
457}
458
459int snd_ak4117_check_rate_and_errors(struct ak4117 *ak4117, unsigned int flags)
460{
461	struct snd_pcm_runtime *runtime = ak4117->substream ? ak4117->substream->runtime : NULL;
462	unsigned long _flags;
463	int res = 0;
464	unsigned char rcs0, rcs1, rcs2;
465	unsigned char c0, c1;
466
467	rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
468	if (flags & AK4117_CHECK_NO_STAT)
469		goto __rate;
470	rcs0 = reg_read(ak4117, AK4117_REG_RCS0);
471	rcs2 = reg_read(ak4117, AK4117_REG_RCS2);
472	// printk(KERN_DEBUG "AK IRQ: rcs0 = 0x%x, rcs1 = 0x%x, rcs2 = 0x%x\n", rcs0, rcs1, rcs2);
473	spin_lock_irqsave(&ak4117->lock, _flags);
474	if (rcs0 & AK4117_PAR)
475		ak4117->parity_errors++;
476	if (rcs0 & AK4117_V)
477		ak4117->v_bit_errors++;
478	if (rcs2 & AK4117_CCRC)
479		ak4117->ccrc_errors++;
480	if (rcs2 & AK4117_QCRC)
481		ak4117->qcrc_errors++;
482	c0 = (ak4117->rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK)) ^
483                     (rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK));
484	c1 = (ak4117->rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f)) ^
485	             (rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f));
486	ak4117->rcs0 = rcs0 & ~(AK4117_QINT | AK4117_CINT | AK4117_STC);
487	ak4117->rcs1 = rcs1;
488	ak4117->rcs2 = rcs2;
489	spin_unlock_irqrestore(&ak4117->lock, _flags);
490
491	if (rcs0 & AK4117_PAR)
492		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[0]->id);
493	if (rcs0 & AK4117_V)
494		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[1]->id);
495	if (rcs2 & AK4117_CCRC)
496		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[2]->id);
497	if (rcs2 & AK4117_QCRC)
498		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[3]->id);
499
500	/* rate change */
501	if (c1 & 0x0f)
502		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[4]->id);
503
504	if ((c1 & AK4117_PEM) | (c0 & AK4117_CINT))
505		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[6]->id);
506	if (c0 & AK4117_QINT)
507		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[8]->id);
508
509	if (c0 & AK4117_AUDION)
510		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[9]->id);
511	if (c1 & AK4117_NPCM)
512		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[10]->id);
513	if (c1 & AK4117_DTSCD)
514		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[11]->id);
515		
516	if (ak4117->change_callback && (c0 | c1) != 0)
517		ak4117->change_callback(ak4117, c0, c1);
518
519      __rate:
520	/* compare rate */
521	res = external_rate(rcs1);
522	if (!(flags & AK4117_CHECK_NO_RATE) && runtime && runtime->rate != res) {
523		snd_pcm_stream_lock_irqsave(ak4117->substream, _flags);
524		if (snd_pcm_running(ak4117->substream)) {
525			// printk(KERN_DEBUG "rate changed (%i <- %i)\n", runtime->rate, res);
526			snd_pcm_stop(ak4117->substream, SNDRV_PCM_STATE_DRAINING);
527			wake_up(&runtime->sleep);
528			res = 1;
529		}
530		snd_pcm_stream_unlock_irqrestore(ak4117->substream, _flags);
531	}
532	return res;
533}
534
535static void snd_ak4117_timer(unsigned long data)
536{
537	struct ak4117 *chip = (struct ak4117 *)data;
538
539	if (chip->init)
540		return;
541	snd_ak4117_check_rate_and_errors(chip, 0);
542	chip->timer.expires = 1 + jiffies;
543	add_timer(&chip->timer);
544}
545
546EXPORT_SYMBOL(snd_ak4117_create);
547EXPORT_SYMBOL(snd_ak4117_reg_write);
548EXPORT_SYMBOL(snd_ak4117_reinit);
549EXPORT_SYMBOL(snd_ak4117_build);
550EXPORT_SYMBOL(snd_ak4117_external_rate);
551EXPORT_SYMBOL(snd_ak4117_check_rate_and_errors);