1/*
 2 * arch/sh/boards/shmin/setup.c
 3 *
 4 * Copyright (C) 2006 Takashi YOSHII
 5 *
 6 * SHMIN Support.
 7 */
 8#include <linux/init.h>
 9#include <linux/irq.h>
10#include <asm/machvec.h>
11#include <mach/shmin.h>
12#include <asm/clock.h>
13#include <asm/io.h>
14
15#define PFC_PHCR	0xa400010eUL
16#define INTC_ICR1	0xa4000010UL
17
18static void __init init_shmin_irq(void)
19{
20	__raw_writew(0x2a00, PFC_PHCR);	// IRQ0-3=IRQ
21	__raw_writew(0x0aaa, INTC_ICR1);	// IRQ0-3=IRQ-mode,Low-active.
22	plat_irq_setup_pins(IRQ_MODE_IRQ);
23}
24
25static void __init shmin_setup(char **cmdline_p)
26{
27	__set_io_port_base(SHMIN_IO_BASE);
28}
29
30static struct sh_machine_vector mv_shmin __initmv = {
31	.mv_name	= "SHMIN",
32	.mv_setup	= shmin_setup,
33	.mv_init_irq	= init_shmin_irq,
34};

 1/*
 2 * arch/sh/boards/shmin/setup.c
 3 *
 4 * Copyright (C) 2006 Takashi YOSHII
 5 *
 6 * SHMIN Support.
 7 */
 8#include <linux/init.h>
 9#include <linux/irq.h>
10#include <asm/machvec.h>
11#include <mach/shmin.h>
12#include <asm/clock.h>
13#include <asm/io.h>
14
15#define PFC_PHCR	0xa400010eUL
16#define INTC_ICR1	0xa4000010UL
17
18static void __init init_shmin_irq(void)
19{
20	__raw_writew(0x2a00, PFC_PHCR);	// IRQ0-3=IRQ
21	__raw_writew(0x0aaa, INTC_ICR1);	// IRQ0-3=IRQ-mode,Low-active.
22	plat_irq_setup_pins(IRQ_MODE_IRQ);
23}
24
25static void __init shmin_setup(char **cmdline_p)
26{
27	__set_io_port_base(SHMIN_IO_BASE);
28}
29
30static struct sh_machine_vector mv_shmin __initmv = {
31	.mv_name	= "SHMIN",
32	.mv_setup	= shmin_setup,
33	.mv_init_irq	= init_shmin_irq,
34};