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v3.15
  1/*
  2 * Freescale General-purpose Timers Module
  3 *
  4 * Copyright (c) Freescale Semiconductor, Inc. 2006.
  5 *               Shlomi Gridish <gridish@freescale.com>
  6 *               Jerry Huang <Chang-Ming.Huang@freescale.com>
  7 * Copyright (c) MontaVista Software, Inc. 2008.
  8 *               Anton Vorontsov <avorontsov@ru.mvista.com>
  9 *
 10 * This program is free software; you can redistribute  it and/or modify it
 11 * under  the terms of  the GNU General  Public License as published by the
 12 * Free Software Foundation;  either version 2 of the  License, or (at your
 13 * option) any later version.
 14 */
 15
 16#include <linux/kernel.h>
 17#include <linux/err.h>
 18#include <linux/errno.h>
 19#include <linux/list.h>
 20#include <linux/io.h>
 21#include <linux/of.h>
 22#include <linux/of_address.h>
 23#include <linux/of_irq.h>
 24#include <linux/spinlock.h>
 25#include <linux/bitops.h>
 26#include <linux/slab.h>
 27#include <linux/export.h>
 28#include <asm/fsl_gtm.h>
 29
 30#define GTCFR_STP(x)		((x) & 1 ? 1 << 5 : 1 << 1)
 31#define GTCFR_RST(x)		((x) & 1 ? 1 << 4 : 1 << 0)
 32
 33#define GTMDR_ICLK_MASK		(3 << 1)
 34#define GTMDR_ICLK_ICAS		(0 << 1)
 35#define GTMDR_ICLK_ICLK		(1 << 1)
 36#define GTMDR_ICLK_SLGO		(2 << 1)
 37#define GTMDR_FRR		(1 << 3)
 38#define GTMDR_ORI		(1 << 4)
 39#define GTMDR_SPS(x)		((x) << 8)
 40
 41struct gtm_timers_regs {
 42	u8	gtcfr1;		/* Timer 1, Timer 2 global config register */
 43	u8	res0[0x3];
 44	u8	gtcfr2;		/* Timer 3, timer 4 global config register */
 45	u8	res1[0xB];
 46	__be16	gtmdr1;		/* Timer 1 mode register */
 47	__be16	gtmdr2;		/* Timer 2 mode register */
 48	__be16	gtrfr1;		/* Timer 1 reference register */
 49	__be16	gtrfr2;		/* Timer 2 reference register */
 50	__be16	gtcpr1;		/* Timer 1 capture register */
 51	__be16	gtcpr2;		/* Timer 2 capture register */
 52	__be16	gtcnr1;		/* Timer 1 counter */
 53	__be16	gtcnr2;		/* Timer 2 counter */
 54	__be16	gtmdr3;		/* Timer 3 mode register */
 55	__be16	gtmdr4;		/* Timer 4 mode register */
 56	__be16	gtrfr3;		/* Timer 3 reference register */
 57	__be16	gtrfr4;		/* Timer 4 reference register */
 58	__be16	gtcpr3;		/* Timer 3 capture register */
 59	__be16	gtcpr4;		/* Timer 4 capture register */
 60	__be16	gtcnr3;		/* Timer 3 counter */
 61	__be16	gtcnr4;		/* Timer 4 counter */
 62	__be16	gtevr1;		/* Timer 1 event register */
 63	__be16	gtevr2;		/* Timer 2 event register */
 64	__be16	gtevr3;		/* Timer 3 event register */
 65	__be16	gtevr4;		/* Timer 4 event register */
 66	__be16	gtpsr1;		/* Timer 1 prescale register */
 67	__be16	gtpsr2;		/* Timer 2 prescale register */
 68	__be16	gtpsr3;		/* Timer 3 prescale register */
 69	__be16	gtpsr4;		/* Timer 4 prescale register */
 70	u8 res2[0x40];
 71} __attribute__ ((packed));
 72
 73struct gtm {
 74	unsigned int clock;
 75	struct gtm_timers_regs __iomem *regs;
 76	struct gtm_timer timers[4];
 77	spinlock_t lock;
 78	struct list_head list_node;
 79};
 80
 81static LIST_HEAD(gtms);
 82
 83/**
 84 * gtm_get_timer - request GTM timer to use it with the rest of GTM API
 85 * Context:	non-IRQ
 86 *
 87 * This function reserves GTM timer for later use. It returns gtm_timer
 88 * structure to use with the rest of GTM API, you should use timer->irq
 89 * to manage timer interrupt.
 90 */
 91struct gtm_timer *gtm_get_timer16(void)
 92{
 93	struct gtm *gtm = NULL;
 94	int i;
 95
 96	list_for_each_entry(gtm, &gtms, list_node) {
 97		spin_lock_irq(&gtm->lock);
 98
 99		for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) {
100			if (!gtm->timers[i].requested) {
101				gtm->timers[i].requested = true;
102				spin_unlock_irq(&gtm->lock);
103				return &gtm->timers[i];
104			}
105		}
106
107		spin_unlock_irq(&gtm->lock);
108	}
109
110	if (gtm)
111		return ERR_PTR(-EBUSY);
112	return ERR_PTR(-ENODEV);
113}
114EXPORT_SYMBOL(gtm_get_timer16);
115
116/**
117 * gtm_get_specific_timer - request specific GTM timer
118 * @gtm:	specific GTM, pass here GTM's device_node->data
119 * @timer:	specific timer number, Timer1 is 0.
120 * Context:	non-IRQ
121 *
122 * This function reserves GTM timer for later use. It returns gtm_timer
123 * structure to use with the rest of GTM API, you should use timer->irq
124 * to manage timer interrupt.
125 */
126struct gtm_timer *gtm_get_specific_timer16(struct gtm *gtm,
127					   unsigned int timer)
128{
129	struct gtm_timer *ret = ERR_PTR(-EBUSY);
130
131	if (timer > 3)
132		return ERR_PTR(-EINVAL);
133
134	spin_lock_irq(&gtm->lock);
135
136	if (gtm->timers[timer].requested)
137		goto out;
138
139	ret = &gtm->timers[timer];
140	ret->requested = true;
141
142out:
143	spin_unlock_irq(&gtm->lock);
144	return ret;
145}
146EXPORT_SYMBOL(gtm_get_specific_timer16);
147
148/**
149 * gtm_put_timer16 - release 16 bits GTM timer
150 * @tmr:	pointer to the gtm_timer structure obtained from gtm_get_timer
151 * Context:	any
152 *
153 * This function releases GTM timer so others may request it.
154 */
155void gtm_put_timer16(struct gtm_timer *tmr)
156{
157	gtm_stop_timer16(tmr);
158
159	spin_lock_irq(&tmr->gtm->lock);
160	tmr->requested = false;
161	spin_unlock_irq(&tmr->gtm->lock);
162}
163EXPORT_SYMBOL(gtm_put_timer16);
164
165/*
166 * This is back-end for the exported functions, it's used to reset single
167 * timer in reference mode.
168 */
169static int gtm_set_ref_timer16(struct gtm_timer *tmr, int frequency,
170			       int reference_value, bool free_run)
171{
172	struct gtm *gtm = tmr->gtm;
173	int num = tmr - &gtm->timers[0];
174	unsigned int prescaler;
175	u8 iclk = GTMDR_ICLK_ICLK;
176	u8 psr;
177	u8 sps;
178	unsigned long flags;
179	int max_prescaler = 256 * 256 * 16;
180
181	/* CPM2 doesn't have primary prescaler */
182	if (!tmr->gtpsr)
183		max_prescaler /= 256;
184
185	prescaler = gtm->clock / frequency;
186	/*
187	 * We have two 8 bit prescalers -- primary and secondary (psr, sps),
188	 * plus "slow go" mode (clk / 16). So, total prescale value is
189	 * 16 * (psr + 1) * (sps + 1). Though, for CPM2 GTMs we losing psr.
190	 */
191	if (prescaler > max_prescaler)
192		return -EINVAL;
193
194	if (prescaler > max_prescaler / 16) {
195		iclk = GTMDR_ICLK_SLGO;
196		prescaler /= 16;
197	}
198
199	if (prescaler <= 256) {
200		psr = 0;
201		sps = prescaler - 1;
202	} else {
203		psr = 256 - 1;
204		sps = prescaler / 256 - 1;
205	}
206
207	spin_lock_irqsave(&gtm->lock, flags);
208
209	/*
210	 * Properly reset timers: stop, reset, set up prescalers, reference
211	 * value and clear event register.
212	 */
213	clrsetbits_8(tmr->gtcfr, ~(GTCFR_STP(num) | GTCFR_RST(num)),
214				 GTCFR_STP(num) | GTCFR_RST(num));
215
216	setbits8(tmr->gtcfr, GTCFR_STP(num));
217
218	if (tmr->gtpsr)
219		out_be16(tmr->gtpsr, psr);
220	clrsetbits_be16(tmr->gtmdr, 0xFFFF, iclk | GTMDR_SPS(sps) |
221			GTMDR_ORI | (free_run ? GTMDR_FRR : 0));
222	out_be16(tmr->gtcnr, 0);
223	out_be16(tmr->gtrfr, reference_value);
224	out_be16(tmr->gtevr, 0xFFFF);
225
226	/* Let it be. */
227	clrbits8(tmr->gtcfr, GTCFR_STP(num));
228
229	spin_unlock_irqrestore(&gtm->lock, flags);
230
231	return 0;
232}
233
234/**
235 * gtm_set_timer16 - (re)set 16 bit timer with arbitrary precision
236 * @tmr:	pointer to the gtm_timer structure obtained from gtm_get_timer
237 * @usec:	timer interval in microseconds
238 * @reload:	if set, the timer will reset upon expiry rather than
239 *         	continue running free.
240 * Context:	any
241 *
242 * This function (re)sets the GTM timer so that it counts up to the requested
243 * interval value, and fires the interrupt when the value is reached. This
244 * function will reduce the precision of the timer as needed in order for the
245 * requested timeout to fit in a 16-bit register.
246 */
247int gtm_set_timer16(struct gtm_timer *tmr, unsigned long usec, bool reload)
248{
249	/* quite obvious, frequency which is enough for µSec precision */
250	int freq = 1000000;
251	unsigned int bit;
252
253	bit = fls_long(usec);
254	if (bit > 15) {
255		freq >>= bit - 15;
256		usec >>= bit - 15;
257	}
258
259	if (!freq)
260		return -EINVAL;
261
262	return gtm_set_ref_timer16(tmr, freq, usec, reload);
263}
264EXPORT_SYMBOL(gtm_set_timer16);
265
266/**
267 * gtm_set_exact_utimer16 - (re)set 16 bits timer
268 * @tmr:	pointer to the gtm_timer structure obtained from gtm_get_timer
269 * @usec:	timer interval in microseconds
270 * @reload:	if set, the timer will reset upon expiry rather than
271 *         	continue running free.
272 * Context:	any
273 *
274 * This function (re)sets GTM timer so that it counts up to the requested
275 * interval value, and fires the interrupt when the value is reached. If reload
276 * flag was set, timer will also reset itself upon reference value, otherwise
277 * it continues to increment.
278 *
279 * The _exact_ bit in the function name states that this function will not
280 * crop precision of the "usec" argument, thus usec is limited to 16 bits
281 * (single timer width).
282 */
283int gtm_set_exact_timer16(struct gtm_timer *tmr, u16 usec, bool reload)
284{
285	/* quite obvious, frequency which is enough for µSec precision */
286	const int freq = 1000000;
287
288	/*
289	 * We can lower the frequency (and probably power consumption) by
290	 * dividing both frequency and usec by 2 until there is no remainder.
291	 * But we won't bother with this unless savings are measured, so just
292	 * run the timer as is.
293	 */
294
295	return gtm_set_ref_timer16(tmr, freq, usec, reload);
296}
297EXPORT_SYMBOL(gtm_set_exact_timer16);
298
299/**
300 * gtm_stop_timer16 - stop single timer
301 * @tmr:	pointer to the gtm_timer structure obtained from gtm_get_timer
302 * Context:	any
303 *
304 * This function simply stops the GTM timer.
305 */
306void gtm_stop_timer16(struct gtm_timer *tmr)
307{
308	struct gtm *gtm = tmr->gtm;
309	int num = tmr - &gtm->timers[0];
310	unsigned long flags;
311
312	spin_lock_irqsave(&gtm->lock, flags);
313
314	setbits8(tmr->gtcfr, GTCFR_STP(num));
315	out_be16(tmr->gtevr, 0xFFFF);
316
317	spin_unlock_irqrestore(&gtm->lock, flags);
318}
319EXPORT_SYMBOL(gtm_stop_timer16);
320
321/**
322 * gtm_ack_timer16 - acknowledge timer event (free-run timers only)
323 * @tmr:	pointer to the gtm_timer structure obtained from gtm_get_timer
324 * @events:	events mask to ack
325 * Context:	any
326 *
327 * Thus function used to acknowledge timer interrupt event, use it inside the
328 * interrupt handler.
329 */
330void gtm_ack_timer16(struct gtm_timer *tmr, u16 events)
331{
332	out_be16(tmr->gtevr, events);
333}
334EXPORT_SYMBOL(gtm_ack_timer16);
335
336static void __init gtm_set_shortcuts(struct device_node *np,
337				     struct gtm_timer *timers,
338				     struct gtm_timers_regs __iomem *regs)
339{
340	/*
341	 * Yeah, I don't like this either, but timers' registers a bit messed,
342	 * so we have to provide shortcuts to write timer independent code.
343	 * Alternative option is to create gt*() accessors, but that will be
344	 * even uglier and cryptic.
345	 */
346	timers[0].gtcfr = &regs->gtcfr1;
347	timers[0].gtmdr = &regs->gtmdr1;
348	timers[0].gtcnr = &regs->gtcnr1;
349	timers[0].gtrfr = &regs->gtrfr1;
350	timers[0].gtevr = &regs->gtevr1;
351
352	timers[1].gtcfr = &regs->gtcfr1;
353	timers[1].gtmdr = &regs->gtmdr2;
354	timers[1].gtcnr = &regs->gtcnr2;
355	timers[1].gtrfr = &regs->gtrfr2;
356	timers[1].gtevr = &regs->gtevr2;
357
358	timers[2].gtcfr = &regs->gtcfr2;
359	timers[2].gtmdr = &regs->gtmdr3;
360	timers[2].gtcnr = &regs->gtcnr3;
361	timers[2].gtrfr = &regs->gtrfr3;
362	timers[2].gtevr = &regs->gtevr3;
363
364	timers[3].gtcfr = &regs->gtcfr2;
365	timers[3].gtmdr = &regs->gtmdr4;
366	timers[3].gtcnr = &regs->gtcnr4;
367	timers[3].gtrfr = &regs->gtrfr4;
368	timers[3].gtevr = &regs->gtevr4;
369
370	/* CPM2 doesn't have primary prescaler */
371	if (!of_device_is_compatible(np, "fsl,cpm2-gtm")) {
372		timers[0].gtpsr = &regs->gtpsr1;
373		timers[1].gtpsr = &regs->gtpsr2;
374		timers[2].gtpsr = &regs->gtpsr3;
375		timers[3].gtpsr = &regs->gtpsr4;
376	}
377}
378
379static int __init fsl_gtm_init(void)
380{
381	struct device_node *np;
382
383	for_each_compatible_node(np, NULL, "fsl,gtm") {
384		int i;
385		struct gtm *gtm;
386		const u32 *clock;
387		int size;
388
389		gtm = kzalloc(sizeof(*gtm), GFP_KERNEL);
390		if (!gtm) {
391			pr_err("%s: unable to allocate memory\n",
392				np->full_name);
393			continue;
394		}
395
396		spin_lock_init(&gtm->lock);
397
398		clock = of_get_property(np, "clock-frequency", &size);
399		if (!clock || size != sizeof(*clock)) {
400			pr_err("%s: no clock-frequency\n", np->full_name);
401			goto err;
402		}
403		gtm->clock = *clock;
404
405		for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) {
406			unsigned int irq;
 
407
408			irq = irq_of_parse_and_map(np, i);
409			if (irq == NO_IRQ) {
410				pr_err("%s: not enough interrupts specified\n",
411				       np->full_name);
412				goto err;
413			}
414			gtm->timers[i].irq = irq;
415			gtm->timers[i].gtm = gtm;
416		}
417
418		gtm->regs = of_iomap(np, 0);
419		if (!gtm->regs) {
420			pr_err("%s: unable to iomap registers\n",
421			       np->full_name);
422			goto err;
423		}
424
425		gtm_set_shortcuts(np, gtm->timers, gtm->regs);
426		list_add(&gtm->list_node, &gtms);
427
428		/* We don't want to lose the node and its ->data */
429		np->data = gtm;
430		of_node_get(np);
431
432		continue;
433err:
434		kfree(gtm);
435	}
436	return 0;
437}
438arch_initcall(fsl_gtm_init);
v3.1
  1/*
  2 * Freescale General-purpose Timers Module
  3 *
  4 * Copyright (c) Freescale Semicondutor, Inc. 2006.
  5 *               Shlomi Gridish <gridish@freescale.com>
  6 *               Jerry Huang <Chang-Ming.Huang@freescale.com>
  7 * Copyright (c) MontaVista Software, Inc. 2008.
  8 *               Anton Vorontsov <avorontsov@ru.mvista.com>
  9 *
 10 * This program is free software; you can redistribute  it and/or modify it
 11 * under  the terms of  the GNU General  Public License as published by the
 12 * Free Software Foundation;  either version 2 of the  License, or (at your
 13 * option) any later version.
 14 */
 15
 16#include <linux/kernel.h>
 17#include <linux/err.h>
 18#include <linux/errno.h>
 19#include <linux/list.h>
 20#include <linux/io.h>
 21#include <linux/of.h>
 
 
 22#include <linux/spinlock.h>
 23#include <linux/bitops.h>
 24#include <linux/slab.h>
 
 25#include <asm/fsl_gtm.h>
 26
 27#define GTCFR_STP(x)		((x) & 1 ? 1 << 5 : 1 << 1)
 28#define GTCFR_RST(x)		((x) & 1 ? 1 << 4 : 1 << 0)
 29
 30#define GTMDR_ICLK_MASK		(3 << 1)
 31#define GTMDR_ICLK_ICAS		(0 << 1)
 32#define GTMDR_ICLK_ICLK		(1 << 1)
 33#define GTMDR_ICLK_SLGO		(2 << 1)
 34#define GTMDR_FRR		(1 << 3)
 35#define GTMDR_ORI		(1 << 4)
 36#define GTMDR_SPS(x)		((x) << 8)
 37
 38struct gtm_timers_regs {
 39	u8	gtcfr1;		/* Timer 1, Timer 2 global config register */
 40	u8	res0[0x3];
 41	u8	gtcfr2;		/* Timer 3, timer 4 global config register */
 42	u8	res1[0xB];
 43	__be16	gtmdr1;		/* Timer 1 mode register */
 44	__be16	gtmdr2;		/* Timer 2 mode register */
 45	__be16	gtrfr1;		/* Timer 1 reference register */
 46	__be16	gtrfr2;		/* Timer 2 reference register */
 47	__be16	gtcpr1;		/* Timer 1 capture register */
 48	__be16	gtcpr2;		/* Timer 2 capture register */
 49	__be16	gtcnr1;		/* Timer 1 counter */
 50	__be16	gtcnr2;		/* Timer 2 counter */
 51	__be16	gtmdr3;		/* Timer 3 mode register */
 52	__be16	gtmdr4;		/* Timer 4 mode register */
 53	__be16	gtrfr3;		/* Timer 3 reference register */
 54	__be16	gtrfr4;		/* Timer 4 reference register */
 55	__be16	gtcpr3;		/* Timer 3 capture register */
 56	__be16	gtcpr4;		/* Timer 4 capture register */
 57	__be16	gtcnr3;		/* Timer 3 counter */
 58	__be16	gtcnr4;		/* Timer 4 counter */
 59	__be16	gtevr1;		/* Timer 1 event register */
 60	__be16	gtevr2;		/* Timer 2 event register */
 61	__be16	gtevr3;		/* Timer 3 event register */
 62	__be16	gtevr4;		/* Timer 4 event register */
 63	__be16	gtpsr1;		/* Timer 1 prescale register */
 64	__be16	gtpsr2;		/* Timer 2 prescale register */
 65	__be16	gtpsr3;		/* Timer 3 prescale register */
 66	__be16	gtpsr4;		/* Timer 4 prescale register */
 67	u8 res2[0x40];
 68} __attribute__ ((packed));
 69
 70struct gtm {
 71	unsigned int clock;
 72	struct gtm_timers_regs __iomem *regs;
 73	struct gtm_timer timers[4];
 74	spinlock_t lock;
 75	struct list_head list_node;
 76};
 77
 78static LIST_HEAD(gtms);
 79
 80/**
 81 * gtm_get_timer - request GTM timer to use it with the rest of GTM API
 82 * Context:	non-IRQ
 83 *
 84 * This function reserves GTM timer for later use. It returns gtm_timer
 85 * structure to use with the rest of GTM API, you should use timer->irq
 86 * to manage timer interrupt.
 87 */
 88struct gtm_timer *gtm_get_timer16(void)
 89{
 90	struct gtm *gtm = NULL;
 91	int i;
 92
 93	list_for_each_entry(gtm, &gtms, list_node) {
 94		spin_lock_irq(&gtm->lock);
 95
 96		for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) {
 97			if (!gtm->timers[i].requested) {
 98				gtm->timers[i].requested = true;
 99				spin_unlock_irq(&gtm->lock);
100				return &gtm->timers[i];
101			}
102		}
103
104		spin_unlock_irq(&gtm->lock);
105	}
106
107	if (gtm)
108		return ERR_PTR(-EBUSY);
109	return ERR_PTR(-ENODEV);
110}
111EXPORT_SYMBOL(gtm_get_timer16);
112
113/**
114 * gtm_get_specific_timer - request specific GTM timer
115 * @gtm:	specific GTM, pass here GTM's device_node->data
116 * @timer:	specific timer number, Timer1 is 0.
117 * Context:	non-IRQ
118 *
119 * This function reserves GTM timer for later use. It returns gtm_timer
120 * structure to use with the rest of GTM API, you should use timer->irq
121 * to manage timer interrupt.
122 */
123struct gtm_timer *gtm_get_specific_timer16(struct gtm *gtm,
124					   unsigned int timer)
125{
126	struct gtm_timer *ret = ERR_PTR(-EBUSY);
127
128	if (timer > 3)
129		return ERR_PTR(-EINVAL);
130
131	spin_lock_irq(&gtm->lock);
132
133	if (gtm->timers[timer].requested)
134		goto out;
135
136	ret = &gtm->timers[timer];
137	ret->requested = true;
138
139out:
140	spin_unlock_irq(&gtm->lock);
141	return ret;
142}
143EXPORT_SYMBOL(gtm_get_specific_timer16);
144
145/**
146 * gtm_put_timer16 - release 16 bits GTM timer
147 * @tmr:	pointer to the gtm_timer structure obtained from gtm_get_timer
148 * Context:	any
149 *
150 * This function releases GTM timer so others may request it.
151 */
152void gtm_put_timer16(struct gtm_timer *tmr)
153{
154	gtm_stop_timer16(tmr);
155
156	spin_lock_irq(&tmr->gtm->lock);
157	tmr->requested = false;
158	spin_unlock_irq(&tmr->gtm->lock);
159}
160EXPORT_SYMBOL(gtm_put_timer16);
161
162/*
163 * This is back-end for the exported functions, it's used to reset single
164 * timer in reference mode.
165 */
166static int gtm_set_ref_timer16(struct gtm_timer *tmr, int frequency,
167			       int reference_value, bool free_run)
168{
169	struct gtm *gtm = tmr->gtm;
170	int num = tmr - &gtm->timers[0];
171	unsigned int prescaler;
172	u8 iclk = GTMDR_ICLK_ICLK;
173	u8 psr;
174	u8 sps;
175	unsigned long flags;
176	int max_prescaler = 256 * 256 * 16;
177
178	/* CPM2 doesn't have primary prescaler */
179	if (!tmr->gtpsr)
180		max_prescaler /= 256;
181
182	prescaler = gtm->clock / frequency;
183	/*
184	 * We have two 8 bit prescalers -- primary and secondary (psr, sps),
185	 * plus "slow go" mode (clk / 16). So, total prescale value is
186	 * 16 * (psr + 1) * (sps + 1). Though, for CPM2 GTMs we losing psr.
187	 */
188	if (prescaler > max_prescaler)
189		return -EINVAL;
190
191	if (prescaler > max_prescaler / 16) {
192		iclk = GTMDR_ICLK_SLGO;
193		prescaler /= 16;
194	}
195
196	if (prescaler <= 256) {
197		psr = 0;
198		sps = prescaler - 1;
199	} else {
200		psr = 256 - 1;
201		sps = prescaler / 256 - 1;
202	}
203
204	spin_lock_irqsave(&gtm->lock, flags);
205
206	/*
207	 * Properly reset timers: stop, reset, set up prescalers, reference
208	 * value and clear event register.
209	 */
210	clrsetbits_8(tmr->gtcfr, ~(GTCFR_STP(num) | GTCFR_RST(num)),
211				 GTCFR_STP(num) | GTCFR_RST(num));
212
213	setbits8(tmr->gtcfr, GTCFR_STP(num));
214
215	if (tmr->gtpsr)
216		out_be16(tmr->gtpsr, psr);
217	clrsetbits_be16(tmr->gtmdr, 0xFFFF, iclk | GTMDR_SPS(sps) |
218			GTMDR_ORI | (free_run ? GTMDR_FRR : 0));
219	out_be16(tmr->gtcnr, 0);
220	out_be16(tmr->gtrfr, reference_value);
221	out_be16(tmr->gtevr, 0xFFFF);
222
223	/* Let it be. */
224	clrbits8(tmr->gtcfr, GTCFR_STP(num));
225
226	spin_unlock_irqrestore(&gtm->lock, flags);
227
228	return 0;
229}
230
231/**
232 * gtm_set_timer16 - (re)set 16 bit timer with arbitrary precision
233 * @tmr:	pointer to the gtm_timer structure obtained from gtm_get_timer
234 * @usec:	timer interval in microseconds
235 * @reload:	if set, the timer will reset upon expiry rather than
236 *         	continue running free.
237 * Context:	any
238 *
239 * This function (re)sets the GTM timer so that it counts up to the requested
240 * interval value, and fires the interrupt when the value is reached. This
241 * function will reduce the precision of the timer as needed in order for the
242 * requested timeout to fit in a 16-bit register.
243 */
244int gtm_set_timer16(struct gtm_timer *tmr, unsigned long usec, bool reload)
245{
246	/* quite obvious, frequency which is enough for µSec precision */
247	int freq = 1000000;
248	unsigned int bit;
249
250	bit = fls_long(usec);
251	if (bit > 15) {
252		freq >>= bit - 15;
253		usec >>= bit - 15;
254	}
255
256	if (!freq)
257		return -EINVAL;
258
259	return gtm_set_ref_timer16(tmr, freq, usec, reload);
260}
261EXPORT_SYMBOL(gtm_set_timer16);
262
263/**
264 * gtm_set_exact_utimer16 - (re)set 16 bits timer
265 * @tmr:	pointer to the gtm_timer structure obtained from gtm_get_timer
266 * @usec:	timer interval in microseconds
267 * @reload:	if set, the timer will reset upon expiry rather than
268 *         	continue running free.
269 * Context:	any
270 *
271 * This function (re)sets GTM timer so that it counts up to the requested
272 * interval value, and fires the interrupt when the value is reached. If reload
273 * flag was set, timer will also reset itself upon reference value, otherwise
274 * it continues to increment.
275 *
276 * The _exact_ bit in the function name states that this function will not
277 * crop precision of the "usec" argument, thus usec is limited to 16 bits
278 * (single timer width).
279 */
280int gtm_set_exact_timer16(struct gtm_timer *tmr, u16 usec, bool reload)
281{
282	/* quite obvious, frequency which is enough for µSec precision */
283	const int freq = 1000000;
284
285	/*
286	 * We can lower the frequency (and probably power consumption) by
287	 * dividing both frequency and usec by 2 until there is no remainder.
288	 * But we won't bother with this unless savings are measured, so just
289	 * run the timer as is.
290	 */
291
292	return gtm_set_ref_timer16(tmr, freq, usec, reload);
293}
294EXPORT_SYMBOL(gtm_set_exact_timer16);
295
296/**
297 * gtm_stop_timer16 - stop single timer
298 * @tmr:	pointer to the gtm_timer structure obtained from gtm_get_timer
299 * Context:	any
300 *
301 * This function simply stops the GTM timer.
302 */
303void gtm_stop_timer16(struct gtm_timer *tmr)
304{
305	struct gtm *gtm = tmr->gtm;
306	int num = tmr - &gtm->timers[0];
307	unsigned long flags;
308
309	spin_lock_irqsave(&gtm->lock, flags);
310
311	setbits8(tmr->gtcfr, GTCFR_STP(num));
312	out_be16(tmr->gtevr, 0xFFFF);
313
314	spin_unlock_irqrestore(&gtm->lock, flags);
315}
316EXPORT_SYMBOL(gtm_stop_timer16);
317
318/**
319 * gtm_ack_timer16 - acknowledge timer event (free-run timers only)
320 * @tmr:	pointer to the gtm_timer structure obtained from gtm_get_timer
321 * @events:	events mask to ack
322 * Context:	any
323 *
324 * Thus function used to acknowledge timer interrupt event, use it inside the
325 * interrupt handler.
326 */
327void gtm_ack_timer16(struct gtm_timer *tmr, u16 events)
328{
329	out_be16(tmr->gtevr, events);
330}
331EXPORT_SYMBOL(gtm_ack_timer16);
332
333static void __init gtm_set_shortcuts(struct device_node *np,
334				     struct gtm_timer *timers,
335				     struct gtm_timers_regs __iomem *regs)
336{
337	/*
338	 * Yeah, I don't like this either, but timers' registers a bit messed,
339	 * so we have to provide shortcuts to write timer independent code.
340	 * Alternative option is to create gt*() accessors, but that will be
341	 * even uglier and cryptic.
342	 */
343	timers[0].gtcfr = &regs->gtcfr1;
344	timers[0].gtmdr = &regs->gtmdr1;
345	timers[0].gtcnr = &regs->gtcnr1;
346	timers[0].gtrfr = &regs->gtrfr1;
347	timers[0].gtevr = &regs->gtevr1;
348
349	timers[1].gtcfr = &regs->gtcfr1;
350	timers[1].gtmdr = &regs->gtmdr2;
351	timers[1].gtcnr = &regs->gtcnr2;
352	timers[1].gtrfr = &regs->gtrfr2;
353	timers[1].gtevr = &regs->gtevr2;
354
355	timers[2].gtcfr = &regs->gtcfr2;
356	timers[2].gtmdr = &regs->gtmdr3;
357	timers[2].gtcnr = &regs->gtcnr3;
358	timers[2].gtrfr = &regs->gtrfr3;
359	timers[2].gtevr = &regs->gtevr3;
360
361	timers[3].gtcfr = &regs->gtcfr2;
362	timers[3].gtmdr = &regs->gtmdr4;
363	timers[3].gtcnr = &regs->gtcnr4;
364	timers[3].gtrfr = &regs->gtrfr4;
365	timers[3].gtevr = &regs->gtevr4;
366
367	/* CPM2 doesn't have primary prescaler */
368	if (!of_device_is_compatible(np, "fsl,cpm2-gtm")) {
369		timers[0].gtpsr = &regs->gtpsr1;
370		timers[1].gtpsr = &regs->gtpsr2;
371		timers[2].gtpsr = &regs->gtpsr3;
372		timers[3].gtpsr = &regs->gtpsr4;
373	}
374}
375
376static int __init fsl_gtm_init(void)
377{
378	struct device_node *np;
379
380	for_each_compatible_node(np, NULL, "fsl,gtm") {
381		int i;
382		struct gtm *gtm;
383		const u32 *clock;
384		int size;
385
386		gtm = kzalloc(sizeof(*gtm), GFP_KERNEL);
387		if (!gtm) {
388			pr_err("%s: unable to allocate memory\n",
389				np->full_name);
390			continue;
391		}
392
393		spin_lock_init(&gtm->lock);
394
395		clock = of_get_property(np, "clock-frequency", &size);
396		if (!clock || size != sizeof(*clock)) {
397			pr_err("%s: no clock-frequency\n", np->full_name);
398			goto err;
399		}
400		gtm->clock = *clock;
401
402		for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) {
403			int ret;
404			struct resource irq;
405
406			ret = of_irq_to_resource(np, i, &irq);
407			if (ret == NO_IRQ) {
408				pr_err("%s: not enough interrupts specified\n",
409				       np->full_name);
410				goto err;
411			}
412			gtm->timers[i].irq = irq.start;
413			gtm->timers[i].gtm = gtm;
414		}
415
416		gtm->regs = of_iomap(np, 0);
417		if (!gtm->regs) {
418			pr_err("%s: unable to iomap registers\n",
419			       np->full_name);
420			goto err;
421		}
422
423		gtm_set_shortcuts(np, gtm->timers, gtm->regs);
424		list_add(&gtm->list_node, &gtms);
425
426		/* We don't want to lose the node and its ->data */
427		np->data = gtm;
428		of_node_get(np);
429
430		continue;
431err:
432		kfree(gtm);
433	}
434	return 0;
435}
436arch_initcall(fsl_gtm_init);