1/*
 2 * setup.c - boot time setup code
 3 */
 4
 5#include <linux/init.h>
 6#include <linux/export.h>
 7
 8#include <asm/bootinfo.h>
 9#include <asm/reboot.h>
10#include <asm/time.h>
11#include <linux/ioport.h>
12
13#include <asm/mach-rc32434/rb.h>
14#include <asm/mach-rc32434/pci.h>
15
16struct pci_reg __iomem *pci_reg;
17EXPORT_SYMBOL(pci_reg);
18
19static struct resource pci0_res[] = {
20	{
21		.name = "pci_reg0",
22		.start = PCI0_BASE_ADDR,
23		.end = PCI0_BASE_ADDR + sizeof(struct pci_reg),
24		.flags = IORESOURCE_MEM,
25	}
26};
27
28static void rb_machine_restart(char *command)
29{
30	/* just jump to the reset vector */
31	writel(0x80000001, IDT434_REG_BASE + RST);
32	((void (*)(void)) KSEG1ADDR(0x1FC00000u))();
33}
34
35static void rb_machine_halt(void)
36{
37	for (;;)
38		continue;
39}
40
41void __init plat_mem_setup(void)
42{
43	u32 val;
44
45	_machine_restart = rb_machine_restart;
46	_machine_halt = rb_machine_halt;
47	pm_power_off = rb_machine_halt;
48
49	set_io_port_base(KSEG1);
50
51	pci_reg = ioremap_nocache(pci0_res[0].start,
52				pci0_res[0].end - pci0_res[0].start);
53	if (!pci_reg) {
54		printk(KERN_ERR "Could not remap PCI registers\n");
55		return;
56	}
57
58	val = __raw_readl(&pci_reg->pcic);
59	val &= 0xFFFFFF7;
60	__raw_writel(val, (void *)&pci_reg->pcic);
61
62#ifdef CONFIG_PCI
63	/* Enable PCI interrupts in EPLD Mask register */
64	*epld_mask = 0x0;
65	*(epld_mask + 1) = 0x0;
66#endif
67	write_c0_wired(0);
68}
69
70const char *get_system_type(void)
71{
72	switch (mips_machtype) {
73	case MACH_MIKROTIK_RB532A:
74		return "Mikrotik RB532A";
75		break;
76	default:
77		return "Mikrotik RB532";
78		break;
79	}
80}

 1/*
 2 * setup.c - boot time setup code
 3 */
 4
 5#include <linux/init.h>
 
 6
 7#include <asm/bootinfo.h>
 8#include <asm/reboot.h>
 9#include <asm/time.h>
10#include <linux/ioport.h>
11
12#include <asm/mach-rc32434/rb.h>
13#include <asm/mach-rc32434/pci.h>
14
15struct pci_reg __iomem *pci_reg;
16EXPORT_SYMBOL(pci_reg);
17
18static struct resource pci0_res[] = {
19	{
20		.name = "pci_reg0",
21		.start = PCI0_BASE_ADDR,
22		.end = PCI0_BASE_ADDR + sizeof(struct pci_reg),
23		.flags = IORESOURCE_MEM,
24	}
25};
26
27static void rb_machine_restart(char *command)
28{
29	/* just jump to the reset vector */
30	writel(0x80000001, IDT434_REG_BASE + RST);
31	((void (*)(void)) KSEG1ADDR(0x1FC00000u))();
32}
33
34static void rb_machine_halt(void)
35{
36	for (;;)
37		continue;
38}
39
40void __init plat_mem_setup(void)
41{
42	u32 val;
43
44	_machine_restart = rb_machine_restart;
45	_machine_halt = rb_machine_halt;
46	pm_power_off = rb_machine_halt;
47
48	set_io_port_base(KSEG1);
49
50	pci_reg = ioremap_nocache(pci0_res[0].start,
51				pci0_res[0].end - pci0_res[0].start);
52	if (!pci_reg) {
53		printk(KERN_ERR "Could not remap PCI registers\n");
54		return;
55	}
56
57	val = __raw_readl(&pci_reg->pcic);
58	val &= 0xFFFFFF7;
59	__raw_writel(val, (void *)&pci_reg->pcic);
60
61#ifdef CONFIG_PCI
62	/* Enable PCI interrupts in EPLD Mask register */
63	*epld_mask = 0x0;
64	*(epld_mask + 1) = 0x0;
65#endif
66	write_c0_wired(0);
67}
68
69const char *get_system_type(void)
70{
71	switch (mips_machtype) {
72	case MACH_MIKROTIK_RB532A:
73		return "Mikrotik RB532A";
74		break;
75	default:
76		return "Mikrotik RB532";
77		break;
78	}
79}