1/*
  2 * This file is subject to the terms and conditions of the GNU General Public
  3 * License.  See the file "COPYING" in the main directory of this archive
  4 * for more details.
  5 *
  6 * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
  7 */
  8#include <linux/init.h>
  9
 10#include <asm/cpu.h>
 11#include <asm/setup.h>
 12#include <asm/time.h>
 13#include <asm/irq.h>
 14#include <asm/mips-boards/generic.h>
 15
 16static int mips_cpu_timer_irq;
 17static int mips_cpu_perf_irq;
 18
 19static void mips_timer_dispatch(void)
 20{
 21	do_IRQ(mips_cpu_timer_irq);
 22}
 23
 24static void mips_perf_dispatch(void)
 25{
 26	do_IRQ(mips_cpu_perf_irq);
 27}
 28
 29static void __iomem *status_reg = (void __iomem *)0xbf000410;
 30
 31/*
 32 * Estimate CPU frequency.  Sets mips_hpt_frequency as a side-effect.
 33 */
 34static unsigned int __init estimate_cpu_frequency(void)
 35{
 36	unsigned int prid = read_c0_prid() & (PRID_COMP_MASK | PRID_IMP_MASK);
 37	unsigned int tick = 0;
 38	unsigned int freq;
 39	unsigned int orig;
 40	unsigned long flags;
 41
 42	local_irq_save(flags);
 43
 44	orig = readl(status_reg) & 0x2;		      /* get original sample */
 45	/* wait for transition */
 46	while ((readl(status_reg) & 0x2) == orig)
 47		;
 48	orig = orig ^ 0x2;			      /* flip the bit */
 49
 50	write_c0_count(0);
 51
 52	/* wait 1 second (the sampling clock transitions every 10ms) */
 53	while (tick < 100) {
 54		/* wait for transition */
 55		while ((readl(status_reg) & 0x2) == orig)
 56			;
 57		orig = orig ^ 0x2;			      /* flip the bit */
 58		tick++;
 59	}
 60
 61	freq = read_c0_count();
 62
 63	local_irq_restore(flags);
 64
 65	mips_hpt_frequency = freq;
 66
 67	/* Adjust for processor */
 68	if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) &&
 69		(prid != (PRID_COMP_MIPS | PRID_IMP_25KF)))
 70		freq *= 2;
 71
 72	freq += 5000;	     /* rounding */
 73	freq -= freq%10000;
 74
 75	return freq ;
 76}
 77
 78void read_persistent_clock(struct timespec *ts)
 79{
 80	ts->tv_sec = 0;
 81	ts->tv_nsec = 0;
 82}
 83
 84static void __init plat_perf_setup(void)
 85{
 86	if (cp0_perfcount_irq >= 0) {
 87		if (cpu_has_vint)
 88			set_vi_handler(cp0_perfcount_irq, mips_perf_dispatch);
 89		mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
 90	}
 91}
 92
 93unsigned int get_c0_compare_int(void)
 94{
 95	if (cpu_has_vint)
 96		set_vi_handler(cp0_compare_irq, mips_timer_dispatch);
 97	mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
 98	return mips_cpu_timer_irq;
 99}
100
101void __init plat_time_init(void)
102{
103	unsigned int est_freq;
104
105	est_freq = estimate_cpu_frequency();
106
107	pr_debug("CPU frequency %d.%02d MHz\n", (est_freq / 1000000),
108		(est_freq % 1000000) * 100 / 1000000);
109
110	mips_scroll_message();
111
112	plat_perf_setup();
113}