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1/*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#include <linux/nl80211.h>
18#include <linux/pci.h>
19#include <linux/pci-aspm.h>
20#include <linux/ath9k_platform.h>
21#include "ath9k.h"
22
23static DEFINE_PCI_DEVICE_TABLE(ath_pci_id_table) = {
24 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
25 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
26 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
27 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
28 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
29 { PCI_VDEVICE(ATHEROS, 0x002B) }, /* PCI-E */
30 { PCI_VDEVICE(ATHEROS, 0x002C) }, /* PCI-E 802.11n bonded out */
31 { PCI_VDEVICE(ATHEROS, 0x002D) }, /* PCI */
32 { PCI_VDEVICE(ATHEROS, 0x002E) }, /* PCI-E */
33 { PCI_VDEVICE(ATHEROS, 0x0030) }, /* PCI-E AR9300 */
34 { PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E AR9485 */
35 { 0 }
36};
37
38/* return bus cachesize in 4B word units */
39static void ath_pci_read_cachesize(struct ath_common *common, int *csz)
40{
41 struct ath_softc *sc = (struct ath_softc *) common->priv;
42 u8 u8tmp;
43
44 pci_read_config_byte(to_pci_dev(sc->dev), PCI_CACHE_LINE_SIZE, &u8tmp);
45 *csz = (int)u8tmp;
46
47 /*
48 * This check was put in to avoid "unpleasant" consequences if
49 * the bootrom has not fully initialized all PCI devices.
50 * Sometimes the cache line size register is not set
51 */
52
53 if (*csz == 0)
54 *csz = DEFAULT_CACHELINE >> 2; /* Use the default size */
55}
56
57static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
58{
59 struct ath_softc *sc = (struct ath_softc *) common->priv;
60 struct ath9k_platform_data *pdata = sc->dev->platform_data;
61
62 if (pdata) {
63 if (off >= (ARRAY_SIZE(pdata->eeprom_data))) {
64 ath_err(common,
65 "%s: eeprom read failed, offset %08x is out of range\n",
66 __func__, off);
67 }
68
69 *data = pdata->eeprom_data[off];
70 } else {
71 struct ath_hw *ah = (struct ath_hw *) common->ah;
72
73 common->ops->read(ah, AR5416_EEPROM_OFFSET +
74 (off << AR5416_EEPROM_S));
75
76 if (!ath9k_hw_wait(ah,
77 AR_EEPROM_STATUS_DATA,
78 AR_EEPROM_STATUS_DATA_BUSY |
79 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
80 AH_WAIT_TIMEOUT)) {
81 return false;
82 }
83
84 *data = MS(common->ops->read(ah, AR_EEPROM_STATUS_DATA),
85 AR_EEPROM_STATUS_DATA_VAL);
86 }
87
88 return true;
89}
90
91/*
92 * Bluetooth coexistance requires disabling ASPM.
93 */
94static void ath_pci_bt_coex_prep(struct ath_common *common)
95{
96 struct ath_softc *sc = (struct ath_softc *) common->priv;
97 struct pci_dev *pdev = to_pci_dev(sc->dev);
98 u8 aspm;
99
100 if (!pci_is_pcie(pdev))
101 return;
102
103 pci_read_config_byte(pdev, ATH_PCIE_CAP_LINK_CTRL, &aspm);
104 aspm &= ~(ATH_PCIE_CAP_LINK_L0S | ATH_PCIE_CAP_LINK_L1);
105 pci_write_config_byte(pdev, ATH_PCIE_CAP_LINK_CTRL, aspm);
106}
107
108static void ath_pci_extn_synch_enable(struct ath_common *common)
109{
110 struct ath_softc *sc = (struct ath_softc *) common->priv;
111 struct pci_dev *pdev = to_pci_dev(sc->dev);
112 u8 lnkctl;
113
114 pci_read_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, &lnkctl);
115 lnkctl |= PCI_EXP_LNKCTL_ES;
116 pci_write_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, lnkctl);
117}
118
119static void ath_pci_aspm_init(struct ath_common *common)
120{
121 struct ath_softc *sc = (struct ath_softc *) common->priv;
122 struct ath_hw *ah = sc->sc_ah;
123 struct pci_dev *pdev = to_pci_dev(sc->dev);
124 struct pci_dev *parent;
125 int pos;
126 u8 aspm;
127
128 if (!pci_is_pcie(pdev))
129 return;
130
131 parent = pdev->bus->self;
132 if (WARN_ON(!parent))
133 return;
134
135 pos = pci_pcie_cap(parent);
136 pci_read_config_byte(parent, pos + PCI_EXP_LNKCTL, &aspm);
137 if (aspm & (PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1)) {
138 ah->aspm_enabled = true;
139 /* Initialize PCIe PM and SERDES registers. */
140 ath9k_hw_configpcipowersave(ah, 0, 0);
141 }
142}
143
144static const struct ath_bus_ops ath_pci_bus_ops = {
145 .ath_bus_type = ATH_PCI,
146 .read_cachesize = ath_pci_read_cachesize,
147 .eeprom_read = ath_pci_eeprom_read,
148 .bt_coex_prep = ath_pci_bt_coex_prep,
149 .extn_synch_en = ath_pci_extn_synch_enable,
150 .aspm_init = ath_pci_aspm_init,
151};
152
153static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
154{
155 void __iomem *mem;
156 struct ath_softc *sc;
157 struct ieee80211_hw *hw;
158 u8 csz;
159 u16 subsysid;
160 u32 val;
161 int ret = 0;
162 char hw_name[64];
163
164 if (pci_enable_device(pdev))
165 return -EIO;
166
167 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
168 if (ret) {
169 printk(KERN_ERR "ath9k: 32-bit DMA not available\n");
170 goto err_dma;
171 }
172
173 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
174 if (ret) {
175 printk(KERN_ERR "ath9k: 32-bit DMA consistent "
176 "DMA enable failed\n");
177 goto err_dma;
178 }
179
180 /*
181 * Cache line size is used to size and align various
182 * structures used to communicate with the hardware.
183 */
184 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
185 if (csz == 0) {
186 /*
187 * Linux 2.4.18 (at least) writes the cache line size
188 * register as a 16-bit wide register which is wrong.
189 * We must have this setup properly for rx buffer
190 * DMA to work so force a reasonable value here if it
191 * comes up zero.
192 */
193 csz = L1_CACHE_BYTES / sizeof(u32);
194 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
195 }
196 /*
197 * The default setting of latency timer yields poor results,
198 * set it to the value used by other systems. It may be worth
199 * tweaking this setting more.
200 */
201 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
202
203 pci_set_master(pdev);
204
205 /*
206 * Disable the RETRY_TIMEOUT register (0x41) to keep
207 * PCI Tx retries from interfering with C3 CPU state.
208 */
209 pci_read_config_dword(pdev, 0x40, &val);
210 if ((val & 0x0000ff00) != 0)
211 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
212
213 ret = pci_request_region(pdev, 0, "ath9k");
214 if (ret) {
215 dev_err(&pdev->dev, "PCI memory region reserve error\n");
216 ret = -ENODEV;
217 goto err_region;
218 }
219
220 mem = pci_iomap(pdev, 0, 0);
221 if (!mem) {
222 printk(KERN_ERR "PCI memory map error\n") ;
223 ret = -EIO;
224 goto err_iomap;
225 }
226
227 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
228 if (!hw) {
229 dev_err(&pdev->dev, "No memory for ieee80211_hw\n");
230 ret = -ENOMEM;
231 goto err_alloc_hw;
232 }
233
234 SET_IEEE80211_DEV(hw, &pdev->dev);
235 pci_set_drvdata(pdev, hw);
236
237 sc = hw->priv;
238 sc->hw = hw;
239 sc->dev = &pdev->dev;
240 sc->mem = mem;
241
242 /* Will be cleared in ath9k_start() */
243 sc->sc_flags |= SC_OP_INVALID;
244
245 ret = request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath9k", sc);
246 if (ret) {
247 dev_err(&pdev->dev, "request_irq failed\n");
248 goto err_irq;
249 }
250
251 sc->irq = pdev->irq;
252
253 pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsysid);
254 ret = ath9k_init_device(id->device, sc, subsysid, &ath_pci_bus_ops);
255 if (ret) {
256 dev_err(&pdev->dev, "Failed to initialize device\n");
257 goto err_init;
258 }
259
260 ath9k_hw_name(sc->sc_ah, hw_name, sizeof(hw_name));
261 wiphy_info(hw->wiphy, "%s mem=0x%lx, irq=%d\n",
262 hw_name, (unsigned long)mem, pdev->irq);
263
264 return 0;
265
266err_init:
267 free_irq(sc->irq, sc);
268err_irq:
269 ieee80211_free_hw(hw);
270err_alloc_hw:
271 pci_iounmap(pdev, mem);
272err_iomap:
273 pci_release_region(pdev, 0);
274err_region:
275 /* Nothing */
276err_dma:
277 pci_disable_device(pdev);
278 return ret;
279}
280
281static void ath_pci_remove(struct pci_dev *pdev)
282{
283 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
284 struct ath_softc *sc = hw->priv;
285 void __iomem *mem = sc->mem;
286
287 if (!is_ath9k_unloaded)
288 sc->sc_ah->ah_flags |= AH_UNPLUGGED;
289 ath9k_deinit_device(sc);
290 free_irq(sc->irq, sc);
291 ieee80211_free_hw(sc->hw);
292
293 pci_iounmap(pdev, mem);
294 pci_disable_device(pdev);
295 pci_release_region(pdev, 0);
296}
297
298#ifdef CONFIG_PM
299
300static int ath_pci_suspend(struct device *device)
301{
302 struct pci_dev *pdev = to_pci_dev(device);
303 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
304 struct ath_softc *sc = hw->priv;
305
306 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 1);
307
308 /* The device has to be moved to FULLSLEEP forcibly.
309 * Otherwise the chip never moved to full sleep,
310 * when no interface is up.
311 */
312 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
313
314 return 0;
315}
316
317static int ath_pci_resume(struct device *device)
318{
319 struct pci_dev *pdev = to_pci_dev(device);
320 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
321 struct ath_softc *sc = hw->priv;
322 u32 val;
323
324 /*
325 * Suspend/Resume resets the PCI configuration space, so we have to
326 * re-disable the RETRY_TIMEOUT register (0x41) to keep
327 * PCI Tx retries from interfering with C3 CPU state
328 */
329 pci_read_config_dword(pdev, 0x40, &val);
330 if ((val & 0x0000ff00) != 0)
331 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
332
333 /* Enable LED */
334 ath9k_hw_cfg_output(sc->sc_ah, sc->sc_ah->led_pin,
335 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
336 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 1);
337
338 /*
339 * Reset key cache to sane defaults (all entries cleared) instead of
340 * semi-random values after suspend/resume.
341 */
342 ath9k_ps_wakeup(sc);
343 ath9k_init_crypto(sc);
344 ath9k_ps_restore(sc);
345
346 sc->ps_idle = true;
347 ath_radio_disable(sc, hw);
348
349 return 0;
350}
351
352static const struct dev_pm_ops ath9k_pm_ops = {
353 .suspend = ath_pci_suspend,
354 .resume = ath_pci_resume,
355 .freeze = ath_pci_suspend,
356 .thaw = ath_pci_resume,
357 .poweroff = ath_pci_suspend,
358 .restore = ath_pci_resume,
359};
360
361#define ATH9K_PM_OPS (&ath9k_pm_ops)
362
363#else /* !CONFIG_PM */
364
365#define ATH9K_PM_OPS NULL
366
367#endif /* !CONFIG_PM */
368
369
370MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
371
372static struct pci_driver ath_pci_driver = {
373 .name = "ath9k",
374 .id_table = ath_pci_id_table,
375 .probe = ath_pci_probe,
376 .remove = ath_pci_remove,
377 .driver.pm = ATH9K_PM_OPS,
378};
379
380int ath_pci_init(void)
381{
382 return pci_register_driver(&ath_pci_driver);
383}
384
385void ath_pci_exit(void)
386{
387 pci_unregister_driver(&ath_pci_driver);
388}
1/*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18
19#include <linux/nl80211.h>
20#include <linux/pci.h>
21#include <linux/module.h>
22#include "ath9k.h"
23
24extern int ath9k_use_msi;
25
26static const struct pci_device_id ath_pci_id_table[] = {
27 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
28 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
29 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
30
31#ifdef CONFIG_ATH9K_PCOEM
32 /* Mini PCI AR9220 MB92 cards: Compex WLM200NX, Wistron DNMA-92 */
33 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
34 0x0029,
35 PCI_VENDOR_ID_ATHEROS,
36 0x2096),
37 .driver_data = ATH9K_PCI_LED_ACT_HI },
38#endif
39
40 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
41
42#ifdef CONFIG_ATH9K_PCOEM
43 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
44 0x002A,
45 PCI_VENDOR_ID_AZWAVE,
46 0x1C71),
47 .driver_data = ATH9K_PCI_D3_L1_WAR },
48 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
49 0x002A,
50 PCI_VENDOR_ID_FOXCONN,
51 0xE01F),
52 .driver_data = ATH9K_PCI_D3_L1_WAR },
53 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
54 0x002A,
55 0x11AD, /* LITEON */
56 0x6632),
57 .driver_data = ATH9K_PCI_D3_L1_WAR },
58 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
59 0x002A,
60 0x11AD, /* LITEON */
61 0x6642),
62 .driver_data = ATH9K_PCI_D3_L1_WAR },
63 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
64 0x002A,
65 PCI_VENDOR_ID_QMI,
66 0x0306),
67 .driver_data = ATH9K_PCI_D3_L1_WAR },
68 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
69 0x002A,
70 0x185F, /* WNC */
71 0x309D),
72 .driver_data = ATH9K_PCI_D3_L1_WAR },
73 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
74 0x002A,
75 0x10CF, /* Fujitsu */
76 0x147C),
77 .driver_data = ATH9K_PCI_D3_L1_WAR },
78 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
79 0x002A,
80 0x10CF, /* Fujitsu */
81 0x147D),
82 .driver_data = ATH9K_PCI_D3_L1_WAR },
83 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
84 0x002A,
85 0x10CF, /* Fujitsu */
86 0x1536),
87 .driver_data = ATH9K_PCI_D3_L1_WAR },
88#endif
89
90 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
91
92#ifdef CONFIG_ATH9K_PCOEM
93 /* AR9285 card for Asus */
94 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
95 0x002B,
96 PCI_VENDOR_ID_AZWAVE,
97 0x2C37),
98 .driver_data = ATH9K_PCI_BT_ANT_DIV },
99#endif
100
101 { PCI_VDEVICE(ATHEROS, 0x002B) }, /* PCI-E */
102 { PCI_VDEVICE(ATHEROS, 0x002C) }, /* PCI-E 802.11n bonded out */
103 { PCI_VDEVICE(ATHEROS, 0x002D) }, /* PCI */
104 { PCI_VDEVICE(ATHEROS, 0x002E) }, /* PCI-E */
105
106 /* Killer Wireless (3x3) */
107 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
108 0x0030,
109 0x1A56,
110 0x2000),
111 .driver_data = ATH9K_PCI_KILLER },
112 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
113 0x0030,
114 0x1A56,
115 0x2001),
116 .driver_data = ATH9K_PCI_KILLER },
117
118 { PCI_VDEVICE(ATHEROS, 0x0030) }, /* PCI-E AR9300 */
119
120#ifdef CONFIG_ATH9K_PCOEM
121 /* PCI-E CUS198 */
122 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
123 0x0032,
124 PCI_VENDOR_ID_AZWAVE,
125 0x2086),
126 .driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
127 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
128 0x0032,
129 PCI_VENDOR_ID_AZWAVE,
130 0x1237),
131 .driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
132 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
133 0x0032,
134 PCI_VENDOR_ID_AZWAVE,
135 0x2126),
136 .driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
137 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
138 0x0032,
139 PCI_VENDOR_ID_AZWAVE,
140 0x126A),
141 .driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
142
143 /* PCI-E CUS230 */
144 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
145 0x0032,
146 PCI_VENDOR_ID_AZWAVE,
147 0x2152),
148 .driver_data = ATH9K_PCI_CUS230 | ATH9K_PCI_BT_ANT_DIV },
149 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
150 0x0032,
151 PCI_VENDOR_ID_FOXCONN,
152 0xE075),
153 .driver_data = ATH9K_PCI_CUS230 | ATH9K_PCI_BT_ANT_DIV },
154
155 /* WB225 */
156 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
157 0x0032,
158 PCI_VENDOR_ID_ATHEROS,
159 0x3119),
160 .driver_data = ATH9K_PCI_BT_ANT_DIV },
161 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
162 0x0032,
163 PCI_VENDOR_ID_ATHEROS,
164 0x3122),
165 .driver_data = ATH9K_PCI_BT_ANT_DIV },
166 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
167 0x0032,
168 0x185F, /* WNC */
169 0x3119),
170 .driver_data = ATH9K_PCI_BT_ANT_DIV },
171 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
172 0x0032,
173 0x185F, /* WNC */
174 0x3027),
175 .driver_data = ATH9K_PCI_BT_ANT_DIV },
176 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
177 0x0032,
178 PCI_VENDOR_ID_SAMSUNG,
179 0x4105),
180 .driver_data = ATH9K_PCI_BT_ANT_DIV },
181 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
182 0x0032,
183 PCI_VENDOR_ID_SAMSUNG,
184 0x4106),
185 .driver_data = ATH9K_PCI_BT_ANT_DIV },
186 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
187 0x0032,
188 PCI_VENDOR_ID_SAMSUNG,
189 0x410D),
190 .driver_data = ATH9K_PCI_BT_ANT_DIV },
191 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
192 0x0032,
193 PCI_VENDOR_ID_SAMSUNG,
194 0x410E),
195 .driver_data = ATH9K_PCI_BT_ANT_DIV },
196 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
197 0x0032,
198 PCI_VENDOR_ID_SAMSUNG,
199 0x410F),
200 .driver_data = ATH9K_PCI_BT_ANT_DIV },
201 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
202 0x0032,
203 PCI_VENDOR_ID_SAMSUNG,
204 0xC706),
205 .driver_data = ATH9K_PCI_BT_ANT_DIV },
206 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
207 0x0032,
208 PCI_VENDOR_ID_SAMSUNG,
209 0xC680),
210 .driver_data = ATH9K_PCI_BT_ANT_DIV },
211 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
212 0x0032,
213 PCI_VENDOR_ID_SAMSUNG,
214 0xC708),
215 .driver_data = ATH9K_PCI_BT_ANT_DIV },
216 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
217 0x0032,
218 PCI_VENDOR_ID_LENOVO,
219 0x3218),
220 .driver_data = ATH9K_PCI_BT_ANT_DIV },
221 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
222 0x0032,
223 PCI_VENDOR_ID_LENOVO,
224 0x3219),
225 .driver_data = ATH9K_PCI_BT_ANT_DIV },
226
227 /* AR9485 cards with PLL power-save disabled by default. */
228 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
229 0x0032,
230 PCI_VENDOR_ID_AZWAVE,
231 0x2C97),
232 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
233 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
234 0x0032,
235 PCI_VENDOR_ID_AZWAVE,
236 0x2100),
237 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
238 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
239 0x0032,
240 0x1C56, /* ASKEY */
241 0x4001),
242 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
243 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
244 0x0032,
245 0x11AD, /* LITEON */
246 0x6627),
247 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
248 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
249 0x0032,
250 0x11AD, /* LITEON */
251 0x6628),
252 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
253 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
254 0x0032,
255 PCI_VENDOR_ID_FOXCONN,
256 0xE04E),
257 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
258 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
259 0x0032,
260 PCI_VENDOR_ID_FOXCONN,
261 0xE04F),
262 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
263 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
264 0x0032,
265 0x144F, /* ASKEY */
266 0x7197),
267 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
268 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
269 0x0032,
270 0x1B9A, /* XAVI */
271 0x2000),
272 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
273 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
274 0x0032,
275 0x1B9A, /* XAVI */
276 0x2001),
277 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
278 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
279 0x0032,
280 PCI_VENDOR_ID_AZWAVE,
281 0x1186),
282 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
283 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
284 0x0032,
285 PCI_VENDOR_ID_AZWAVE,
286 0x1F86),
287 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
288 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
289 0x0032,
290 PCI_VENDOR_ID_AZWAVE,
291 0x1195),
292 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
293 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
294 0x0032,
295 PCI_VENDOR_ID_AZWAVE,
296 0x1F95),
297 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
298 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
299 0x0032,
300 0x1B9A, /* XAVI */
301 0x1C00),
302 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
303 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
304 0x0032,
305 0x1B9A, /* XAVI */
306 0x1C01),
307 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
308 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
309 0x0032,
310 PCI_VENDOR_ID_ASUSTEK,
311 0x850D),
312 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
313#endif
314
315 { PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E AR9485 */
316 { PCI_VDEVICE(ATHEROS, 0x0033) }, /* PCI-E AR9580 */
317
318#ifdef CONFIG_ATH9K_PCOEM
319 /* PCI-E CUS217 */
320 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
321 0x0034,
322 PCI_VENDOR_ID_AZWAVE,
323 0x2116),
324 .driver_data = ATH9K_PCI_CUS217 },
325 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
326 0x0034,
327 0x11AD, /* LITEON */
328 0x6661),
329 .driver_data = ATH9K_PCI_CUS217 },
330
331 /* AR9462 with WoW support */
332 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
333 0x0034,
334 PCI_VENDOR_ID_ATHEROS,
335 0x3117),
336 .driver_data = ATH9K_PCI_WOW },
337 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
338 0x0034,
339 PCI_VENDOR_ID_LENOVO,
340 0x3214),
341 .driver_data = ATH9K_PCI_WOW },
342 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
343 0x0034,
344 PCI_VENDOR_ID_ATTANSIC,
345 0x0091),
346 .driver_data = ATH9K_PCI_WOW },
347 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
348 0x0034,
349 PCI_VENDOR_ID_AZWAVE,
350 0x2110),
351 .driver_data = ATH9K_PCI_WOW },
352 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
353 0x0034,
354 PCI_VENDOR_ID_ASUSTEK,
355 0x850E),
356 .driver_data = ATH9K_PCI_WOW },
357 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
358 0x0034,
359 0x11AD, /* LITEON */
360 0x6631),
361 .driver_data = ATH9K_PCI_WOW },
362 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
363 0x0034,
364 0x11AD, /* LITEON */
365 0x6641),
366 .driver_data = ATH9K_PCI_WOW },
367 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
368 0x0034,
369 PCI_VENDOR_ID_HP,
370 0x1864),
371 .driver_data = ATH9K_PCI_WOW },
372 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
373 0x0034,
374 0x14CD, /* USI */
375 0x0063),
376 .driver_data = ATH9K_PCI_WOW },
377 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
378 0x0034,
379 0x14CD, /* USI */
380 0x0064),
381 .driver_data = ATH9K_PCI_WOW },
382 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
383 0x0034,
384 0x10CF, /* Fujitsu */
385 0x1783),
386 .driver_data = ATH9K_PCI_WOW },
387 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
388 0x0034,
389 PCI_VENDOR_ID_DELL,
390 0x020B),
391 .driver_data = ATH9K_PCI_WOW },
392 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
393 0x0034,
394 PCI_VENDOR_ID_DELL,
395 0x0300),
396 .driver_data = ATH9K_PCI_WOW },
397
398 /* Killer Wireless (2x2) */
399 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
400 0x0030,
401 0x1A56,
402 0x2003),
403 .driver_data = ATH9K_PCI_KILLER },
404
405 { PCI_VDEVICE(ATHEROS, 0x0034) }, /* PCI-E AR9462 */
406 { PCI_VDEVICE(ATHEROS, 0x0037) }, /* PCI-E AR1111/AR9485 */
407
408 /* CUS252 */
409 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
410 0x0036,
411 PCI_VENDOR_ID_ATHEROS,
412 0x3028),
413 .driver_data = ATH9K_PCI_CUS252 |
414 ATH9K_PCI_AR9565_2ANT |
415 ATH9K_PCI_BT_ANT_DIV },
416 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
417 0x0036,
418 PCI_VENDOR_ID_AZWAVE,
419 0x2176),
420 .driver_data = ATH9K_PCI_CUS252 |
421 ATH9K_PCI_AR9565_2ANT |
422 ATH9K_PCI_BT_ANT_DIV },
423
424 /* WB335 1-ANT */
425 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
426 0x0036,
427 PCI_VENDOR_ID_FOXCONN,
428 0xE068),
429 .driver_data = ATH9K_PCI_AR9565_1ANT },
430 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
431 0x0036,
432 0x185F, /* WNC */
433 0xA119),
434 .driver_data = ATH9K_PCI_AR9565_1ANT },
435 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
436 0x0036,
437 0x11AD, /* LITEON */
438 0x0632),
439 .driver_data = ATH9K_PCI_AR9565_1ANT },
440 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
441 0x0036,
442 0x11AD, /* LITEON */
443 0x06B2),
444 .driver_data = ATH9K_PCI_AR9565_1ANT },
445 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
446 0x0036,
447 0x11AD, /* LITEON */
448 0x0842),
449 .driver_data = ATH9K_PCI_AR9565_1ANT },
450 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
451 0x0036,
452 0x11AD, /* LITEON */
453 0x1842),
454 .driver_data = ATH9K_PCI_AR9565_1ANT },
455 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
456 0x0036,
457 0x11AD, /* LITEON */
458 0x6671),
459 .driver_data = ATH9K_PCI_AR9565_1ANT },
460 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
461 0x0036,
462 0x1B9A, /* XAVI */
463 0x2811),
464 .driver_data = ATH9K_PCI_AR9565_1ANT },
465 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
466 0x0036,
467 0x1B9A, /* XAVI */
468 0x2812),
469 .driver_data = ATH9K_PCI_AR9565_1ANT },
470 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
471 0x0036,
472 0x1B9A, /* XAVI */
473 0x28A1),
474 .driver_data = ATH9K_PCI_AR9565_1ANT },
475 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
476 0x0036,
477 0x1B9A, /* XAVI */
478 0x28A3),
479 .driver_data = ATH9K_PCI_AR9565_1ANT },
480 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
481 0x0036,
482 PCI_VENDOR_ID_AZWAVE,
483 0x218A),
484 .driver_data = ATH9K_PCI_AR9565_1ANT },
485 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
486 0x0036,
487 PCI_VENDOR_ID_AZWAVE,
488 0x2F8A),
489 .driver_data = ATH9K_PCI_AR9565_1ANT },
490
491 /* WB335 1-ANT / Antenna Diversity */
492 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
493 0x0036,
494 PCI_VENDOR_ID_ATHEROS,
495 0x3025),
496 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
497 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
498 0x0036,
499 PCI_VENDOR_ID_ATHEROS,
500 0x3026),
501 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
502 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
503 0x0036,
504 PCI_VENDOR_ID_ATHEROS,
505 0x302B),
506 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
507 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
508 0x0036,
509 PCI_VENDOR_ID_FOXCONN,
510 0xE069),
511 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
512 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
513 0x0036,
514 0x185F, /* WNC */
515 0x3028),
516 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
517 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
518 0x0036,
519 0x11AD, /* LITEON */
520 0x0622),
521 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
522 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
523 0x0036,
524 0x11AD, /* LITEON */
525 0x0672),
526 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
527 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
528 0x0036,
529 0x11AD, /* LITEON */
530 0x0662),
531 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
532 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
533 0x0036,
534 0x11AD, /* LITEON */
535 0x06A2),
536 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
537 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
538 0x0036,
539 0x11AD, /* LITEON */
540 0x0682),
541 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
542 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
543 0x0036,
544 PCI_VENDOR_ID_AZWAVE,
545 0x213A),
546 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
547 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
548 0x0036,
549 PCI_VENDOR_ID_AZWAVE,
550 0x213C),
551 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
552 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
553 0x0036,
554 PCI_VENDOR_ID_HP,
555 0x18E3),
556 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
557 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
558 0x0036,
559 PCI_VENDOR_ID_HP,
560 0x217F),
561 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
562 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
563 0x0036,
564 PCI_VENDOR_ID_HP,
565 0x2005),
566 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
567 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
568 0x0036,
569 PCI_VENDOR_ID_DELL,
570 0x020C),
571 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
572
573 /* WB335 2-ANT / Antenna-Diversity */
574 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
575 0x0036,
576 PCI_VENDOR_ID_SAMSUNG,
577 0x411A),
578 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
579 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
580 0x0036,
581 PCI_VENDOR_ID_SAMSUNG,
582 0x411B),
583 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
584 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
585 0x0036,
586 PCI_VENDOR_ID_SAMSUNG,
587 0x411C),
588 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
589 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
590 0x0036,
591 PCI_VENDOR_ID_SAMSUNG,
592 0x411D),
593 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
594 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
595 0x0036,
596 PCI_VENDOR_ID_SAMSUNG,
597 0x411E),
598 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
599 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
600 0x0036,
601 PCI_VENDOR_ID_SAMSUNG,
602 0x4129),
603 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
604 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
605 0x0036,
606 PCI_VENDOR_ID_SAMSUNG,
607 0x412A),
608 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
609 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
610 0x0036,
611 PCI_VENDOR_ID_ATHEROS,
612 0x3027),
613 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
614 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
615 0x0036,
616 PCI_VENDOR_ID_ATHEROS,
617 0x302C),
618 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
619 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
620 0x0036,
621 0x11AD, /* LITEON */
622 0x0642),
623 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
624 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
625 0x0036,
626 0x11AD, /* LITEON */
627 0x0652),
628 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
629 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
630 0x0036,
631 0x11AD, /* LITEON */
632 0x0612),
633 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
634 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
635 0x0036,
636 0x11AD, /* LITEON */
637 0x0832),
638 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
639 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
640 0x0036,
641 0x11AD, /* LITEON */
642 0x1832),
643 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
644 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
645 0x0036,
646 0x11AD, /* LITEON */
647 0x0692),
648 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
649 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
650 0x0036,
651 0x11AD, /* LITEON */
652 0x0803),
653 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
654 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
655 0x0036,
656 0x11AD, /* LITEON */
657 0x0813),
658 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
659 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
660 0x0036,
661 PCI_VENDOR_ID_AZWAVE,
662 0x2130),
663 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
664 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
665 0x0036,
666 PCI_VENDOR_ID_AZWAVE,
667 0x213B),
668 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
669 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
670 0x0036,
671 PCI_VENDOR_ID_AZWAVE,
672 0x2182),
673 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
674 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
675 0x0036,
676 PCI_VENDOR_ID_AZWAVE,
677 0x218B),
678 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
679 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
680 0x0036,
681 PCI_VENDOR_ID_AZWAVE,
682 0x218C),
683 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
684 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
685 0x0036,
686 PCI_VENDOR_ID_AZWAVE,
687 0x2F82),
688 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
689 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
690 0x0036,
691 0x144F, /* ASKEY */
692 0x7202),
693 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
694 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
695 0x0036,
696 0x1B9A, /* XAVI */
697 0x2810),
698 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
699 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
700 0x0036,
701 0x1B9A, /* XAVI */
702 0x2813),
703 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
704 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
705 0x0036,
706 0x1B9A, /* XAVI */
707 0x28A2),
708 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
709 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
710 0x0036,
711 0x1B9A, /* XAVI */
712 0x28A4),
713 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
714 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
715 0x0036,
716 0x185F, /* WNC */
717 0x3027),
718 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
719 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
720 0x0036,
721 0x185F, /* WNC */
722 0xA120),
723 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
724 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
725 0x0036,
726 PCI_VENDOR_ID_FOXCONN,
727 0xE07F),
728 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
729 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
730 0x0036,
731 PCI_VENDOR_ID_FOXCONN,
732 0xE08F),
733 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
734 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
735 0x0036,
736 PCI_VENDOR_ID_FOXCONN,
737 0xE081),
738 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
739 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
740 0x0036,
741 PCI_VENDOR_ID_FOXCONN,
742 0xE091),
743 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
744 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
745 0x0036,
746 PCI_VENDOR_ID_FOXCONN,
747 0xE099),
748 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
749 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
750 0x0036,
751 PCI_VENDOR_ID_LENOVO,
752 0x3026),
753 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
754 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
755 0x0036,
756 PCI_VENDOR_ID_LENOVO,
757 0x4026),
758 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
759 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
760 0x0036,
761 PCI_VENDOR_ID_ASUSTEK,
762 0x85F2),
763 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
764 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
765 0x0036,
766 PCI_VENDOR_ID_DELL,
767 0x020E),
768 .driver_data = ATH9K_PCI_AR9565_2ANT |
769 ATH9K_PCI_BT_ANT_DIV |
770 ATH9K_PCI_LED_ACT_HI},
771
772 /* PCI-E AR9565 (WB335) */
773 { PCI_VDEVICE(ATHEROS, 0x0036),
774 .driver_data = ATH9K_PCI_BT_ANT_DIV },
775#endif
776
777 { 0 }
778};
779
780
781/* return bus cachesize in 4B word units */
782static void ath_pci_read_cachesize(struct ath_common *common, int *csz)
783{
784 struct ath_softc *sc = common->priv;
785 u8 u8tmp;
786
787 pci_read_config_byte(to_pci_dev(sc->dev), PCI_CACHE_LINE_SIZE, &u8tmp);
788 *csz = (int)u8tmp;
789
790 /*
791 * This check was put in to avoid "unpleasant" consequences if
792 * the bootrom has not fully initialized all PCI devices.
793 * Sometimes the cache line size register is not set
794 */
795
796 if (*csz == 0)
797 *csz = DEFAULT_CACHELINE >> 2; /* Use the default size */
798}
799
800static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
801{
802 struct ath_hw *ah = common->ah;
803
804 common->ops->read(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
805
806 if (!ath9k_hw_wait(ah,
807 AR_EEPROM_STATUS_DATA(ah),
808 AR_EEPROM_STATUS_DATA_BUSY |
809 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
810 AH_WAIT_TIMEOUT)) {
811 return false;
812 }
813
814 *data = MS(common->ops->read(ah, AR_EEPROM_STATUS_DATA(ah)),
815 AR_EEPROM_STATUS_DATA_VAL);
816
817 return true;
818}
819
820/* Need to be called after we discover btcoex capabilities */
821static void ath_pci_aspm_init(struct ath_common *common)
822{
823 struct ath_softc *sc = common->priv;
824 struct ath_hw *ah = sc->sc_ah;
825 struct pci_dev *pdev = to_pci_dev(sc->dev);
826 struct pci_dev *parent;
827 u16 aspm;
828 int ret;
829
830 if (!ah->is_pciexpress)
831 return;
832
833 parent = pdev->bus->self;
834 if (!parent)
835 return;
836
837 if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) &&
838 (AR_SREV_9285(ah))) {
839 /* Bluetooth coexistence requires disabling ASPM. */
840 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL,
841 PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1);
842
843 /*
844 * Both upstream and downstream PCIe components should
845 * have the same ASPM settings.
846 */
847 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
848 PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1);
849
850 ath_info(common, "Disabling ASPM since BTCOEX is enabled\n");
851 return;
852 }
853
854 /*
855 * 0x70c - Ack Frequency Register.
856 *
857 * Bits 27:29 - DEFAULT_L1_ENTRANCE_LATENCY.
858 *
859 * 000 : 1 us
860 * 001 : 2 us
861 * 010 : 4 us
862 * 011 : 8 us
863 * 100 : 16 us
864 * 101 : 32 us
865 * 110/111 : 64 us
866 */
867 if (AR_SREV_9462(ah))
868 pci_read_config_dword(pdev, 0x70c, &ah->config.aspm_l1_fix);
869
870 ret = pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm);
871 if (!ret && (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1))) {
872 ah->aspm_enabled = true;
873 /* Initialize PCIe PM and SERDES registers. */
874 ath9k_hw_configpcipowersave(ah, false);
875 ath_info(common, "ASPM enabled: 0x%x\n", aspm);
876 }
877}
878
879static const struct ath_bus_ops ath_pci_bus_ops = {
880 .ath_bus_type = ATH_PCI,
881 .read_cachesize = ath_pci_read_cachesize,
882 .eeprom_read = ath_pci_eeprom_read,
883 .aspm_init = ath_pci_aspm_init,
884};
885
886static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
887{
888 struct ath_softc *sc;
889 struct ieee80211_hw *hw;
890 u8 csz;
891 u32 val;
892 int ret = 0;
893 char hw_name[64];
894 int msi_enabled = 0;
895
896 if (pcim_enable_device(pdev))
897 return -EIO;
898
899 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
900 if (ret) {
901 pr_err("32-bit DMA not available\n");
902 return ret;
903 }
904
905 /*
906 * Cache line size is used to size and align various
907 * structures used to communicate with the hardware.
908 */
909 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
910 if (csz == 0) {
911 /*
912 * Linux 2.4.18 (at least) writes the cache line size
913 * register as a 16-bit wide register which is wrong.
914 * We must have this setup properly for rx buffer
915 * DMA to work so force a reasonable value here if it
916 * comes up zero.
917 */
918 csz = L1_CACHE_BYTES / sizeof(u32);
919 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
920 }
921 /*
922 * The default setting of latency timer yields poor results,
923 * set it to the value used by other systems. It may be worth
924 * tweaking this setting more.
925 */
926 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
927
928 pci_set_master(pdev);
929
930 /*
931 * Disable the RETRY_TIMEOUT register (0x41) to keep
932 * PCI Tx retries from interfering with C3 CPU state.
933 */
934 pci_read_config_dword(pdev, 0x40, &val);
935 if ((val & 0x0000ff00) != 0)
936 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
937
938 ret = pcim_iomap_regions(pdev, BIT(0), "ath9k");
939 if (ret) {
940 dev_err(&pdev->dev, "PCI memory region reserve error\n");
941 return -ENODEV;
942 }
943
944 ath9k_fill_chanctx_ops();
945 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
946 if (!hw) {
947 dev_err(&pdev->dev, "No memory for ieee80211_hw\n");
948 return -ENOMEM;
949 }
950
951 SET_IEEE80211_DEV(hw, &pdev->dev);
952 pci_set_drvdata(pdev, hw);
953
954 sc = hw->priv;
955 sc->hw = hw;
956 sc->dev = &pdev->dev;
957 sc->mem = pcim_iomap_table(pdev)[0];
958 sc->driver_data = id->driver_data;
959
960 if (ath9k_use_msi) {
961 if (pci_enable_msi(pdev) == 0) {
962 msi_enabled = 1;
963 dev_err(&pdev->dev, "Using MSI\n");
964 } else {
965 dev_err(&pdev->dev, "Using INTx\n");
966 }
967 }
968
969 if (!msi_enabled)
970 ret = request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath9k", sc);
971 else
972 ret = request_irq(pdev->irq, ath_isr, 0, "ath9k", sc);
973
974 if (ret) {
975 dev_err(&pdev->dev, "request_irq failed\n");
976 goto err_irq;
977 }
978
979 sc->irq = pdev->irq;
980
981 ret = ath9k_init_device(id->device, sc, &ath_pci_bus_ops);
982 if (ret) {
983 dev_err(&pdev->dev, "Failed to initialize device\n");
984 goto err_init;
985 }
986
987 sc->sc_ah->msi_enabled = msi_enabled;
988 sc->sc_ah->msi_reg = 0;
989
990 ath9k_hw_name(sc->sc_ah, hw_name, sizeof(hw_name));
991 wiphy_info(hw->wiphy, "%s mem=0x%p, irq=%d\n",
992 hw_name, sc->mem, pdev->irq);
993
994 return 0;
995
996err_init:
997 free_irq(sc->irq, sc);
998err_irq:
999 ieee80211_free_hw(hw);
1000 return ret;
1001}
1002
1003static void ath_pci_remove(struct pci_dev *pdev)
1004{
1005 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1006 struct ath_softc *sc = hw->priv;
1007
1008 if (!is_ath9k_unloaded)
1009 sc->sc_ah->ah_flags |= AH_UNPLUGGED;
1010 ath9k_deinit_device(sc);
1011 free_irq(sc->irq, sc);
1012 ieee80211_free_hw(sc->hw);
1013}
1014
1015#ifdef CONFIG_PM_SLEEP
1016
1017static int ath_pci_suspend(struct device *device)
1018{
1019 struct ieee80211_hw *hw = dev_get_drvdata(device);
1020 struct ath_softc *sc = hw->priv;
1021 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1022
1023 if (test_bit(ATH_OP_WOW_ENABLED, &common->op_flags)) {
1024 dev_info(device, "WOW is enabled, bypassing PCI suspend\n");
1025 return 0;
1026 }
1027
1028 /* The device has to be moved to FULLSLEEP forcibly.
1029 * Otherwise the chip never moved to full sleep,
1030 * when no interface is up.
1031 */
1032 ath9k_stop_btcoex(sc);
1033 ath9k_hw_disable(sc->sc_ah);
1034 del_timer_sync(&sc->sleep_timer);
1035 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
1036
1037 return 0;
1038}
1039
1040static int ath_pci_resume(struct device *device)
1041{
1042 struct pci_dev *pdev = to_pci_dev(device);
1043 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1044 struct ath_softc *sc = hw->priv;
1045 struct ath_hw *ah = sc->sc_ah;
1046 struct ath_common *common = ath9k_hw_common(ah);
1047 u32 val;
1048
1049 /*
1050 * Suspend/Resume resets the PCI configuration space, so we have to
1051 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1052 * PCI Tx retries from interfering with C3 CPU state
1053 */
1054 pci_read_config_dword(pdev, 0x40, &val);
1055 if ((val & 0x0000ff00) != 0)
1056 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1057
1058 ath_pci_aspm_init(common);
1059 ah->reset_power_on = false;
1060
1061 return 0;
1062}
1063
1064static SIMPLE_DEV_PM_OPS(ath9k_pm_ops, ath_pci_suspend, ath_pci_resume);
1065
1066#define ATH9K_PM_OPS (&ath9k_pm_ops)
1067
1068#else /* !CONFIG_PM_SLEEP */
1069
1070#define ATH9K_PM_OPS NULL
1071
1072#endif /* !CONFIG_PM_SLEEP */
1073
1074
1075MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1076
1077static struct pci_driver ath_pci_driver = {
1078 .name = "ath9k",
1079 .id_table = ath_pci_id_table,
1080 .probe = ath_pci_probe,
1081 .remove = ath_pci_remove,
1082 .driver.pm = ATH9K_PM_OPS,
1083};
1084
1085int ath_pci_init(void)
1086{
1087 return pci_register_driver(&ath_pci_driver);
1088}
1089
1090void ath_pci_exit(void)
1091{
1092 pci_unregister_driver(&ath_pci_driver);
1093}