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v3.1
 
   1/*
   2 * head.S: The initial boot code for the Sparc port of Linux.
   3 *
   4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
   5 * Copyright (C) 1995,1999 Pete Zaitcev   (zaitcev@yahoo.com)
   6 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
   7 * Copyright (C) 1997 Jakub Jelinek   (jj@sunsite.mff.cuni.cz)
   8 * Copyright (C) 1997 Michael A. Griffith (grif@acm.org)
   9 *
  10 * CompactPCI platform by Eric Brower, 1999.
  11 */
  12
 
  13#include <linux/version.h>
  14#include <linux/init.h>
  15
  16#include <asm/head.h>
  17#include <asm/asi.h>
  18#include <asm/contregs.h>
  19#include <asm/ptrace.h>
  20#include <asm/psr.h>
  21#include <asm/page.h>
  22#include <asm/kdebug.h>
  23#include <asm/winmacro.h>
  24#include <asm/thread_info.h>	/* TI_UWINMASK */
  25#include <asm/errno.h>
  26#include <asm/pgtsrmmu.h>	/* SRMMU_PGDIR_SHIFT */
  27
  28	.data
  29/* 
  30 * The following are used with the prom_vector node-ops to figure out
  31 * the cpu-type 
  32 */
  33
  34	.align 4
  35cputyp:
  36        .word   1
  37
  38	.align 4
  39	.globl cputypval
  40cputypval:
  41	.asciz "sun4c"
  42	.ascii "     "
  43
  44cputypvalend:
  45cputypvallen = cputypvar - cputypval
  46
  47	.align 4
  48/*
  49 * Sun people can't spell worth damn. "compatability" indeed.
  50 * At least we *know* we can't spell, and use a spell-checker.
  51 */
  52
  53/* Uh, actually Linus it is I who cannot spell. Too much murky
  54 * Sparc assembly will do this to ya.
  55 */
  56cputypvar:
  57	.asciz "compatability"
  58
  59/* Tested on SS-5, SS-10. Probably someone at Sun applied a spell-checker. */
  60	.align 4
  61cputypvar_sun4m:
  62	.asciz "compatible"
  63
  64	.align 4
  65
  66sun4_notsup:
  67	.asciz	"Sparc-Linux sun4 support does no longer exist.\n\n"
  68	.align 4
  69
  70sun4e_notsup:
  71        .asciz  "Sparc-Linux sun4e support does not exist\n\n"
  72	.align 4
  73
  74	/* The Sparc trap table, bootloader gives us control at _start. */
  75	__HEAD
  76	.globl	_stext, _start, __stext
  77	.globl  trapbase
  78_start:   /* danger danger */
  79__stext:
  80_stext:
  81trapbase:
  82#ifdef CONFIG_SMP
  83trapbase_cpu0:
  84#endif
  85/* We get control passed to us here at t_zero. */
  86t_zero:	b gokernel; nop; nop; nop;
  87t_tflt:	SPARC_TFAULT                        /* Inst. Access Exception        */
  88t_bins:	TRAP_ENTRY(0x2, bad_instruction)    /* Illegal Instruction           */
  89t_pins:	TRAP_ENTRY(0x3, priv_instruction)   /* Privileged Instruction        */
  90t_fpd:	TRAP_ENTRY(0x4, fpd_trap_handler)   /* Floating Point Disabled       */
  91t_wovf:	WINDOW_SPILL                        /* Window Overflow               */
  92t_wunf:	WINDOW_FILL                         /* Window Underflow              */
  93t_mna:	TRAP_ENTRY(0x7, mna_handler)        /* Memory Address Not Aligned    */
  94t_fpe:	TRAP_ENTRY(0x8, fpe_trap_handler)   /* Floating Point Exception      */
  95t_dflt:	SPARC_DFAULT                        /* Data Miss Exception           */
  96t_tio:	TRAP_ENTRY(0xa, do_tag_overflow)    /* Tagged Instruction Ovrflw     */
  97t_wpt:	TRAP_ENTRY(0xb, do_watchpoint)      /* Watchpoint Detected           */
  98t_badc:	BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)
  99t_irq1:	TRAP_ENTRY_INTERRUPT(1)             /* IRQ Software/SBUS Level 1     */
 100t_irq2:	TRAP_ENTRY_INTERRUPT(2)             /* IRQ SBUS Level 2              */
 101t_irq3:	TRAP_ENTRY_INTERRUPT(3)             /* IRQ SCSI/DMA/SBUS Level 3     */
 102t_irq4:	TRAP_ENTRY_INTERRUPT(4)             /* IRQ Software Level 4          */
 103t_irq5:	TRAP_ENTRY_INTERRUPT(5)             /* IRQ SBUS/Ethernet Level 5     */
 104t_irq6:	TRAP_ENTRY_INTERRUPT(6)             /* IRQ Software Level 6          */
 105t_irq7:	TRAP_ENTRY_INTERRUPT(7)             /* IRQ Video/SBUS Level 5        */
 106t_irq8:	TRAP_ENTRY_INTERRUPT(8)             /* IRQ SBUS Level 6              */
 107t_irq9:	TRAP_ENTRY_INTERRUPT(9)             /* IRQ SBUS Level 7              */
 108t_irq10:TRAP_ENTRY_INTERRUPT(10)            /* IRQ Timer #1 (one we use)     */
 109t_irq11:TRAP_ENTRY_INTERRUPT(11)            /* IRQ Floppy Intr.              */
 110t_irq12:TRAP_ENTRY_INTERRUPT(12)            /* IRQ Zilog serial chip         */
 111t_irq13:TRAP_ENTRY_INTERRUPT(13)            /* IRQ Audio Intr.               */
 112t_irq14:TRAP_ENTRY_INTERRUPT(14)            /* IRQ Timer #2                  */
 113	.globl	t_nmi
 114#ifndef CONFIG_SMP
 115t_nmi:	NMI_TRAP                            /* Level 15 (NMI)                */
 116#else
 117t_nmi:	TRAP_ENTRY(0x1f, linux_trap_ipi15_sun4m)
 118#endif
 119t_racc:	TRAP_ENTRY(0x20, do_reg_access)     /* General Register Access Error */
 120t_iacce:BAD_TRAP(0x21)                      /* Instr Access Error            */
 121t_bad22:BAD_TRAP(0x22) BAD_TRAP(0x23)
 122t_cpdis:TRAP_ENTRY(0x24, do_cp_disabled)    /* Co-Processor Disabled         */
 123t_uflsh:SKIP_TRAP(0x25, unimp_flush)        /* Unimplemented FLUSH inst.     */
 124t_bad26:BAD_TRAP(0x26) BAD_TRAP(0x27)
 125t_cpexc:TRAP_ENTRY(0x28, do_cp_exception)   /* Co-Processor Exception        */
 126t_dacce:SPARC_DFAULT                        /* Data Access Error             */
 127t_hwdz:	TRAP_ENTRY(0x2a, do_hw_divzero)     /* Division by zero, you lose... */
 128t_dserr:BAD_TRAP(0x2b)                      /* Data Store Error              */
 129t_daccm:BAD_TRAP(0x2c)                      /* Data Access MMU-Miss          */
 130t_bad2d:BAD_TRAP(0x2d) BAD_TRAP(0x2e) BAD_TRAP(0x2f) BAD_TRAP(0x30) BAD_TRAP(0x31)
 131t_bad32:BAD_TRAP(0x32) BAD_TRAP(0x33) BAD_TRAP(0x34) BAD_TRAP(0x35) BAD_TRAP(0x36)
 132t_bad37:BAD_TRAP(0x37) BAD_TRAP(0x38) BAD_TRAP(0x39) BAD_TRAP(0x3a) BAD_TRAP(0x3b)
 133t_iaccm:BAD_TRAP(0x3c)                      /* Instr Access MMU-Miss         */
 134t_bad3d:BAD_TRAP(0x3d) BAD_TRAP(0x3e) BAD_TRAP(0x3f) BAD_TRAP(0x40) BAD_TRAP(0x41)
 135t_bad42:BAD_TRAP(0x42) BAD_TRAP(0x43) BAD_TRAP(0x44) BAD_TRAP(0x45) BAD_TRAP(0x46)
 136t_bad47:BAD_TRAP(0x47) BAD_TRAP(0x48) BAD_TRAP(0x49) BAD_TRAP(0x4a) BAD_TRAP(0x4b)
 137t_bad4c:BAD_TRAP(0x4c) BAD_TRAP(0x4d) BAD_TRAP(0x4e) BAD_TRAP(0x4f) BAD_TRAP(0x50)
 138t_bad51:BAD_TRAP(0x51) BAD_TRAP(0x52) BAD_TRAP(0x53) BAD_TRAP(0x54) BAD_TRAP(0x55)
 139t_bad56:BAD_TRAP(0x56) BAD_TRAP(0x57) BAD_TRAP(0x58) BAD_TRAP(0x59) BAD_TRAP(0x5a)
 140t_bad5b:BAD_TRAP(0x5b) BAD_TRAP(0x5c) BAD_TRAP(0x5d) BAD_TRAP(0x5e) BAD_TRAP(0x5f)
 141t_bad60:BAD_TRAP(0x60) BAD_TRAP(0x61) BAD_TRAP(0x62) BAD_TRAP(0x63) BAD_TRAP(0x64)
 142t_bad65:BAD_TRAP(0x65) BAD_TRAP(0x66) BAD_TRAP(0x67) BAD_TRAP(0x68) BAD_TRAP(0x69)
 143t_bad6a:BAD_TRAP(0x6a) BAD_TRAP(0x6b) BAD_TRAP(0x6c) BAD_TRAP(0x6d) BAD_TRAP(0x6e)
 144t_bad6f:BAD_TRAP(0x6f) BAD_TRAP(0x70) BAD_TRAP(0x71) BAD_TRAP(0x72) BAD_TRAP(0x73)
 145t_bad74:BAD_TRAP(0x74) BAD_TRAP(0x75) BAD_TRAP(0x76) BAD_TRAP(0x77) BAD_TRAP(0x78)
 146t_bad79:BAD_TRAP(0x79) BAD_TRAP(0x7a) BAD_TRAP(0x7b) BAD_TRAP(0x7c) BAD_TRAP(0x7d)
 147t_bad7e:BAD_TRAP(0x7e) BAD_TRAP(0x7f)
 148t_bad80:BAD_TRAP(0x80)                      /* SunOS System Call             */
 149t_sbkpt:BREAKPOINT_TRAP                     /* Software Breakpoint/KGDB      */
 150t_divz:	TRAP_ENTRY(0x82, do_hw_divzero)     /* Divide by zero trap           */
 151t_flwin:TRAP_ENTRY(0x83, do_flush_windows)  /* Flush Windows Trap            */
 152t_clwin:BAD_TRAP(0x84)                      /* Clean Windows Trap            */
 153t_rchk:	BAD_TRAP(0x85)                      /* Range Check                   */
 154t_funal:BAD_TRAP(0x86)                      /* Fix Unaligned Access Trap     */
 155t_iovf:	BAD_TRAP(0x87)                      /* Integer Overflow Trap         */
 156t_bad88:BAD_TRAP(0x88)                      /* Slowaris System Call          */
 157t_bad89:BAD_TRAP(0x89)                      /* Net-B.S. System Call          */
 158t_bad8a:BAD_TRAP(0x8a) BAD_TRAP(0x8b) BAD_TRAP(0x8c) BAD_TRAP(0x8d) BAD_TRAP(0x8e)
 159t_bad8f:BAD_TRAP(0x8f)
 160t_linux:LINUX_SYSCALL_TRAP                  /* Linux System Call             */
 161t_bad91:BAD_TRAP(0x91) BAD_TRAP(0x92) BAD_TRAP(0x93) BAD_TRAP(0x94) BAD_TRAP(0x95)
 162t_bad96:BAD_TRAP(0x96) BAD_TRAP(0x97) BAD_TRAP(0x98) BAD_TRAP(0x99) BAD_TRAP(0x9a)
 163t_bad9b:BAD_TRAP(0x9b) BAD_TRAP(0x9c) BAD_TRAP(0x9d) BAD_TRAP(0x9e) BAD_TRAP(0x9f)
 164t_getcc:GETCC_TRAP                          /* Get Condition Codes           */
 165t_setcc:SETCC_TRAP                          /* Set Condition Codes           */
 166t_getpsr:GETPSR_TRAP                        /* Get PSR Register              */
 167t_bada3:BAD_TRAP(0xa3) BAD_TRAP(0xa4) BAD_TRAP(0xa5) BAD_TRAP(0xa6)
 168t_bada7:BAD_TRAP(0xa7)
 169t_bada8:BAD_TRAP(0xa8) BAD_TRAP(0xa9) BAD_TRAP(0xaa) BAD_TRAP(0xab)
 170t_badac:BAD_TRAP(0xac) BAD_TRAP(0xad) BAD_TRAP(0xae) BAD_TRAP(0xaf) BAD_TRAP(0xb0)
 171t_badb1:BAD_TRAP(0xb1) BAD_TRAP(0xb2) BAD_TRAP(0xb3) BAD_TRAP(0xb4) BAD_TRAP(0xb5)
 172t_badb6:BAD_TRAP(0xb6) BAD_TRAP(0xb7) BAD_TRAP(0xb8) BAD_TRAP(0xb9) BAD_TRAP(0xba)
 173t_badbb:BAD_TRAP(0xbb) BAD_TRAP(0xbc) BAD_TRAP(0xbd) BAD_TRAP(0xbe) BAD_TRAP(0xbf)
 174t_badc0:BAD_TRAP(0xc0) BAD_TRAP(0xc1) BAD_TRAP(0xc2) BAD_TRAP(0xc3) BAD_TRAP(0xc4)
 175t_badc5:BAD_TRAP(0xc5) BAD_TRAP(0xc6) BAD_TRAP(0xc7) BAD_TRAP(0xc8) BAD_TRAP(0xc9)
 176t_badca:BAD_TRAP(0xca) BAD_TRAP(0xcb) BAD_TRAP(0xcc) BAD_TRAP(0xcd) BAD_TRAP(0xce)
 177t_badcf:BAD_TRAP(0xcf) BAD_TRAP(0xd0) BAD_TRAP(0xd1) BAD_TRAP(0xd2) BAD_TRAP(0xd3)
 178t_badd4:BAD_TRAP(0xd4) BAD_TRAP(0xd5) BAD_TRAP(0xd6) BAD_TRAP(0xd7) BAD_TRAP(0xd8)
 179t_badd9:BAD_TRAP(0xd9) BAD_TRAP(0xda) BAD_TRAP(0xdb) BAD_TRAP(0xdc) BAD_TRAP(0xdd)
 180t_badde:BAD_TRAP(0xde) BAD_TRAP(0xdf) BAD_TRAP(0xe0) BAD_TRAP(0xe1) BAD_TRAP(0xe2)
 181t_bade3:BAD_TRAP(0xe3) BAD_TRAP(0xe4) BAD_TRAP(0xe5) BAD_TRAP(0xe6) BAD_TRAP(0xe7)
 182t_bade8:BAD_TRAP(0xe8) BAD_TRAP(0xe9) BAD_TRAP(0xea) BAD_TRAP(0xeb) BAD_TRAP(0xec)
 183t_baded:BAD_TRAP(0xed) BAD_TRAP(0xee) BAD_TRAP(0xef) BAD_TRAP(0xf0) BAD_TRAP(0xf1)
 184t_badf2:BAD_TRAP(0xf2) BAD_TRAP(0xf3) BAD_TRAP(0xf4) BAD_TRAP(0xf5) BAD_TRAP(0xf6)
 185t_badf7:BAD_TRAP(0xf7) BAD_TRAP(0xf8) BAD_TRAP(0xf9) BAD_TRAP(0xfa) BAD_TRAP(0xfb)
 186t_badfc:BAD_TRAP(0xfc)
 187t_kgdb:	KGDB_TRAP(0xfd)
 188dbtrap:	BAD_TRAP(0xfe)                      /* Debugger/PROM breakpoint #1   */
 189dbtrap2:BAD_TRAP(0xff)                      /* Debugger/PROM breakpoint #2   */	
 190
 191	.globl	end_traptable
 192end_traptable:
 193
 194#ifdef CONFIG_SMP
 195	/* Trap tables for the other cpus. */
 196	.globl	trapbase_cpu1, trapbase_cpu2, trapbase_cpu3
 197trapbase_cpu1:
 198	BAD_TRAP(0x0) SRMMU_TFAULT TRAP_ENTRY(0x2, bad_instruction)
 199	TRAP_ENTRY(0x3, priv_instruction) TRAP_ENTRY(0x4, fpd_trap_handler)
 200	WINDOW_SPILL WINDOW_FILL TRAP_ENTRY(0x7, mna_handler)
 201	TRAP_ENTRY(0x8, fpe_trap_handler) SRMMU_DFAULT
 202	TRAP_ENTRY(0xa, do_tag_overflow) TRAP_ENTRY(0xb, do_watchpoint)
 203	BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)
 204	TRAP_ENTRY_INTERRUPT(1) TRAP_ENTRY_INTERRUPT(2)
 205	TRAP_ENTRY_INTERRUPT(3) TRAP_ENTRY_INTERRUPT(4)
 206	TRAP_ENTRY_INTERRUPT(5) TRAP_ENTRY_INTERRUPT(6)
 207	TRAP_ENTRY_INTERRUPT(7)	TRAP_ENTRY_INTERRUPT(8)
 208	TRAP_ENTRY_INTERRUPT(9) TRAP_ENTRY_INTERRUPT(10)
 209	TRAP_ENTRY_INTERRUPT(11) TRAP_ENTRY_INTERRUPT(12)
 210	TRAP_ENTRY_INTERRUPT(13) TRAP_ENTRY_INTERRUPT(14)
 211	TRAP_ENTRY(0x1f, linux_trap_ipi15_sun4m)
 212	TRAP_ENTRY(0x20, do_reg_access) BAD_TRAP(0x21) BAD_TRAP(0x22)
 213	BAD_TRAP(0x23) TRAP_ENTRY(0x24, do_cp_disabled) SKIP_TRAP(0x25, unimp_flush)
 214	BAD_TRAP(0x26) BAD_TRAP(0x27) TRAP_ENTRY(0x28, do_cp_exception)
 215	SRMMU_DFAULT TRAP_ENTRY(0x2a, do_hw_divzero) BAD_TRAP(0x2b) BAD_TRAP(0x2c)
 216	BAD_TRAP(0x2d) BAD_TRAP(0x2e) BAD_TRAP(0x2f) BAD_TRAP(0x30) BAD_TRAP(0x31)
 217	BAD_TRAP(0x32) BAD_TRAP(0x33) BAD_TRAP(0x34) BAD_TRAP(0x35) BAD_TRAP(0x36)
 218	BAD_TRAP(0x37) BAD_TRAP(0x38) BAD_TRAP(0x39) BAD_TRAP(0x3a) BAD_TRAP(0x3b)
 219	BAD_TRAP(0x3c) BAD_TRAP(0x3d) BAD_TRAP(0x3e) BAD_TRAP(0x3f) BAD_TRAP(0x40)
 220	BAD_TRAP(0x41) BAD_TRAP(0x42) BAD_TRAP(0x43) BAD_TRAP(0x44) BAD_TRAP(0x45)
 221	BAD_TRAP(0x46) BAD_TRAP(0x47) BAD_TRAP(0x48) BAD_TRAP(0x49) BAD_TRAP(0x4a)
 222	BAD_TRAP(0x4b) BAD_TRAP(0x4c) BAD_TRAP(0x4d) BAD_TRAP(0x4e) BAD_TRAP(0x4f)
 223	BAD_TRAP(0x50)
 224	BAD_TRAP(0x51) BAD_TRAP(0x52) BAD_TRAP(0x53) BAD_TRAP(0x54) BAD_TRAP(0x55)
 225	BAD_TRAP(0x56) BAD_TRAP(0x57) BAD_TRAP(0x58) BAD_TRAP(0x59) BAD_TRAP(0x5a)
 226	BAD_TRAP(0x5b) BAD_TRAP(0x5c) BAD_TRAP(0x5d) BAD_TRAP(0x5e) BAD_TRAP(0x5f)
 227	BAD_TRAP(0x60) BAD_TRAP(0x61) BAD_TRAP(0x62) BAD_TRAP(0x63) BAD_TRAP(0x64)
 228	BAD_TRAP(0x65) BAD_TRAP(0x66) BAD_TRAP(0x67) BAD_TRAP(0x68) BAD_TRAP(0x69)
 229	BAD_TRAP(0x6a) BAD_TRAP(0x6b) BAD_TRAP(0x6c) BAD_TRAP(0x6d) BAD_TRAP(0x6e)
 230	BAD_TRAP(0x6f) BAD_TRAP(0x70) BAD_TRAP(0x71) BAD_TRAP(0x72) BAD_TRAP(0x73)
 231	BAD_TRAP(0x74) BAD_TRAP(0x75) BAD_TRAP(0x76) BAD_TRAP(0x77) BAD_TRAP(0x78)
 232	BAD_TRAP(0x79) BAD_TRAP(0x7a) BAD_TRAP(0x7b) BAD_TRAP(0x7c) BAD_TRAP(0x7d)
 233	BAD_TRAP(0x7e) BAD_TRAP(0x7f)
 234	BAD_TRAP(0x80)
 235	BREAKPOINT_TRAP
 236	TRAP_ENTRY(0x82, do_hw_divzero)
 237	TRAP_ENTRY(0x83, do_flush_windows) BAD_TRAP(0x84) BAD_TRAP(0x85)
 238	BAD_TRAP(0x86) BAD_TRAP(0x87) BAD_TRAP(0x88)
 239	BAD_TRAP(0x89) BAD_TRAP(0x8a) BAD_TRAP(0x8b) BAD_TRAP(0x8c)
 240	BAD_TRAP(0x8d) BAD_TRAP(0x8e) BAD_TRAP(0x8f)
 241	LINUX_SYSCALL_TRAP BAD_TRAP(0x91) BAD_TRAP(0x92) BAD_TRAP(0x93) BAD_TRAP(0x94)
 242	BAD_TRAP(0x95) BAD_TRAP(0x96) BAD_TRAP(0x97) BAD_TRAP(0x98) BAD_TRAP(0x99)
 243	BAD_TRAP(0x9a) BAD_TRAP(0x9b) BAD_TRAP(0x9c) BAD_TRAP(0x9d) BAD_TRAP(0x9e)
 244	BAD_TRAP(0x9f) GETCC_TRAP SETCC_TRAP GETPSR_TRAP
 245	BAD_TRAP(0xa3) BAD_TRAP(0xa4) BAD_TRAP(0xa5) BAD_TRAP(0xa6)
 246	BAD_TRAP(0xa7) BAD_TRAP(0xa8) BAD_TRAP(0xa9) BAD_TRAP(0xaa) BAD_TRAP(0xab)
 247	BAD_TRAP(0xac) BAD_TRAP(0xad) BAD_TRAP(0xae) BAD_TRAP(0xaf) BAD_TRAP(0xb0)
 248	BAD_TRAP(0xb1) BAD_TRAP(0xb2) BAD_TRAP(0xb3) BAD_TRAP(0xb4) BAD_TRAP(0xb5)
 249	BAD_TRAP(0xb6) BAD_TRAP(0xb7) BAD_TRAP(0xb8) BAD_TRAP(0xb9) BAD_TRAP(0xba)
 250	BAD_TRAP(0xbb) BAD_TRAP(0xbc) BAD_TRAP(0xbd) BAD_TRAP(0xbe) BAD_TRAP(0xbf)
 251	BAD_TRAP(0xc0) BAD_TRAP(0xc1) BAD_TRAP(0xc2) BAD_TRAP(0xc3) BAD_TRAP(0xc4)
 252	BAD_TRAP(0xc5) BAD_TRAP(0xc6) BAD_TRAP(0xc7) BAD_TRAP(0xc8) BAD_TRAP(0xc9)
 253	BAD_TRAP(0xca) BAD_TRAP(0xcb) BAD_TRAP(0xcc) BAD_TRAP(0xcd) BAD_TRAP(0xce)
 254	BAD_TRAP(0xcf) BAD_TRAP(0xd0) BAD_TRAP(0xd1) BAD_TRAP(0xd2) BAD_TRAP(0xd3)
 255	BAD_TRAP(0xd4) BAD_TRAP(0xd5) BAD_TRAP(0xd6) BAD_TRAP(0xd7) BAD_TRAP(0xd8)
 256	BAD_TRAP(0xd9) BAD_TRAP(0xda) BAD_TRAP(0xdb) BAD_TRAP(0xdc) BAD_TRAP(0xdd)
 257	BAD_TRAP(0xde) BAD_TRAP(0xdf) BAD_TRAP(0xe0) BAD_TRAP(0xe1) BAD_TRAP(0xe2)
 258	BAD_TRAP(0xe3) BAD_TRAP(0xe4) BAD_TRAP(0xe5) BAD_TRAP(0xe6) BAD_TRAP(0xe7)
 259	BAD_TRAP(0xe8) BAD_TRAP(0xe9) BAD_TRAP(0xea) BAD_TRAP(0xeb) BAD_TRAP(0xec)
 260	BAD_TRAP(0xed) BAD_TRAP(0xee) BAD_TRAP(0xef) BAD_TRAP(0xf0) BAD_TRAP(0xf1)
 261	BAD_TRAP(0xf2) BAD_TRAP(0xf3) BAD_TRAP(0xf4) BAD_TRAP(0xf5) BAD_TRAP(0xf6)
 262	BAD_TRAP(0xf7) BAD_TRAP(0xf8) BAD_TRAP(0xf9) BAD_TRAP(0xfa) BAD_TRAP(0xfb)
 263	BAD_TRAP(0xfc) KGDB_TRAP(0xfd) BAD_TRAP(0xfe) BAD_TRAP(0xff)
 264
 265trapbase_cpu2:
 266	BAD_TRAP(0x0) SRMMU_TFAULT TRAP_ENTRY(0x2, bad_instruction)
 267	TRAP_ENTRY(0x3, priv_instruction) TRAP_ENTRY(0x4, fpd_trap_handler)
 268	WINDOW_SPILL WINDOW_FILL TRAP_ENTRY(0x7, mna_handler)
 269	TRAP_ENTRY(0x8, fpe_trap_handler) SRMMU_DFAULT
 270	TRAP_ENTRY(0xa, do_tag_overflow) TRAP_ENTRY(0xb, do_watchpoint)
 271	BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)
 272	TRAP_ENTRY_INTERRUPT(1) TRAP_ENTRY_INTERRUPT(2)
 273	TRAP_ENTRY_INTERRUPT(3) TRAP_ENTRY_INTERRUPT(4)
 274	TRAP_ENTRY_INTERRUPT(5) TRAP_ENTRY_INTERRUPT(6)
 275	TRAP_ENTRY_INTERRUPT(7)	TRAP_ENTRY_INTERRUPT(8)
 276	TRAP_ENTRY_INTERRUPT(9) TRAP_ENTRY_INTERRUPT(10)
 277	TRAP_ENTRY_INTERRUPT(11) TRAP_ENTRY_INTERRUPT(12)
 278	TRAP_ENTRY_INTERRUPT(13) TRAP_ENTRY_INTERRUPT(14)
 279	TRAP_ENTRY(0x1f, linux_trap_ipi15_sun4m)
 280	TRAP_ENTRY(0x20, do_reg_access) BAD_TRAP(0x21) BAD_TRAP(0x22)
 281	BAD_TRAP(0x23) TRAP_ENTRY(0x24, do_cp_disabled) SKIP_TRAP(0x25, unimp_flush)
 282	BAD_TRAP(0x26) BAD_TRAP(0x27) TRAP_ENTRY(0x28, do_cp_exception)
 283	SRMMU_DFAULT TRAP_ENTRY(0x2a, do_hw_divzero) BAD_TRAP(0x2b) BAD_TRAP(0x2c)
 284	BAD_TRAP(0x2d) BAD_TRAP(0x2e) BAD_TRAP(0x2f) BAD_TRAP(0x30) BAD_TRAP(0x31)
 285	BAD_TRAP(0x32) BAD_TRAP(0x33) BAD_TRAP(0x34) BAD_TRAP(0x35) BAD_TRAP(0x36)
 286	BAD_TRAP(0x37) BAD_TRAP(0x38) BAD_TRAP(0x39) BAD_TRAP(0x3a) BAD_TRAP(0x3b)
 287	BAD_TRAP(0x3c) BAD_TRAP(0x3d) BAD_TRAP(0x3e) BAD_TRAP(0x3f) BAD_TRAP(0x40)
 288	BAD_TRAP(0x41) BAD_TRAP(0x42) BAD_TRAP(0x43) BAD_TRAP(0x44) BAD_TRAP(0x45)
 289	BAD_TRAP(0x46) BAD_TRAP(0x47) BAD_TRAP(0x48) BAD_TRAP(0x49) BAD_TRAP(0x4a)
 290	BAD_TRAP(0x4b) BAD_TRAP(0x4c) BAD_TRAP(0x4d) BAD_TRAP(0x4e) BAD_TRAP(0x4f)
 291	BAD_TRAP(0x50)
 292	BAD_TRAP(0x51) BAD_TRAP(0x52) BAD_TRAP(0x53) BAD_TRAP(0x54) BAD_TRAP(0x55)
 293	BAD_TRAP(0x56) BAD_TRAP(0x57) BAD_TRAP(0x58) BAD_TRAP(0x59) BAD_TRAP(0x5a)
 294	BAD_TRAP(0x5b) BAD_TRAP(0x5c) BAD_TRAP(0x5d) BAD_TRAP(0x5e) BAD_TRAP(0x5f)
 295	BAD_TRAP(0x60) BAD_TRAP(0x61) BAD_TRAP(0x62) BAD_TRAP(0x63) BAD_TRAP(0x64)
 296	BAD_TRAP(0x65) BAD_TRAP(0x66) BAD_TRAP(0x67) BAD_TRAP(0x68) BAD_TRAP(0x69)
 297	BAD_TRAP(0x6a) BAD_TRAP(0x6b) BAD_TRAP(0x6c) BAD_TRAP(0x6d) BAD_TRAP(0x6e)
 298	BAD_TRAP(0x6f) BAD_TRAP(0x70) BAD_TRAP(0x71) BAD_TRAP(0x72) BAD_TRAP(0x73)
 299	BAD_TRAP(0x74) BAD_TRAP(0x75) BAD_TRAP(0x76) BAD_TRAP(0x77) BAD_TRAP(0x78)
 300	BAD_TRAP(0x79) BAD_TRAP(0x7a) BAD_TRAP(0x7b) BAD_TRAP(0x7c) BAD_TRAP(0x7d)
 301	BAD_TRAP(0x7e) BAD_TRAP(0x7f)
 302	BAD_TRAP(0x80)
 303	BREAKPOINT_TRAP
 304	TRAP_ENTRY(0x82, do_hw_divzero)
 305	TRAP_ENTRY(0x83, do_flush_windows) BAD_TRAP(0x84) BAD_TRAP(0x85)
 306	BAD_TRAP(0x86) BAD_TRAP(0x87) BAD_TRAP(0x88)
 307	BAD_TRAP(0x89) BAD_TRAP(0x8a) BAD_TRAP(0x8b) BAD_TRAP(0x8c)
 308	BAD_TRAP(0x8d) BAD_TRAP(0x8e) BAD_TRAP(0x8f)
 309	LINUX_SYSCALL_TRAP BAD_TRAP(0x91) BAD_TRAP(0x92) BAD_TRAP(0x93) BAD_TRAP(0x94)
 310	BAD_TRAP(0x95) BAD_TRAP(0x96) BAD_TRAP(0x97) BAD_TRAP(0x98) BAD_TRAP(0x99)
 311	BAD_TRAP(0x9a) BAD_TRAP(0x9b) BAD_TRAP(0x9c) BAD_TRAP(0x9d) BAD_TRAP(0x9e)
 312	BAD_TRAP(0x9f) GETCC_TRAP SETCC_TRAP GETPSR_TRAP
 313	BAD_TRAP(0xa3) BAD_TRAP(0xa4) BAD_TRAP(0xa5) BAD_TRAP(0xa6)
 314	BAD_TRAP(0xa7) BAD_TRAP(0xa8) BAD_TRAP(0xa9) BAD_TRAP(0xaa) BAD_TRAP(0xab)
 315	BAD_TRAP(0xac) BAD_TRAP(0xad) BAD_TRAP(0xae) BAD_TRAP(0xaf) BAD_TRAP(0xb0)
 316	BAD_TRAP(0xb1) BAD_TRAP(0xb2) BAD_TRAP(0xb3) BAD_TRAP(0xb4) BAD_TRAP(0xb5)
 317	BAD_TRAP(0xb6) BAD_TRAP(0xb7) BAD_TRAP(0xb8) BAD_TRAP(0xb9) BAD_TRAP(0xba)
 318	BAD_TRAP(0xbb) BAD_TRAP(0xbc) BAD_TRAP(0xbd) BAD_TRAP(0xbe) BAD_TRAP(0xbf)
 319	BAD_TRAP(0xc0) BAD_TRAP(0xc1) BAD_TRAP(0xc2) BAD_TRAP(0xc3) BAD_TRAP(0xc4)
 320	BAD_TRAP(0xc5) BAD_TRAP(0xc6) BAD_TRAP(0xc7) BAD_TRAP(0xc8) BAD_TRAP(0xc9)
 321	BAD_TRAP(0xca) BAD_TRAP(0xcb) BAD_TRAP(0xcc) BAD_TRAP(0xcd) BAD_TRAP(0xce)
 322	BAD_TRAP(0xcf) BAD_TRAP(0xd0) BAD_TRAP(0xd1) BAD_TRAP(0xd2) BAD_TRAP(0xd3)
 323	BAD_TRAP(0xd4) BAD_TRAP(0xd5) BAD_TRAP(0xd6) BAD_TRAP(0xd7) BAD_TRAP(0xd8)
 324	BAD_TRAP(0xd9) BAD_TRAP(0xda) BAD_TRAP(0xdb) BAD_TRAP(0xdc) BAD_TRAP(0xdd)
 325	BAD_TRAP(0xde) BAD_TRAP(0xdf) BAD_TRAP(0xe0) BAD_TRAP(0xe1) BAD_TRAP(0xe2)
 326	BAD_TRAP(0xe3) BAD_TRAP(0xe4) BAD_TRAP(0xe5) BAD_TRAP(0xe6) BAD_TRAP(0xe7)
 327	BAD_TRAP(0xe8) BAD_TRAP(0xe9) BAD_TRAP(0xea) BAD_TRAP(0xeb) BAD_TRAP(0xec)
 328	BAD_TRAP(0xed) BAD_TRAP(0xee) BAD_TRAP(0xef) BAD_TRAP(0xf0) BAD_TRAP(0xf1)
 329	BAD_TRAP(0xf2) BAD_TRAP(0xf3) BAD_TRAP(0xf4) BAD_TRAP(0xf5) BAD_TRAP(0xf6)
 330	BAD_TRAP(0xf7) BAD_TRAP(0xf8) BAD_TRAP(0xf9) BAD_TRAP(0xfa) BAD_TRAP(0xfb)
 331	BAD_TRAP(0xfc) KGDB_TRAP(0xfd) BAD_TRAP(0xfe) BAD_TRAP(0xff)
 332
 333trapbase_cpu3:
 334	BAD_TRAP(0x0) SRMMU_TFAULT TRAP_ENTRY(0x2, bad_instruction)
 335	TRAP_ENTRY(0x3, priv_instruction) TRAP_ENTRY(0x4, fpd_trap_handler)
 336	WINDOW_SPILL WINDOW_FILL TRAP_ENTRY(0x7, mna_handler)
 337	TRAP_ENTRY(0x8, fpe_trap_handler) SRMMU_DFAULT
 338	TRAP_ENTRY(0xa, do_tag_overflow) TRAP_ENTRY(0xb, do_watchpoint)
 339	BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)
 340	TRAP_ENTRY_INTERRUPT(1) TRAP_ENTRY_INTERRUPT(2)
 341	TRAP_ENTRY_INTERRUPT(3) TRAP_ENTRY_INTERRUPT(4)
 342	TRAP_ENTRY_INTERRUPT(5) TRAP_ENTRY_INTERRUPT(6)
 343	TRAP_ENTRY_INTERRUPT(7)	TRAP_ENTRY_INTERRUPT(8)
 344	TRAP_ENTRY_INTERRUPT(9) TRAP_ENTRY_INTERRUPT(10)
 345	TRAP_ENTRY_INTERRUPT(11) TRAP_ENTRY_INTERRUPT(12)
 346	TRAP_ENTRY_INTERRUPT(13) TRAP_ENTRY_INTERRUPT(14)
 347	TRAP_ENTRY(0x1f, linux_trap_ipi15_sun4m)
 348	TRAP_ENTRY(0x20, do_reg_access) BAD_TRAP(0x21) BAD_TRAP(0x22)
 349	BAD_TRAP(0x23) TRAP_ENTRY(0x24, do_cp_disabled) SKIP_TRAP(0x25, unimp_flush)
 350	BAD_TRAP(0x26) BAD_TRAP(0x27) TRAP_ENTRY(0x28, do_cp_exception)
 351	SRMMU_DFAULT TRAP_ENTRY(0x2a, do_hw_divzero) BAD_TRAP(0x2b) BAD_TRAP(0x2c)
 352	BAD_TRAP(0x2d) BAD_TRAP(0x2e) BAD_TRAP(0x2f) BAD_TRAP(0x30) BAD_TRAP(0x31)
 353	BAD_TRAP(0x32) BAD_TRAP(0x33) BAD_TRAP(0x34) BAD_TRAP(0x35) BAD_TRAP(0x36)
 354	BAD_TRAP(0x37) BAD_TRAP(0x38) BAD_TRAP(0x39) BAD_TRAP(0x3a) BAD_TRAP(0x3b)
 355	BAD_TRAP(0x3c) BAD_TRAP(0x3d) BAD_TRAP(0x3e) BAD_TRAP(0x3f) BAD_TRAP(0x40)
 356	BAD_TRAP(0x41) BAD_TRAP(0x42) BAD_TRAP(0x43) BAD_TRAP(0x44) BAD_TRAP(0x45)
 357	BAD_TRAP(0x46) BAD_TRAP(0x47) BAD_TRAP(0x48) BAD_TRAP(0x49) BAD_TRAP(0x4a)
 358	BAD_TRAP(0x4b) BAD_TRAP(0x4c) BAD_TRAP(0x4d) BAD_TRAP(0x4e) BAD_TRAP(0x4f)
 359	BAD_TRAP(0x50)
 360	BAD_TRAP(0x51) BAD_TRAP(0x52) BAD_TRAP(0x53) BAD_TRAP(0x54) BAD_TRAP(0x55)
 361	BAD_TRAP(0x56) BAD_TRAP(0x57) BAD_TRAP(0x58) BAD_TRAP(0x59) BAD_TRAP(0x5a)
 362	BAD_TRAP(0x5b) BAD_TRAP(0x5c) BAD_TRAP(0x5d) BAD_TRAP(0x5e) BAD_TRAP(0x5f)
 363	BAD_TRAP(0x60) BAD_TRAP(0x61) BAD_TRAP(0x62) BAD_TRAP(0x63) BAD_TRAP(0x64)
 364	BAD_TRAP(0x65) BAD_TRAP(0x66) BAD_TRAP(0x67) BAD_TRAP(0x68) BAD_TRAP(0x69)
 365	BAD_TRAP(0x6a) BAD_TRAP(0x6b) BAD_TRAP(0x6c) BAD_TRAP(0x6d) BAD_TRAP(0x6e)
 366	BAD_TRAP(0x6f) BAD_TRAP(0x70) BAD_TRAP(0x71) BAD_TRAP(0x72) BAD_TRAP(0x73)
 367	BAD_TRAP(0x74) BAD_TRAP(0x75) BAD_TRAP(0x76) BAD_TRAP(0x77) BAD_TRAP(0x78)
 368	BAD_TRAP(0x79) BAD_TRAP(0x7a) BAD_TRAP(0x7b) BAD_TRAP(0x7c) BAD_TRAP(0x7d)
 369	BAD_TRAP(0x7e) BAD_TRAP(0x7f)
 370	BAD_TRAP(0x80)
 371	BREAKPOINT_TRAP
 372	TRAP_ENTRY(0x82, do_hw_divzero)
 373	TRAP_ENTRY(0x83, do_flush_windows) BAD_TRAP(0x84) BAD_TRAP(0x85)
 374	BAD_TRAP(0x86) BAD_TRAP(0x87) BAD_TRAP(0x88)
 375	BAD_TRAP(0x89) BAD_TRAP(0x8a) BAD_TRAP(0x8b) BAD_TRAP(0x8c)
 376	BAD_TRAP(0x8d) BAD_TRAP(0x8e) BAD_TRAP(0x8f)
 377	LINUX_SYSCALL_TRAP BAD_TRAP(0x91) BAD_TRAP(0x92) BAD_TRAP(0x93) BAD_TRAP(0x94)
 378	BAD_TRAP(0x95) BAD_TRAP(0x96) BAD_TRAP(0x97) BAD_TRAP(0x98) BAD_TRAP(0x99)
 379	BAD_TRAP(0x9a) BAD_TRAP(0x9b) BAD_TRAP(0x9c) BAD_TRAP(0x9d) BAD_TRAP(0x9e)
 380	BAD_TRAP(0x9f) GETCC_TRAP SETCC_TRAP GETPSR_TRAP
 381	BAD_TRAP(0xa3) BAD_TRAP(0xa4) BAD_TRAP(0xa5) BAD_TRAP(0xa6)
 382	BAD_TRAP(0xa7) BAD_TRAP(0xa8) BAD_TRAP(0xa9) BAD_TRAP(0xaa) BAD_TRAP(0xab)
 383	BAD_TRAP(0xac) BAD_TRAP(0xad) BAD_TRAP(0xae) BAD_TRAP(0xaf) BAD_TRAP(0xb0)
 384	BAD_TRAP(0xb1) BAD_TRAP(0xb2) BAD_TRAP(0xb3) BAD_TRAP(0xb4) BAD_TRAP(0xb5)
 385	BAD_TRAP(0xb6) BAD_TRAP(0xb7) BAD_TRAP(0xb8) BAD_TRAP(0xb9) BAD_TRAP(0xba)
 386	BAD_TRAP(0xbb) BAD_TRAP(0xbc) BAD_TRAP(0xbd) BAD_TRAP(0xbe) BAD_TRAP(0xbf)
 387	BAD_TRAP(0xc0) BAD_TRAP(0xc1) BAD_TRAP(0xc2) BAD_TRAP(0xc3) BAD_TRAP(0xc4)
 388	BAD_TRAP(0xc5) BAD_TRAP(0xc6) BAD_TRAP(0xc7) BAD_TRAP(0xc8) BAD_TRAP(0xc9)
 389	BAD_TRAP(0xca) BAD_TRAP(0xcb) BAD_TRAP(0xcc) BAD_TRAP(0xcd) BAD_TRAP(0xce)
 390	BAD_TRAP(0xcf) BAD_TRAP(0xd0) BAD_TRAP(0xd1) BAD_TRAP(0xd2) BAD_TRAP(0xd3)
 391	BAD_TRAP(0xd4) BAD_TRAP(0xd5) BAD_TRAP(0xd6) BAD_TRAP(0xd7) BAD_TRAP(0xd8)
 392	BAD_TRAP(0xd9) BAD_TRAP(0xda) BAD_TRAP(0xdb) BAD_TRAP(0xdc) BAD_TRAP(0xdd)
 393	BAD_TRAP(0xde) BAD_TRAP(0xdf) BAD_TRAP(0xe0) BAD_TRAP(0xe1) BAD_TRAP(0xe2)
 394	BAD_TRAP(0xe3) BAD_TRAP(0xe4) BAD_TRAP(0xe5) BAD_TRAP(0xe6) BAD_TRAP(0xe7)
 395	BAD_TRAP(0xe8) BAD_TRAP(0xe9) BAD_TRAP(0xea) BAD_TRAP(0xeb) BAD_TRAP(0xec)
 396	BAD_TRAP(0xed) BAD_TRAP(0xee) BAD_TRAP(0xef) BAD_TRAP(0xf0) BAD_TRAP(0xf1)
 397	BAD_TRAP(0xf2) BAD_TRAP(0xf3) BAD_TRAP(0xf4) BAD_TRAP(0xf5) BAD_TRAP(0xf6)
 398	BAD_TRAP(0xf7) BAD_TRAP(0xf8) BAD_TRAP(0xf9) BAD_TRAP(0xfa) BAD_TRAP(0xfb)
 399	BAD_TRAP(0xfc) KGDB_TRAP(0xfd) BAD_TRAP(0xfe) BAD_TRAP(0xff)
 400
 401#endif
 402	.align PAGE_SIZE
 403
 404/* This was the only reasonable way I could think of to properly align
 405 * these page-table data structures.
 406 */
 407	.globl pg0, pg1, pg2, pg3
 408	.globl empty_bad_page
 409	.globl empty_bad_page_table
 410	.globl empty_zero_page
 411	.globl swapper_pg_dir
 412swapper_pg_dir:		.skip PAGE_SIZE
 413pg0:			.skip PAGE_SIZE
 414pg1:			.skip PAGE_SIZE
 415pg2:			.skip PAGE_SIZE
 416pg3:			.skip PAGE_SIZE
 417empty_bad_page:		.skip PAGE_SIZE
 418empty_bad_page_table:	.skip PAGE_SIZE
 419empty_zero_page:	.skip PAGE_SIZE
 
 420
 421	.global root_flags
 422	.global ram_flags
 423	.global root_dev
 424	.global sparc_ramdisk_image
 425	.global sparc_ramdisk_size
 426
 427/* This stuff has to be in sync with SILO and other potential boot loaders
 428 * Fields should be kept upward compatible and whenever any change is made,
 429 * HdrS version should be incremented.
 430 */
 431	.ascii	"HdrS"
 432	.word	LINUX_VERSION_CODE
 433	.half	0x0203		/* HdrS version */
 434root_flags:
 435	.half	1
 436root_dev:
 437	.half	0
 438ram_flags:
 439	.half	0
 440sparc_ramdisk_image:
 441	.word	0
 442sparc_ramdisk_size:
 443	.word	0
 444	.word	reboot_command
 445	.word	0, 0, 0
 446	.word	_end
 447
 448/* Cool, here we go. Pick up the romvec pointer in %o0 and stash it in
 449 * %g7 and at prom_vector_p. And also quickly check whether we are on
 450 * a v0, v2, or v3 prom.
 451 */
 452gokernel:
 453		/* Ok, it's nice to know, as early as possible, if we
 454		 * are already mapped where we expect to be in virtual
 455		 * memory.  The Solaris /boot elf format bootloader
 456		 * will peek into our elf header and load us where
 457		 * we want to be, otherwise we have to re-map.
 458		 *
 459		 * Some boot loaders don't place the jmp'rs address
 460		 * in %o7, so we do a pc-relative call to a local
 461		 * label, then see what %o7 has.
 462		 */
 463
 464		mov	%o7, %g4		! Save %o7
 465
 466		/* Jump to it, and pray... */
 467current_pc:
 468		call	1f
 469		 nop
 470
 4711:
 472		mov	%o7, %g3
 473
 474		tst	%o0
 475		be	no_sun4u_here
 476		 mov	%g4, %o7		/* Previous %o7. */
 477	
 478		mov	%o0, %l0		! stash away romvec
 479		mov	%o0, %g7		! put it here too
 480		mov	%o1, %l1		! stash away debug_vec too
 481
 482		/* Ok, let's check out our run time program counter. */
 483		set	current_pc, %g5
 484		cmp	%g3, %g5
 485		be	already_mapped
 486		 nop 
 487
 488		/* %l6 will hold the offset we have to subtract
 489		 * from absolute symbols in order to access areas
 490		 * in our own image.  If already mapped this is
 491		 * just plain zero, else it is KERNBASE.
 492		 */
 493		set	KERNBASE, %l6
 494		b	copy_prom_lvl14
 495		 nop
 496
 497already_mapped:
 498		mov	0, %l6
 499
 500		/* Copy over the Prom's level 14 clock handler. */
 501copy_prom_lvl14:
 502#if 1
 503		/* DJHR
 504		 * preserve our linked/calculated instructions
 505		 */
 506		set	lvl14_save, %g1
 507		set	t_irq14, %g3
 508		sub	%g1, %l6, %g1		! translate to physical
 509		sub	%g3, %l6, %g3		! translate to physical
 510		ldd	[%g3], %g4
 511		std	%g4, [%g1]
 512		ldd	[%g3+8], %g4
 513		std	%g4, [%g1+8]
 514#endif
 515		rd	%tbr, %g1
 516		andn	%g1, 0xfff, %g1		! proms trap table base
 517		or	%g0, (0x1e<<4), %g2	! offset to lvl14 intr
 518		or	%g1, %g2, %g2
 519		set	t_irq14, %g3
 520		sub	%g3, %l6, %g3
 521		ldd	[%g2], %g4
 522		std	%g4, [%g3]
 523		ldd	[%g2 + 0x8], %g4
 524		std	%g4, [%g3 + 0x8]	! Copy proms handler
 525
 526/* Must determine whether we are on a sun4c MMU, SRMMU, or SUN4/400 MUTANT
 527 * MMU so we can remap ourselves properly.  DON'T TOUCH %l0 thru %l5 in these
 528 * remapping routines, we need their values afterwards!
 529 */
 
 530		/* Now check whether we are already mapped, if we
 531		 * are we can skip all this garbage coming up.
 532		 */
 533copy_prom_done:
 534		cmp	%l6, 0
 535		be	go_to_highmem		! this will be a nop then
 536		 nop
 537
 538		set	LOAD_ADDR, %g6
 
 
 
 539		cmp	%g7, %g6
 540		bne	remap_not_a_sun4	! This is not a Sun4
 541		 nop
 542
 543		or	%g0, 0x1, %g1
 544		lduba	[%g1] ASI_CONTROL, %g1	! Only safe to try on Sun4.
 545		subcc	%g1, 0x24, %g0		! Is this a mutant Sun4/400???
 546		be	sun4_mutant_remap	! Ugh, it is...
 
 
 
 547		 nop
 548
 549		b	sun4_normal_remap	! regular sun4, 2 level mmu
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 550		 nop
 551
 552remap_not_a_sun4:
 553		lda	[%g0] ASI_M_MMUREGS, %g1 ! same as ASI_PTE on sun4c
 554		and	%g1, 0x1, %g1		! Test SRMMU Enable bit ;-)
 555		cmp	%g1, 0x0
 556		be	sun4c_remap		! A sun4c MMU or normal Sun4
 557		 nop
 558srmmu_remap:
 559		/* First, check for a viking (TI) module. */
 560		set	0x40000000, %g2
 561		rd	%psr, %g3
 562		and	%g2, %g3, %g3
 563		subcc	%g3, 0x0, %g0
 564		bz	srmmu_nviking
 565		 nop
 566
 567		/* Figure out what kind of viking we are on.
 568		 * We need to know if we have to play with the
 569		 * AC bit and disable traps or not.
 570		 */
 571
 572		/* I've only seen MicroSparc's on SparcClassics with this
 573		 * bit set.
 574		 */
 575		set	0x800, %g2
 576		lda	[%g0] ASI_M_MMUREGS, %g3	! peek in the control reg
 577		and	%g2, %g3, %g3
 578		subcc	%g3, 0x0, %g0
 579		bnz	srmmu_nviking			! is in mbus mode
 580		 nop
 581		
 582		rd	%psr, %g3			! DO NOT TOUCH %g3
 583		andn	%g3, PSR_ET, %g2
 584		wr	%g2, 0x0, %psr
 585		WRITE_PAUSE
 586		
 587		/* Get context table pointer, then convert to
 588		 * a physical address, which is 36 bits.
 589		 */
 590		set	AC_M_CTPR, %g4
 591		lda	[%g4] ASI_M_MMUREGS, %g4
 592		sll	%g4, 0x4, %g4			! We use this below
 593							! DO NOT TOUCH %g4
 594
 595		/* Set the AC bit in the Viking's MMU control reg. */
 596		lda	[%g0] ASI_M_MMUREGS, %g5	! DO NOT TOUCH %g5
 597		set	0x8000, %g6			! AC bit mask
 598		or	%g5, %g6, %g6			! Or it in...
 599		sta	%g6, [%g0] ASI_M_MMUREGS	! Close your eyes...
 600
 601		/* Grrr, why does it seem like every other load/store
 602		 * on the sun4m is in some ASI space...
 603		 * Fine with me, let's get the pointer to the level 1
 604		 * page table directory and fetch its entry.
 605		 */
 606		lda	[%g4] ASI_M_BYPASS, %o1		! This is a level 1 ptr
 607		srl	%o1, 0x4, %o1			! Clear low 4 bits
 608		sll	%o1, 0x8, %o1			! Make physical
 609		
 610		/* Ok, pull in the PTD. */
 611		lda	[%o1] ASI_M_BYPASS, %o2		! This is the 0x0 16MB pgd
 612
 613		/* Calculate to KERNBASE entry. */
 614		add	%o1, KERNBASE >> (SRMMU_PGDIR_SHIFT - 2), %o3		
 615
 616		/* Poke the entry into the calculated address. */
 617		sta	%o2, [%o3] ASI_M_BYPASS
 618
 619		/* I don't get it Sun, if you engineered all these
 620		 * boot loaders and the PROM (thank you for the debugging
 621		 * features btw) why did you not have them load kernel
 622		 * images up in high address space, since this is necessary
 623		 * for ABI compliance anyways?  Does this low-mapping provide
 624		 * enhanced interoperability?
 625		 *
 626		 * "The PROM is the computer."
 627		 */
 628
 629		/* Ok, restore the MMU control register we saved in %g5 */
 630		sta	%g5, [%g0] ASI_M_MMUREGS	! POW... ouch
 631
 632		/* Turn traps back on.  We saved it in %g3 earlier. */
 633		wr	%g3, 0x0, %psr			! tick tock, tick tock
 634
 635		/* Now we burn precious CPU cycles due to bad engineering. */
 636		WRITE_PAUSE
 637
 638		/* Wow, all that just to move a 32-bit value from one
 639		 * place to another...  Jump to high memory.
 640		 */
 641		b	go_to_highmem
 642		 nop
 643
 
 644		/* This works on viking's in Mbus mode and all
 645		 * other MBUS modules.  It is virtually the same as
 646		 * the above madness sans turning traps off and flipping
 647		 * the AC bit.
 648		 */
 649srmmu_nviking:
 650		set	AC_M_CTPR, %g1
 651		lda	[%g1] ASI_M_MMUREGS, %g1	! get ctx table ptr
 652		sll	%g1, 0x4, %g1			! make physical addr
 653		lda	[%g1] ASI_M_BYPASS, %g1		! ptr to level 1 pg_table
 654		srl	%g1, 0x4, %g1
 655		sll	%g1, 0x8, %g1			! make phys addr for l1 tbl
 656
 657		lda	[%g1] ASI_M_BYPASS, %g2		! get level1 entry for 0x0
 658		add	%g1, KERNBASE >> (SRMMU_PGDIR_SHIFT - 2), %g3
 659		sta	%g2, [%g3] ASI_M_BYPASS		! place at KERNBASE entry
 660		b	go_to_highmem
 661		 nop					! wheee....
 662
 663		/* This remaps the kernel on Sun4/4xx machines
 664		 * that have the Sun Mutant Three Level MMU.
 665		 * It's like a platypus, Sun didn't have the
 666		 * SRMMU in conception so they kludged the three
 667		 * level logic in the regular Sun4 MMU probably.
 668		 *
 669		 * Basically, you take each entry in the top level
 670		 * directory that maps the low 3MB starting at
 671		 * address zero and put the mapping in the KERNBASE
 672		 * slots.  These top level pgd's are called regmaps.
 673		 */
 674sun4_mutant_remap:
 675		or	%g0, %g0, %g3		! source base
 676		sethi	%hi(KERNBASE), %g4	! destination base
 677		or	%g4, %lo(KERNBASE), %g4
 678		sethi	%hi(0x300000), %g5
 679		or	%g5, %lo(0x300000), %g5	! upper bound 3MB
 680		or	%g0, 0x1, %l6
 681		sll	%l6, 24, %l6		! Regmap mapping size
 682		add	%g3, 0x2, %g3		! Base magic
 683		add	%g4, 0x2, %g4		! Base magic
 684
 685		/* Main remapping loop on Sun4-Mutant-MMU.
 686		 * "I am not an animal..." -Famous Mutant Person
 687		 */
 688sun4_mutant_loop:
 689		lduha	[%g3] ASI_REGMAP, %g2	! Get lower entry
 690		stha	%g2, [%g4] ASI_REGMAP	! Store in high entry
 691		add	%g4, %l6, %g4		! Move up high memory ptr
 692		subcc	%g3, %g5, %g0		! Reached our limit?
 693		blu	sun4_mutant_loop	! Nope, loop again
 694		 add	%g3, %l6, %g3		! delay, Move up low ptr
 695		b	go_to_highmem		! Jump to high memory.
 696		 nop
 697
 698		/* The following is for non-4/4xx sun4 MMU's. */
 699sun4_normal_remap:
 700		mov	0, %g3			! source base
 701		set	KERNBASE, %g4		! destination base
 702		set	0x300000, %g5		! upper bound 3MB
 703		mov	1, %l6
 704		sll	%l6, 18, %l6		! sun4 mmu segmap size
 705sun4_normal_loop:
 706		lduha	[%g3] ASI_SEGMAP, %g6	! load phys_seg
 707		stha	%g6, [%g4] ASI_SEGMAP	! stort new virt mapping
 708		add	%g3, %l6, %g3		! increment source pointer
 709		subcc	%g3, %g5, %g0		! reached limit?
 710		blu	sun4_normal_loop	! nope, loop again
 711		 add	%g4, %l6, %g4		! delay, increment dest ptr
 712		b	go_to_highmem
 713		 nop
 714
 715		/* The following works for Sun4c MMU's */
 716sun4c_remap:
 717		mov	0, %g3			! source base
 718		set	KERNBASE, %g4		! destination base
 719		set	0x300000, %g5		! upper bound 3MB
 720		mov	1, %l6
 721		sll	%l6, 18, %l6		! sun4c mmu segmap size
 722sun4c_remap_loop:
 723		lda	[%g3] ASI_SEGMAP, %g6	! load phys_seg
 724		sta	%g6, [%g4] ASI_SEGMAP   ! store new virt mapping
 725		add	%g3, %l6, %g3		! Increment source ptr
 726		subcc	%g3, %g5, %g0		! Reached limit?
 727		bl	sun4c_remap_loop	! Nope, loop again
 728		 add	%g4, %l6, %g4		! delay, Increment dest ptr
 
 729
 730/* Now do a non-relative jump so that PC is in high-memory */
 731go_to_highmem:
 732		set	execute_in_high_mem, %g1
 733		jmpl	%g1, %g0
 734		 nop
 735
 736/* The code above should be at beginning and we have to take care about
 737 * short jumps, as branching to .init.text section from .text is usually
 738 * impossible */
 739		__INIT
 740/* Acquire boot time privileged register values, this will help debugging.
 741 * I figure out and store nwindows and nwindowsm1 later on.
 742 */
 743execute_in_high_mem:
 744		mov	%l0, %o0		! put back romvec
 745		mov	%l1, %o1		! and debug_vec
 746
 747		sethi	%hi(prom_vector_p), %g1
 748		st	%o0, [%g1 + %lo(prom_vector_p)]
 749
 750		sethi	%hi(linux_dbvec), %g1
 751		st	%o1, [%g1 + %lo(linux_dbvec)]
 752
 753		ld	[%o0 + 0x4], %o3
 754		and	%o3, 0x3, %o5			! get the version
 755
 756		cmp	%o3, 0x2			! a v2 prom?
 757		be	found_version
 758		 nop
 759
 760		/* paul@sfe.com.au */
 761		cmp	%o3, 0x3			! a v3 prom?
 762		be	found_version
 763		 nop
 764
 765/* Old sun4's pass our load address into %o0 instead of the prom
 766 * pointer. On sun4's you have to hard code the romvec pointer into
 767 * your code. Sun probably still does that because they don't even
 768 * trust their own "OpenBoot" specifications.
 769 */
 770		set	LOAD_ADDR, %g6
 771		cmp	%o0, %g6		! an old sun4?
 772		be	sun4_init
 773		 nop
 774
 775found_version:
 776/* Get the machine type via the mysterious romvec node operations. */
 777
 778		add	%g7, 0x1c, %l1		
 779		ld	[%l1], %l0
 780		ld	[%l0], %l0
 781		call 	%l0
 782		 or	%g0, %g0, %o0		! next_node(0) = first_node
 783		or	%o0, %g0, %g6
 784
 785		sethi	%hi(cputypvar), %o1	! First node has cpu-arch
 786		or	%o1, %lo(cputypvar), %o1
 787		sethi	%hi(cputypval), %o2	! information, the string
 788		or	%o2, %lo(cputypval), %o2
 789		ld	[%l1], %l0		! 'compatibility' tells
 790		ld	[%l0 + 0xc], %l0	! that we want 'sun4x' where
 791		call	%l0			! x is one of '', 'c', 'm',
 792		 nop				! 'd' or 'e'. %o2 holds pointer
 793						! to a buf where above string
 794						! will get stored by the prom.
 795
 796		subcc	%o0, %g0, %g0
 797		bpos	got_prop		! Got the property
 798		 nop
 799
 800		or	%g6, %g0, %o0
 801		sethi	%hi(cputypvar_sun4m), %o1
 802		or	%o1, %lo(cputypvar_sun4m), %o1
 803		sethi	%hi(cputypval), %o2
 804		or	%o2, %lo(cputypval), %o2
 805		ld	[%l1], %l0
 806		ld	[%l0 + 0xc], %l0
 807		call	%l0
 
 
 
 
 
 
 
 
 808		 nop
 809
 810got_prop:
 811#ifdef CONFIG_SPARC_LEON
 812	        /* no cpu-type check is needed, it is a SPARC-LEON */
 813
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 814		sethi	%hi(boot_cpu_id), %g2	! boot-cpu index
 815
 816#ifdef CONFIG_SMP
 817		ldub	[%g2 + %lo(boot_cpu_id)], %g1
 818		cmp	%g1, 0xff		! unset means first CPU
 819		bne	leon_smp_cpu_startup	! continue only with master
 820		 nop
 821#endif
 822		/* Get CPU-ID from most significant 4-bit of ASR17 */
 823		rd     %asr17, %g1
 824		srl    %g1, 28, %g1
 825
 826		/* Update boot_cpu_id only on boot cpu */
 827		stub	%g1, [%g2 + %lo(boot_cpu_id)]
 828
 829		ba sun4c_continue_boot
 830		 nop
 831#endif
 832		set	cputypval, %o2
 833		ldub	[%o2 + 0x4], %l1
 834
 835		cmp	%l1, ' '
 836		be	1f
 837		 cmp	%l1, 'c'
 838		be	1f
 839		 cmp	%l1, 'm'
 840		be	1f
 841		 cmp	%l1, 's'
 842		be	1f
 843		 cmp	%l1, 'd'
 844		be	1f
 845		 cmp	%l1, 'e'
 846		be	no_sun4e_here		! Could be a sun4e.
 847		 nop
 848		b	no_sun4u_here		! AIEEE, a V9 sun4u... Get our BIG BROTHER kernel :))
 849		 nop
 850
 8511:		set	cputypval, %l1
 852		ldub	[%l1 + 0x4], %l1
 853		cmp	%l1, 'm'		! Test for sun4d, sun4e ?
 854		be	sun4m_init
 855		 cmp	%l1, 's'		! Treat sun4s as sun4m
 856		be	sun4m_init
 857		 cmp	%l1, 'd'		! Let us see how the beast will die
 858		be	sun4d_init
 859		 nop
 860
 861		/* Jump into mmu context zero. */
 862		set	AC_CONTEXT, %g1
 863		stba	%g0, [%g1] ASI_CONTROL
 864
 865		b	sun4c_continue_boot
 866		 nop
 867
 868/* CPUID in bootbus can be found at PA 0xff0140000 */
 869#define SUN4D_BOOTBUS_CPUID     0xf0140000
 870
 871sun4d_init:
 872	/* Need to patch call to handler_irq */
 873	set	patch_handler_irq, %g4
 874	set	sun4d_handler_irq, %g5
 875	sethi	%hi(0x40000000), %g3		! call
 876	sub	%g5, %g4, %g5
 877	srl	%g5, 2, %g5
 878	or	%g5, %g3, %g5
 879	st	%g5, [%g4]
 880
 881#ifdef CONFIG_SMP
 882	/* Get our CPU id out of bootbus */
 883	set     SUN4D_BOOTBUS_CPUID, %g3
 884	lduba   [%g3] ASI_M_CTL, %g3
 885	and     %g3, 0xf8, %g3
 886	srl     %g3, 3, %g4
 887	sta     %g4, [%g0] ASI_M_VIKING_TMP1
 888	sethi	%hi(boot_cpu_id), %g5
 889	stb	%g4, [%g5 + %lo(boot_cpu_id)]
 890#endif
 891
 892	/* Fall through to sun4m_init */
 893
 894sun4m_init:
 895	/* XXX Fucking Cypress... */
 896	lda	[%g0] ASI_M_MMUREGS, %g5
 897	srl	%g5, 28, %g4
 898
 899	cmp	%g4, 1
 900	bne	1f
 901	 srl	%g5, 24, %g4
 902
 903	and	%g4, 0xf, %g4
 904	cmp	%g4, 7		/* This would be a HyperSparc. */
 905
 906	bne	2f
 907	 nop
 908
 9091:
 910
 911#define PATCH_IT(dst, src)	\
 912	set	(dst), %g5;	\
 913	set	(src), %g4;	\
 914	ld	[%g4], %g3;	\
 915	st	%g3, [%g5];	\
 916	ld	[%g4+0x4], %g3;	\
 917	st	%g3, [%g5+0x4];
 918
 919	/* Signed multiply. */
 920	PATCH_IT(.mul, .mul_patch)
 921	PATCH_IT(.mul+0x08, .mul_patch+0x08)
 922
 923	/* Signed remainder. */
 924	PATCH_IT(.rem, .rem_patch)
 925	PATCH_IT(.rem+0x08, .rem_patch+0x08)
 926	PATCH_IT(.rem+0x10, .rem_patch+0x10)
 927	PATCH_IT(.rem+0x18, .rem_patch+0x18)
 928	PATCH_IT(.rem+0x20, .rem_patch+0x20)
 929	PATCH_IT(.rem+0x28, .rem_patch+0x28)
 930
 931	/* Signed division. */
 932	PATCH_IT(.div, .div_patch)
 933	PATCH_IT(.div+0x08, .div_patch+0x08)
 934	PATCH_IT(.div+0x10, .div_patch+0x10)
 935	PATCH_IT(.div+0x18, .div_patch+0x18)
 936	PATCH_IT(.div+0x20, .div_patch+0x20)
 937
 938	/* Unsigned multiply. */
 939	PATCH_IT(.umul, .umul_patch)
 940	PATCH_IT(.umul+0x08, .umul_patch+0x08)
 941
 942	/* Unsigned remainder. */
 943	PATCH_IT(.urem, .urem_patch)
 944	PATCH_IT(.urem+0x08, .urem_patch+0x08)
 945	PATCH_IT(.urem+0x10, .urem_patch+0x10)
 946	PATCH_IT(.urem+0x18, .urem_patch+0x18)
 947
 948	/* Unsigned division. */
 949	PATCH_IT(.udiv, .udiv_patch)
 950	PATCH_IT(.udiv+0x08, .udiv_patch+0x08)
 951	PATCH_IT(.udiv+0x10, .udiv_patch+0x10)
 952
 953#undef PATCH_IT
 954
 955/* Ok, the PROM could have done funny things and apple cider could still
 956 * be sitting in the fault status/address registers.  Read them all to
 957 * clear them so we don't get magic faults later on.
 958 */
 959/* This sucks, apparently this makes Vikings call prom panic, will fix later */
 9602:
 961		rd	%psr, %o1
 962		srl	%o1, 28, %o1		! Get a type of the CPU
 963
 964		subcc	%o1, 4, %g0		! TI: Viking or MicroSPARC
 965		be	sun4c_continue_boot
 966		 nop
 967
 968		set	AC_M_SFSR, %o0
 969		lda	[%o0] ASI_M_MMUREGS, %g0
 970		set	AC_M_SFAR, %o0
 971		lda	[%o0] ASI_M_MMUREGS, %g0
 972
 973		/* Fujitsu MicroSPARC-II has no asynchronous flavors of FARs */
 974		subcc	%o1, 0, %g0
 975		be	sun4c_continue_boot
 976		 nop
 977
 978		set	AC_M_AFSR, %o0
 979		lda	[%o0] ASI_M_MMUREGS, %g0
 980		set	AC_M_AFAR, %o0
 981		lda	[%o0] ASI_M_MMUREGS, %g0
 982		 nop
 983
 984
 985sun4c_continue_boot:
 986
 987
 988/* Aieee, now set PC and nPC, enable traps, give ourselves a stack and it's
 989 * show-time!
 990 */
 991
 992		sethi	%hi(cputyp), %o0
 993		st	%g4, [%o0 + %lo(cputyp)]
 994
 995		/* Turn on Supervisor, EnableFloating, and all the PIL bits.
 996		 * Also puts us in register window zero with traps off.
 997		 */
 998		set	(PSR_PS | PSR_S | PSR_PIL | PSR_EF), %g2
 999		wr	%g2, 0x0, %psr
1000		WRITE_PAUSE
1001
1002		/* I want a kernel stack NOW! */
1003		set	init_thread_union, %g1
1004		set	(THREAD_SIZE - STACKFRAME_SZ), %g2
1005		add	%g1, %g2, %sp
1006		mov	0, %fp			/* And for good luck */
1007
1008		/* Zero out our BSS section. */
1009		set	__bss_start , %o0	! First address of BSS
1010		set	_end , %o1		! Last address of BSS
1011		add	%o0, 0x1, %o0
10121:	
1013		stb	%g0, [%o0]
1014		subcc	%o0, %o1, %g0
1015		bl	1b
1016		 add	%o0, 0x1, %o0
1017
1018		/* If boot_cpu_id has not been setup by machine specific
1019		 * init-code above we default it to zero.
1020		 */
1021		sethi	%hi(boot_cpu_id), %g2
1022		ldub	[%g2 + %lo(boot_cpu_id)], %g3
1023		cmp	%g3, 0xff
1024		bne	1f
1025		 nop
1026		mov	%g0, %g3
1027		stub	%g3, [%g2 + %lo(boot_cpu_id)]
1028
10291:		/* boot_cpu_id set. calculate boot_cpu_id4 = boot_cpu_id*4 */
1030		sll	%g3, 2, %g3
1031		sethi	%hi(boot_cpu_id4), %g2
1032		stub	%g3, [%g2 + %lo(boot_cpu_id4)]
1033
1034		/* Initialize the uwinmask value for init task just in case.
1035		 * But first make current_set[boot_cpu_id] point to something useful.
1036		 */
1037		set	init_thread_union, %g6
1038		set	current_set, %g2
1039#ifdef CONFIG_SMP
1040		st	%g6, [%g2]
1041		add	%g2, %g3, %g2
1042#endif
1043		st	%g6, [%g2]
1044
1045		st	%g0, [%g6 + TI_UWINMASK]
1046
1047/* Compute NWINDOWS and stash it away. Now uses %wim trick explained
1048 * in the V8 manual. Ok, this method seems to work, Sparc is cool...
1049 * No, it doesn't work, have to play the save/readCWP/restore trick.
1050 */
1051
1052		wr	%g0, 0x0, %wim			! so we do not get a trap
1053		WRITE_PAUSE
1054
1055		save
1056
1057		rd	%psr, %g3
1058
1059		restore
1060
1061		and	%g3, 0x1f, %g3
1062		add	%g3, 0x1, %g3
1063
1064		mov	2, %g1
1065		wr	%g1, 0x0, %wim			! make window 1 invalid
1066		WRITE_PAUSE
1067
1068		cmp	%g3, 0x7
1069		bne	2f
1070		 nop
1071
1072		/* Adjust our window handling routines to
1073		 * do things correctly on 7 window Sparcs.
1074		 */
1075
1076#define		PATCH_INSN(src, dest) \
1077		set	src, %g5; \
1078		set	dest, %g2; \
1079		ld	[%g5], %g4; \
1080		st	%g4, [%g2];
1081	
1082		/* Patch for window spills... */
1083		PATCH_INSN(spnwin_patch1_7win, spnwin_patch1)
1084		PATCH_INSN(spnwin_patch2_7win, spnwin_patch2)
1085		PATCH_INSN(spnwin_patch3_7win, spnwin_patch3)
1086
1087		/* Patch for window fills... */
1088		PATCH_INSN(fnwin_patch1_7win, fnwin_patch1)
1089		PATCH_INSN(fnwin_patch2_7win, fnwin_patch2)
1090
1091		/* Patch for trap entry setup... */
1092		PATCH_INSN(tsetup_7win_patch1, tsetup_patch1)
1093		PATCH_INSN(tsetup_7win_patch2, tsetup_patch2)
1094		PATCH_INSN(tsetup_7win_patch3, tsetup_patch3)
1095		PATCH_INSN(tsetup_7win_patch4, tsetup_patch4)
1096		PATCH_INSN(tsetup_7win_patch5, tsetup_patch5)
1097		PATCH_INSN(tsetup_7win_patch6, tsetup_patch6)
1098
1099		/* Patch for returning from traps... */
1100		PATCH_INSN(rtrap_7win_patch1, rtrap_patch1)
1101		PATCH_INSN(rtrap_7win_patch2, rtrap_patch2)
1102		PATCH_INSN(rtrap_7win_patch3, rtrap_patch3)
1103		PATCH_INSN(rtrap_7win_patch4, rtrap_patch4)
1104		PATCH_INSN(rtrap_7win_patch5, rtrap_patch5)
1105
1106		/* Patch for killing user windows from the register file. */
1107		PATCH_INSN(kuw_patch1_7win, kuw_patch1)
1108
1109		/* Now patch the kernel window flush sequences.
1110		 * This saves 2 traps on every switch and fork.
1111		 */
1112		set	0x01000000, %g4
1113		set	flush_patch_one, %g5
1114		st	%g4, [%g5 + 0x18]
1115		st	%g4, [%g5 + 0x1c]
1116		set	flush_patch_two, %g5
1117		st	%g4, [%g5 + 0x18]
1118		st	%g4, [%g5 + 0x1c]
1119		set	flush_patch_three, %g5
1120		st	%g4, [%g5 + 0x18]
1121		st	%g4, [%g5 + 0x1c]
1122		set	flush_patch_four, %g5
1123		st	%g4, [%g5 + 0x18]
1124		st	%g4, [%g5 + 0x1c]
1125		set	flush_patch_exception, %g5
1126		st	%g4, [%g5 + 0x18]
1127		st	%g4, [%g5 + 0x1c]
1128		set	flush_patch_switch, %g5
1129		st	%g4, [%g5 + 0x18]
1130		st	%g4, [%g5 + 0x1c]
1131
11322:		
1133		sethi	%hi(nwindows), %g4
1134		st	%g3, [%g4 + %lo(nwindows)]	! store final value
1135		sub	%g3, 0x1, %g3
1136		sethi	%hi(nwindowsm1), %g4
1137		st	%g3, [%g4 + %lo(nwindowsm1)]
1138
1139		/* Here we go, start using Linux's trap table... */
1140		set	trapbase, %g3
1141		wr	%g3, 0x0, %tbr
1142		WRITE_PAUSE
1143
1144		/* Finally, turn on traps so that we can call c-code. */
1145		rd	%psr, %g3
1146		wr	%g3, 0x0, %psr
1147		WRITE_PAUSE
1148
1149		wr	%g3, PSR_ET, %psr
1150		WRITE_PAUSE
1151
1152		/* First we call prom_init() to set up PROMLIB, then
1153		 * off to start_kernel().
1154		 */
1155
1156		sethi	%hi(prom_vector_p), %g5
1157		ld	[%g5 + %lo(prom_vector_p)], %o0
1158		call	prom_init
1159		 nop
1160
1161		call 	start_kernel
1162		 nop
1163	
1164		/* We should not get here. */
1165		call	halt_me
1166		 nop
1167
1168sun4_init:
1169		sethi   %hi(SUN4_PROM_VECTOR+0x84), %o1
1170		ld      [%o1 + %lo(SUN4_PROM_VECTOR+0x84)], %o1
1171		set     sun4_notsup, %o0
1172		call    %o1	/* printf */
1173		 nop
1174		sethi   %hi(SUN4_PROM_VECTOR+0xc4), %o1
1175		ld      [%o1 + %lo(SUN4_PROM_VECTOR+0xc4)], %o1
1176		call    %o1	/* exittomon */
1177		 nop
11781:		ba      1b                      ! Cannot exit into KMON
1179		 nop
1180
1181no_sun4e_here:
1182		ld	[%g7 + 0x68], %o1
1183		set	sun4e_notsup, %o0
1184		call	%o1
1185		 nop
1186		b	halt_me
1187		 nop
1188
1189		__INITDATA
1190
1191sun4u_1:
1192		.asciz "finddevice"
1193		.align	4
1194sun4u_2:
1195		.asciz "/chosen"
1196		.align	4
1197sun4u_3:
1198		.asciz "getprop"
1199		.align	4
1200sun4u_4:
1201		.asciz "stdout"
1202		.align	4
1203sun4u_5:
1204		.asciz "write"
1205		.align	4
1206sun4u_6:
1207        	.asciz  "\n\rOn sun4u you have to use UltraLinux (64bit) kernel\n\rand not a 32bit sun4[cdem] version\n\r\n\r"
1208sun4u_6e:
1209		.align	4
1210sun4u_7:
1211		.asciz "exit"
1212		.align	8
1213sun4u_a1:
1214		.word	0, sun4u_1, 0, 1, 0, 1, 0, sun4u_2, 0
1215sun4u_r1:
1216		.word	0
1217sun4u_a2:
1218		.word	0, sun4u_3, 0, 4, 0, 1, 0
1219sun4u_i2:
1220		.word	0, 0, sun4u_4, 0, sun4u_1, 0, 8, 0
1221sun4u_r2:
1222		.word	0
1223sun4u_a3:
1224		.word	0, sun4u_5, 0, 3, 0, 1, 0
1225sun4u_i3:
1226		.word	0, 0, sun4u_6, 0, sun4u_6e - sun4u_6 - 1, 0
1227sun4u_r3:
1228		.word	0
1229sun4u_a4:
1230		.word	0, sun4u_7, 0, 0, 0, 0
1231sun4u_r4:
1232
1233		__INIT
1234no_sun4u_here:
1235		set	sun4u_a1, %o0
1236		set	current_pc, %l2
1237		cmp	%l2, %g3
1238		be	1f
1239		 mov	%o4, %l0
1240		sub	%g3, %l2, %l6
1241		add	%o0, %l6, %o0
1242		mov	%o0, %l4
1243		mov	sun4u_r4 - sun4u_a1, %l3
1244		ld	[%l4], %l5
12452:
1246		add	%l4, 4, %l4
1247		cmp	%l5, %l2
1248		add	%l5, %l6, %l5
1249		bgeu,a	3f
1250		 st	%l5, [%l4 - 4]
12513:
1252		subcc	%l3, 4, %l3
1253		bne	2b
1254		 ld	[%l4], %l5
12551:
1256		call	%l0
1257		 mov	%o0, %l1
1258
1259		ld	[%l1 + (sun4u_r1 - sun4u_a1)], %o1
1260		add	%l1, (sun4u_a2 - sun4u_a1), %o0
1261		call	%l0
1262		 st	%o1, [%o0 + (sun4u_i2 - sun4u_a2)]
1263
1264		ld	[%l1 + (sun4u_1 - sun4u_a1)], %o1
1265		add	%l1, (sun4u_a3 - sun4u_a1), %o0
1266		call	%l0
1267		st	%o1, [%o0 + (sun4u_i3 - sun4u_a3)]
1268
1269		call	%l0
1270		 add	%l1, (sun4u_a4 - sun4u_a1), %o0
1271
1272		/* Not reached */
1273halt_me:
1274		ld	[%g7 + 0x74], %o0
1275		call	%o0			! Get us out of here...
1276		 nop				! Apparently Solaris is better.
1277
1278/* Ok, now we continue in the .data/.text sections */
1279
1280	.data
1281	.align 4
1282
1283/*
1284 * Fill up the prom vector, note in particular the kind first element,
1285 * no joke. I don't need all of them in here as the entire prom vector
1286 * gets initialized in c-code so all routines can use it.
1287 */
1288
1289prom_vector_p:
1290		.word 0
1291
1292/* We calculate the following at boot time, window fills/spills and trap entry
1293 * code uses these to keep track of the register windows.
1294 */
1295
1296	.align 4
1297	.globl	nwindows
1298	.globl	nwindowsm1
1299nwindows:
1300	.word	8
1301nwindowsm1:
1302	.word	7
1303
1304/* Boot time debugger vector value.  We need this later on. */
1305
1306	.align 4
1307	.globl	linux_dbvec
1308linux_dbvec:
1309	.word	0
1310	.word	0
1311
1312	.align 8
1313
1314	.globl	lvl14_save
1315lvl14_save:
1316	.word	0
1317	.word	0
1318	.word	0
1319	.word	0
1320	.word	t_irq14
1321
1322        .section        ".fixup",#alloc,#execinstr
1323        .globl  __ret_efault
1324__ret_efault:
1325        ret
1326         restore %g0, -EFAULT, %o0
v6.9.4
  1/* SPDX-License-Identifier: GPL-2.0 */
  2/*
  3 * head.S: The initial boot code for the Sparc port of Linux.
  4 *
  5 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  6 * Copyright (C) 1995,1999 Pete Zaitcev   (zaitcev@yahoo.com)
  7 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
  8 * Copyright (C) 1997 Jakub Jelinek   (jj@sunsite.mff.cuni.cz)
  9 * Copyright (C) 1997 Michael A. Griffith (grif@acm.org)
 10 *
 11 * CompactPCI platform by Eric Brower, 1999.
 12 */
 13
 14#include <linux/export.h>
 15#include <linux/version.h>
 16#include <linux/init.h>
 17
 18#include <asm/head.h>
 19#include <asm/asi.h>
 20#include <asm/contregs.h>
 21#include <asm/ptrace.h>
 22#include <asm/psr.h>
 23#include <asm/page.h>
 24#include <asm/kdebug.h>
 25#include <asm/winmacro.h>
 26#include <asm/thread_info.h>	/* TI_UWINMASK */
 27#include <asm/errno.h>
 28#include <asm/pgtable.h>	/* PGDIR_SHIFT */
 29
 30	.data
 31/* The following are used with the prom_vector node-ops to figure out
 32 * the cpu-type
 
 33 */
 
 
 
 
 
 34	.align 4
 35	.globl cputypval
 36cputypval:
 37	.asciz "sun4m"
 38	.ascii "     "
 39
 40/* Tested on SS-5, SS-10 */
 
 
 41	.align 4
 
 
 
 
 
 
 
 
 42cputypvar:
 
 
 
 
 
 43	.asciz "compatible"
 44
 45	.align 4
 46
 47notsup:
 48	.asciz	"Sparc-Linux sun4/sun4c or MMU-less not supported\n\n"
 49	.align 4
 50
 51sun4e_notsup:
 52        .asciz  "Sparc-Linux sun4e support does not exist\n\n"
 53	.align 4
 54
 55/* The trap-table - located in the __HEAD section */
 56#include "ttable_32.S"
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 57
 
 58	.align PAGE_SIZE
 59
 60/* This was the only reasonable way I could think of to properly align
 61 * these page-table data structures.
 62 */
 
 
 
 63	.globl empty_zero_page
 
 
 
 
 
 
 
 
 64empty_zero_page:	.skip PAGE_SIZE
 65EXPORT_SYMBOL(empty_zero_page)
 66
 67	.global root_flags
 68	.global ram_flags
 69	.global root_dev
 70	.global sparc_ramdisk_image
 71	.global sparc_ramdisk_size
 72
 73/* This stuff has to be in sync with SILO and other potential boot loaders
 74 * Fields should be kept upward compatible and whenever any change is made,
 75 * HdrS version should be incremented.
 76 */
 77	.ascii	"HdrS"
 78	.word	LINUX_VERSION_CODE
 79	.half	0x0203		/* HdrS version */
 80root_flags:
 81	.half	1
 82root_dev:
 83	.half	0
 84ram_flags:
 85	.half	0
 86sparc_ramdisk_image:
 87	.word	0
 88sparc_ramdisk_size:
 89	.word	0
 90	.word	reboot_command
 91	.word	0, 0, 0
 92	.word	_end
 93
 94/* Cool, here we go. Pick up the romvec pointer in %o0 and stash it in
 95 * %g7 and at prom_vector_p. And also quickly check whether we are on
 96 * a v0, v2, or v3 prom.
 97 */
 98gokernel:
 99		/* Ok, it's nice to know, as early as possible, if we
100		 * are already mapped where we expect to be in virtual
101		 * memory.  The Solaris /boot elf format bootloader
102		 * will peek into our elf header and load us where
103		 * we want to be, otherwise we have to re-map.
104		 *
105		 * Some boot loaders don't place the jmp'rs address
106		 * in %o7, so we do a pc-relative call to a local
107		 * label, then see what %o7 has.
108		 */
109
110		mov	%o7, %g4		! Save %o7
111
112		/* Jump to it, and pray... */
113current_pc:
114		call	1f
115		 nop
116
1171:
118		mov	%o7, %g3
119
120		tst	%o0
121		be	no_sun4u_here
122		 mov	%g4, %o7		/* Previous %o7. */
123
124		mov	%o0, %l0		! stash away romvec
125		mov	%o0, %g7		! put it here too
126		mov	%o1, %l1		! stash away debug_vec too
127
128		/* Ok, let's check out our run time program counter. */
129		set	current_pc, %g5
130		cmp	%g3, %g5
131		be	already_mapped
132		 nop
133
134		/* %l6 will hold the offset we have to subtract
135		 * from absolute symbols in order to access areas
136		 * in our own image.  If already mapped this is
137		 * just plain zero, else it is KERNBASE.
138		 */
139		set	KERNBASE, %l6
140		b	copy_prom_lvl14
141		 nop
142
143already_mapped:
144		mov	0, %l6
145
146		/* Copy over the Prom's level 14 clock handler. */
147copy_prom_lvl14:
148#if 1
149		/* DJHR
150		 * preserve our linked/calculated instructions
151		 */
152		set	lvl14_save, %g1
153		set	t_irq14, %g3
154		sub	%g1, %l6, %g1		! translate to physical
155		sub	%g3, %l6, %g3		! translate to physical
156		ldd	[%g3], %g4
157		std	%g4, [%g1]
158		ldd	[%g3+8], %g4
159		std	%g4, [%g1+8]
160#endif
161		rd	%tbr, %g1
162		andn	%g1, 0xfff, %g1		! proms trap table base
163		or	%g0, (0x1e<<4), %g2	! offset to lvl14 intr
164		or	%g1, %g2, %g2
165		set	t_irq14, %g3
166		sub	%g3, %l6, %g3
167		ldd	[%g2], %g4
168		std	%g4, [%g3]
169		ldd	[%g2 + 0x8], %g4
170		std	%g4, [%g3 + 0x8]	! Copy proms handler
171
172/* DON'T TOUCH %l0 thru %l5 in these remapping routines,
173 * we need their values afterwards!
 
174 */
175
176		/* Now check whether we are already mapped, if we
177		 * are we can skip all this garbage coming up.
178		 */
179copy_prom_done:
180		cmp	%l6, 0
181		be	go_to_highmem		! this will be a nop then
182		 nop
183
184		/* Validate that we are in fact running on an
185		 * SRMMU based cpu.
186		 */
187		set	0x4000, %g6
188		cmp	%g7, %g6
189		bne	not_a_sun4
190		 nop
191
192halt_notsup:
193		ld	[%g7 + 0x68], %o1
194		set	notsup, %o0
195		sub	%o0, %l6, %o0
196		call	%o1
197		 nop
198		ba	halt_me
199		 nop
200
201not_a_sun4:
202		/* It looks like this is a machine we support.
203		 * Now find out what MMU we are dealing with
204		 * LEON - identified by the psr.impl field
205		 * Viking - identified by the psr.impl field
206		 * In all other cases a sun4m srmmu.
207		 * We check that the MMU is enabled in all cases.
208		 */
209
210		/* Check if this is a LEON CPU */
211		rd	%psr, %g3
212		srl	%g3, PSR_IMPL_SHIFT, %g3
213		and	%g3, PSR_IMPL_SHIFTED_MASK, %g3
214		cmp	%g3, PSR_IMPL_LEON
215		be	leon_remap		/* It is a LEON - jump */
216		 nop
217
218		/* Sanity-check, is MMU enabled */
219		lda	[%g0] ASI_M_MMUREGS, %g1
220		andcc	%g1, 1, %g0
221		be	halt_notsup
 
222		 nop
223
224		/* Check for a viking (TI) module. */
225		cmp	%g3, PSR_IMPL_TI
226		bne	srmmu_not_viking
 
 
 
227		 nop
228
229		/* Figure out what kind of viking we are on.
230		 * We need to know if we have to play with the
231		 * AC bit and disable traps or not.
232		 */
233
234		/* I've only seen MicroSparc's on SparcClassics with this
235		 * bit set.
236		 */
237		set	0x800, %g2
238		lda	[%g0] ASI_M_MMUREGS, %g3	! peek in the control reg
239		and	%g2, %g3, %g3
240		subcc	%g3, 0x0, %g0
241		bnz	srmmu_not_viking			! is in mbus mode
242		 nop
243
244		rd	%psr, %g3			! DO NOT TOUCH %g3
245		andn	%g3, PSR_ET, %g2
246		wr	%g2, 0x0, %psr
247		WRITE_PAUSE
248
249		/* Get context table pointer, then convert to
250		 * a physical address, which is 36 bits.
251		 */
252		set	AC_M_CTPR, %g4
253		lda	[%g4] ASI_M_MMUREGS, %g4
254		sll	%g4, 0x4, %g4			! We use this below
255							! DO NOT TOUCH %g4
256
257		/* Set the AC bit in the Viking's MMU control reg. */
258		lda	[%g0] ASI_M_MMUREGS, %g5	! DO NOT TOUCH %g5
259		set	0x8000, %g6			! AC bit mask
260		or	%g5, %g6, %g6			! Or it in...
261		sta	%g6, [%g0] ASI_M_MMUREGS	! Close your eyes...
262
263		/* Grrr, why does it seem like every other load/store
264		 * on the sun4m is in some ASI space...
265		 * Fine with me, let's get the pointer to the level 1
266		 * page table directory and fetch its entry.
267		 */
268		lda	[%g4] ASI_M_BYPASS, %o1		! This is a level 1 ptr
269		srl	%o1, 0x4, %o1			! Clear low 4 bits
270		sll	%o1, 0x8, %o1			! Make physical
271
272		/* Ok, pull in the PTD. */
273		lda	[%o1] ASI_M_BYPASS, %o2		! This is the 0x0 16MB pgd
274
275		/* Calculate to KERNBASE entry. */
276		add	%o1, KERNBASE >> (PGDIR_SHIFT - 2), %o3
277
278		/* Poke the entry into the calculated address. */
279		sta	%o2, [%o3] ASI_M_BYPASS
280
281		/* I don't get it Sun, if you engineered all these
282		 * boot loaders and the PROM (thank you for the debugging
283		 * features btw) why did you not have them load kernel
284		 * images up in high address space, since this is necessary
285		 * for ABI compliance anyways?  Does this low-mapping provide
286		 * enhanced interoperability?
287		 *
288		 * "The PROM is the computer."
289		 */
290
291		/* Ok, restore the MMU control register we saved in %g5 */
292		sta	%g5, [%g0] ASI_M_MMUREGS	! POW... ouch
293
294		/* Turn traps back on.  We saved it in %g3 earlier. */
295		wr	%g3, 0x0, %psr			! tick tock, tick tock
296
297		/* Now we burn precious CPU cycles due to bad engineering. */
298		WRITE_PAUSE
299
300		/* Wow, all that just to move a 32-bit value from one
301		 * place to another...  Jump to high memory.
302		 */
303		b	go_to_highmem
304		 nop
305
306srmmu_not_viking:
307		/* This works on viking's in Mbus mode and all
308		 * other MBUS modules.  It is virtually the same as
309		 * the above madness sans turning traps off and flipping
310		 * the AC bit.
311		 */
 
312		set	AC_M_CTPR, %g1
313		lda	[%g1] ASI_M_MMUREGS, %g1	! get ctx table ptr
314		sll	%g1, 0x4, %g1			! make physical addr
315		lda	[%g1] ASI_M_BYPASS, %g1		! ptr to level 1 pg_table
316		srl	%g1, 0x4, %g1
317		sll	%g1, 0x8, %g1			! make phys addr for l1 tbl
318
319		lda	[%g1] ASI_M_BYPASS, %g2		! get level1 entry for 0x0
320		add	%g1, KERNBASE >> (PGDIR_SHIFT - 2), %g3
321		sta	%g2, [%g3] ASI_M_BYPASS		! place at KERNBASE entry
322		b	go_to_highmem
323		 nop					! wheee....
324
325
326leon_remap:
327		/* Sanity-check, is MMU enabled */
328		lda	[%g0] ASI_LEON_MMUREGS, %g1
329		andcc	%g1, 1, %g0
330		be	halt_notsup
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
331		 nop
332
333		/* Same code as in the srmmu_not_viking case,
334		 * with the LEON ASI for mmuregs
335		 */
336		set	AC_M_CTPR, %g1
337		lda	[%g1] ASI_LEON_MMUREGS, %g1	! get ctx table ptr
338		sll	%g1, 0x4, %g1			! make physical addr
339		lda	[%g1] ASI_M_BYPASS, %g1		! ptr to level 1 pg_table
340		srl	%g1, 0x4, %g1
341		sll	%g1, 0x8, %g1			! make phys addr for l1 tbl
342
343		lda	[%g1] ASI_M_BYPASS, %g2		! get level1 entry for 0x0
344		add	%g1, KERNBASE >> (PGDIR_SHIFT - 2), %g3
345		sta	%g2, [%g3] ASI_M_BYPASS		! place at KERNBASE entry
346		b	go_to_highmem
347		 nop					! wheee....
348
349/* Now do a non-relative jump so that PC is in high-memory */
350go_to_highmem:
351		set	execute_in_high_mem, %g1
352		jmpl	%g1, %g0
353		 nop
354
355/* The code above should be at beginning and we have to take care about
356 * short jumps, as branching to .init.text section from .text is usually
357 * impossible */
358		__INIT
359/* Acquire boot time privileged register values, this will help debugging.
360 * I figure out and store nwindows and nwindowsm1 later on.
361 */
362execute_in_high_mem:
363		mov	%l0, %o0		! put back romvec
364		mov	%l1, %o1		! and debug_vec
365
366		sethi	%hi(prom_vector_p), %g1
367		st	%o0, [%g1 + %lo(prom_vector_p)]
368
369		sethi	%hi(linux_dbvec), %g1
370		st	%o1, [%g1 + %lo(linux_dbvec)]
371
372		/* Get the machine type via the romvec
373		 * getprops node operation
374		 */
375		add	%g7, 0x1c, %l1
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
376		ld	[%l1], %l0
377		ld	[%l0], %l0
378		call	%l0
379		 or	%g0, %g0, %o0		! next_node(0) = first_node
380		or	%o0, %g0, %g6
381
382		sethi	%hi(cputypvar), %o1	! First node has cpu-arch
383		or	%o1, %lo(cputypvar), %o1
384		sethi	%hi(cputypval), %o2	! information, the string
385		or	%o2, %lo(cputypval), %o2
386		ld	[%l1], %l0		! 'compatible' tells
387		ld	[%l0 + 0xc], %l0	! that we want 'sun4x' where
388		call	%l0			! x is one of 'm', 'd' or 'e'.
389		 nop				! %o2 holds pointer
390						! to a buf where above string
391						! will get stored by the prom.
392
 
 
 
393
394		/* Check value of "compatible" property.
395		 * "value" => "model"
396		 * leon => sparc_leon
397		 * sun4m => sun4m
398		 * sun4s => sun4m
399		 * sun4d => sun4d
400		 * sun4e => "no_sun4e_here"
401		 * '*'   => "no_sun4u_here"
402		 * Check single letters only
403		 */
404
405		set	cputypval, %o2
406		/* If cputypval[0] == 'l' (lower case letter L) this is leon */
407		ldub	[%o2], %l1
408		cmp	%l1, 'l'
409		be	leon_init
410		 nop
411
412		/* Check cputypval[4] to find the sun model */
413		ldub	[%o2 + 0x4], %l1
 
414
415		cmp	%l1, 'm'
416		be	sun4m_init
417		 cmp	%l1, 's'
418		be	sun4m_init
419		 cmp	%l1, 'd'
420		be	sun4d_init
421		 cmp	%l1, 'e'
422		be	no_sun4e_here		! Could be a sun4e.
423		 nop
424		b	no_sun4u_here		! AIEEE, a V9 sun4u... Get our BIG BROTHER kernel :))
425		 nop
426
427leon_init:
428		/* LEON CPU - set boot_cpu_id */
429		sethi	%hi(boot_cpu_id), %g2	! boot-cpu index
430
431#ifdef CONFIG_SMP
432		ldub	[%g2 + %lo(boot_cpu_id)], %g1
433		cmp	%g1, 0xff		! unset means first CPU
434		bne	leon_smp_cpu_startup	! continue only with master
435		 nop
436#endif
437		/* Get CPU-ID from most significant 4-bit of ASR17 */
438		rd     %asr17, %g1
439		srl    %g1, 28, %g1
440
441		/* Update boot_cpu_id only on boot cpu */
442		stub	%g1, [%g2 + %lo(boot_cpu_id)]
443
444		ba continue_boot
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
445		 nop
446
447/* CPUID in bootbus can be found at PA 0xff0140000 */
448#define SUN4D_BOOTBUS_CPUID     0xf0140000
449
450sun4d_init:
451	/* Need to patch call to handler_irq */
452	set	patch_handler_irq, %g4
453	set	sun4d_handler_irq, %g5
454	sethi	%hi(0x40000000), %g3		! call
455	sub	%g5, %g4, %g5
456	srl	%g5, 2, %g5
457	or	%g5, %g3, %g5
458	st	%g5, [%g4]
459
460#ifdef CONFIG_SMP
461	/* Get our CPU id out of bootbus */
462	set     SUN4D_BOOTBUS_CPUID, %g3
463	lduba   [%g3] ASI_M_CTL, %g3
464	and     %g3, 0xf8, %g3
465	srl     %g3, 3, %g4
466	sta     %g4, [%g0] ASI_M_VIKING_TMP1
467	sethi	%hi(boot_cpu_id), %g5
468	stb	%g4, [%g5 + %lo(boot_cpu_id)]
469#endif
470
471	/* Fall through to sun4m_init */
472
473sun4m_init:
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
474/* Ok, the PROM could have done funny things and apple cider could still
475 * be sitting in the fault status/address registers.  Read them all to
476 * clear them so we don't get magic faults later on.
477 */
478/* This sucks, apparently this makes Vikings call prom panic, will fix later */
4792:
480		rd	%psr, %o1
481		srl	%o1, PSR_IMPL_SHIFT, %o1	! Get a type of the CPU
482
483		subcc	%o1, PSR_IMPL_TI, %g0		! TI: Viking or MicroSPARC
484		be	continue_boot
485		 nop
486
487		set	AC_M_SFSR, %o0
488		lda	[%o0] ASI_M_MMUREGS, %g0
489		set	AC_M_SFAR, %o0
490		lda	[%o0] ASI_M_MMUREGS, %g0
491
492		/* Fujitsu MicroSPARC-II has no asynchronous flavors of FARs */
493		subcc	%o1, 0, %g0
494		be	continue_boot
495		 nop
496
497		set	AC_M_AFSR, %o0
498		lda	[%o0] ASI_M_MMUREGS, %g0
499		set	AC_M_AFAR, %o0
500		lda	[%o0] ASI_M_MMUREGS, %g0
501		 nop
502
503
504continue_boot:
 
505
506/* Aieee, now set PC and nPC, enable traps, give ourselves a stack and it's
507 * show-time!
508 */
 
 
 
 
509		/* Turn on Supervisor, EnableFloating, and all the PIL bits.
510		 * Also puts us in register window zero with traps off.
511		 */
512		set	(PSR_PS | PSR_S | PSR_PIL | PSR_EF), %g2
513		wr	%g2, 0x0, %psr
514		WRITE_PAUSE
515
516		/* I want a kernel stack NOW! */
517		set	init_thread_union, %g1
518		set	(THREAD_SIZE - STACKFRAME_SZ - TRACEREG_SZ), %g2
519		add	%g1, %g2, %sp
520		mov	0, %fp			/* And for good luck */
521
522		/* Zero out our BSS section. */
523		set	__bss_start , %o0	! First address of BSS
524		set	_end , %o1		! Last address of BSS
525		add	%o0, 0x1, %o0
5261:
527		stb	%g0, [%o0]
528		subcc	%o0, %o1, %g0
529		bl	1b
530		 add	%o0, 0x1, %o0
531
532		/* If boot_cpu_id has not been setup by machine specific
533		 * init-code above we default it to zero.
534		 */
535		sethi	%hi(boot_cpu_id), %g2
536		ldub	[%g2 + %lo(boot_cpu_id)], %g3
537		cmp	%g3, 0xff
538		bne	1f
539		 nop
540		mov	%g0, %g3
541		stub	%g3, [%g2 + %lo(boot_cpu_id)]
542
5431:		sll	%g3, 2, %g3
 
 
 
544
545		/* Initialize the uwinmask value for init task just in case.
546		 * But first make current_set[boot_cpu_id] point to something useful.
547		 */
548		set	init_thread_union, %g6
549		set	current_set, %g2
550#ifdef CONFIG_SMP
551		st	%g6, [%g2]
552		add	%g2, %g3, %g2
553#endif
554		st	%g6, [%g2]
555
556		st	%g0, [%g6 + TI_UWINMASK]
557
558/* Compute NWINDOWS and stash it away. Now uses %wim trick explained
559 * in the V8 manual. Ok, this method seems to work, Sparc is cool...
560 * No, it doesn't work, have to play the save/readCWP/restore trick.
561 */
562
563		wr	%g0, 0x0, %wim			! so we do not get a trap
564		WRITE_PAUSE
565
566		save
567
568		rd	%psr, %g3
569
570		restore
571
572		and	%g3, 0x1f, %g3
573		add	%g3, 0x1, %g3
574
575		mov	2, %g1
576		wr	%g1, 0x0, %wim			! make window 1 invalid
577		WRITE_PAUSE
578
579		cmp	%g3, 0x7
580		bne	2f
581		 nop
582
583		/* Adjust our window handling routines to
584		 * do things correctly on 7 window Sparcs.
585		 */
586
587#define		PATCH_INSN(src, dest) \
588		set	src, %g5; \
589		set	dest, %g2; \
590		ld	[%g5], %g4; \
591		st	%g4, [%g2];
592
593		/* Patch for window spills... */
594		PATCH_INSN(spnwin_patch1_7win, spnwin_patch1)
595		PATCH_INSN(spnwin_patch2_7win, spnwin_patch2)
596		PATCH_INSN(spnwin_patch3_7win, spnwin_patch3)
597
598		/* Patch for window fills... */
599		PATCH_INSN(fnwin_patch1_7win, fnwin_patch1)
600		PATCH_INSN(fnwin_patch2_7win, fnwin_patch2)
601
602		/* Patch for trap entry setup... */
603		PATCH_INSN(tsetup_7win_patch1, tsetup_patch1)
604		PATCH_INSN(tsetup_7win_patch2, tsetup_patch2)
605		PATCH_INSN(tsetup_7win_patch3, tsetup_patch3)
606		PATCH_INSN(tsetup_7win_patch4, tsetup_patch4)
607		PATCH_INSN(tsetup_7win_patch5, tsetup_patch5)
608		PATCH_INSN(tsetup_7win_patch6, tsetup_patch6)
609
610		/* Patch for returning from traps... */
611		PATCH_INSN(rtrap_7win_patch1, rtrap_patch1)
612		PATCH_INSN(rtrap_7win_patch2, rtrap_patch2)
613		PATCH_INSN(rtrap_7win_patch3, rtrap_patch3)
614		PATCH_INSN(rtrap_7win_patch4, rtrap_patch4)
615		PATCH_INSN(rtrap_7win_patch5, rtrap_patch5)
616
617		/* Patch for killing user windows from the register file. */
618		PATCH_INSN(kuw_patch1_7win, kuw_patch1)
619
620		/* Now patch the kernel window flush sequences.
621		 * This saves 2 traps on every switch and fork.
622		 */
623		set	0x01000000, %g4
624		set	flush_patch_one, %g5
625		st	%g4, [%g5 + 0x18]
626		st	%g4, [%g5 + 0x1c]
627		set	flush_patch_two, %g5
628		st	%g4, [%g5 + 0x18]
629		st	%g4, [%g5 + 0x1c]
630		set	flush_patch_three, %g5
631		st	%g4, [%g5 + 0x18]
632		st	%g4, [%g5 + 0x1c]
633		set	flush_patch_four, %g5
634		st	%g4, [%g5 + 0x18]
635		st	%g4, [%g5 + 0x1c]
636		set	flush_patch_exception, %g5
637		st	%g4, [%g5 + 0x18]
638		st	%g4, [%g5 + 0x1c]
639		set	flush_patch_switch, %g5
640		st	%g4, [%g5 + 0x18]
641		st	%g4, [%g5 + 0x1c]
642
6432:
644		sethi	%hi(nwindows), %g4
645		st	%g3, [%g4 + %lo(nwindows)]	! store final value
646		sub	%g3, 0x1, %g3
647		sethi	%hi(nwindowsm1), %g4
648		st	%g3, [%g4 + %lo(nwindowsm1)]
649
650		/* Here we go, start using Linux's trap table... */
651		set	trapbase, %g3
652		wr	%g3, 0x0, %tbr
653		WRITE_PAUSE
654
655		/* Finally, turn on traps so that we can call c-code. */
656		rd	%psr, %g3
657		wr	%g3, 0x0, %psr
658		WRITE_PAUSE
659
660		wr	%g3, PSR_ET, %psr
661		WRITE_PAUSE
662
663		/* Call sparc32_start_kernel(struct linux_romvec *rp) */
 
 
 
664		sethi	%hi(prom_vector_p), %g5
665		ld	[%g5 + %lo(prom_vector_p)], %o0
666		call	sparc32_start_kernel
667		 nop
668
 
 
 
669		/* We should not get here. */
670		call	halt_me
671		 nop
672
 
 
 
 
 
 
 
 
 
 
 
 
 
673no_sun4e_here:
674		ld	[%g7 + 0x68], %o1
675		set	sun4e_notsup, %o0
676		call	%o1
677		 nop
678		b	halt_me
679		 nop
680
681		__INITDATA
682
683sun4u_1:
684		.asciz "finddevice"
685		.align	4
686sun4u_2:
687		.asciz "/chosen"
688		.align	4
689sun4u_3:
690		.asciz "getprop"
691		.align	4
692sun4u_4:
693		.asciz "stdout"
694		.align	4
695sun4u_5:
696		.asciz "write"
697		.align	4
698sun4u_6:
699		.asciz  "\n\rOn sun4u you have to use sparc64 kernel\n\rand not a sparc32 version\n\r\n\r"
700sun4u_6e:
701		.align	4
702sun4u_7:
703		.asciz "exit"
704		.align	8
705sun4u_a1:
706		.word	0, sun4u_1, 0, 1, 0, 1, 0, sun4u_2, 0
707sun4u_r1:
708		.word	0
709sun4u_a2:
710		.word	0, sun4u_3, 0, 4, 0, 1, 0
711sun4u_i2:
712		.word	0, 0, sun4u_4, 0, sun4u_1, 0, 8, 0
713sun4u_r2:
714		.word	0
715sun4u_a3:
716		.word	0, sun4u_5, 0, 3, 0, 1, 0
717sun4u_i3:
718		.word	0, 0, sun4u_6, 0, sun4u_6e - sun4u_6 - 1, 0
719sun4u_r3:
720		.word	0
721sun4u_a4:
722		.word	0, sun4u_7, 0, 0, 0, 0
723sun4u_r4:
724
725		__INIT
726no_sun4u_here:
727		set	sun4u_a1, %o0
728		set	current_pc, %l2
729		cmp	%l2, %g3
730		be	1f
731		 mov	%o4, %l0
732		sub	%g3, %l2, %l6
733		add	%o0, %l6, %o0
734		mov	%o0, %l4
735		mov	sun4u_r4 - sun4u_a1, %l3
736		ld	[%l4], %l5
7372:
738		add	%l4, 4, %l4
739		cmp	%l5, %l2
740		add	%l5, %l6, %l5
741		bgeu,a	3f
742		 st	%l5, [%l4 - 4]
7433:
744		subcc	%l3, 4, %l3
745		bne	2b
746		 ld	[%l4], %l5
7471:
748		call	%l0
749		 mov	%o0, %l1
750
751		ld	[%l1 + (sun4u_r1 - sun4u_a1)], %o1
752		add	%l1, (sun4u_a2 - sun4u_a1), %o0
753		call	%l0
754		 st	%o1, [%o0 + (sun4u_i2 - sun4u_a2)]
755
756		ld	[%l1 + (sun4u_1 - sun4u_a1)], %o1
757		add	%l1, (sun4u_a3 - sun4u_a1), %o0
758		call	%l0
759		st	%o1, [%o0 + (sun4u_i3 - sun4u_a3)]
760
761		call	%l0
762		 add	%l1, (sun4u_a4 - sun4u_a1), %o0
763
764		/* Not reached */
765halt_me:
766		ld	[%g7 + 0x74], %o0
767		call	%o0			! Get us out of here...
768		 nop				! Apparently Solaris is better.
769
770/* Ok, now we continue in the .data/.text sections */
771
772	.data
773	.align 4
774
775/*
776 * Fill up the prom vector, note in particular the kind first element,
777 * no joke. I don't need all of them in here as the entire prom vector
778 * gets initialized in c-code so all routines can use it.
779 */
780
781prom_vector_p:
782		.word 0
783
784/* We calculate the following at boot time, window fills/spills and trap entry
785 * code uses these to keep track of the register windows.
786 */
787
788	.align 4
789	.globl	nwindows
790	.globl	nwindowsm1
791nwindows:
792	.word	8
793nwindowsm1:
794	.word	7
795
796/* Boot time debugger vector value.  We need this later on. */
797
798	.align 4
799	.globl	linux_dbvec
800linux_dbvec:
801	.word	0
802	.word	0
803
804	.align 8
805
806	.globl	lvl14_save
807lvl14_save:
808	.word	0
809	.word	0
810	.word	0
811	.word	0
812	.word	t_irq14