Loading...
1/*
2 * Macintosh interrupts
3 *
4 * General design:
5 * In contrary to the Amiga and Atari platforms, the Mac hardware seems to
6 * exclusively use the autovector interrupts (the 'generic level0-level7'
7 * interrupts with exception vectors 0x19-0x1f). The following interrupt levels
8 * are used:
9 * 1 - VIA1
10 * - slot 0: one second interrupt (CA2)
11 * - slot 1: VBlank (CA1)
12 * - slot 2: ADB data ready (SR full)
13 * - slot 3: ADB data (CB2)
14 * - slot 4: ADB clock (CB1)
15 * - slot 5: timer 2
16 * - slot 6: timer 1
17 * - slot 7: status of IRQ; signals 'any enabled int.'
18 *
19 * 2 - VIA2 or RBV
20 * - slot 0: SCSI DRQ (CA2)
21 * - slot 1: NUBUS IRQ (CA1) need to read port A to find which
22 * - slot 2: /EXP IRQ (only on IIci)
23 * - slot 3: SCSI IRQ (CB2)
24 * - slot 4: ASC IRQ (CB1)
25 * - slot 5: timer 2 (not on IIci)
26 * - slot 6: timer 1 (not on IIci)
27 * - slot 7: status of IRQ; signals 'any enabled int.'
28 *
29 * 2 - OSS (IIfx only?)
30 * - slot 0: SCSI interrupt
31 * - slot 1: Sound interrupt
32 *
33 * Levels 3-6 vary by machine type. For VIA or RBV Macintoshes:
34 *
35 * 3 - unused (?)
36 *
37 * 4 - SCC
38 *
39 * 5 - unused (?)
40 * [serial errors or special conditions seem to raise level 6
41 * interrupts on some models (LC4xx?)]
42 *
43 * 6 - off switch (?)
44 *
45 * For OSS Macintoshes (IIfx only at this point):
46 *
47 * 3 - Nubus interrupt
48 * - slot 0: Slot $9
49 * - slot 1: Slot $A
50 * - slot 2: Slot $B
51 * - slot 3: Slot $C
52 * - slot 4: Slot $D
53 * - slot 5: Slot $E
54 *
55 * 4 - SCC IOP
56 *
57 * 5 - ISM IOP (ADB?)
58 *
59 * 6 - unused
60 *
61 * For PSC Macintoshes (660AV, 840AV):
62 *
63 * 3 - PSC level 3
64 * - slot 0: MACE
65 *
66 * 4 - PSC level 4
67 * - slot 1: SCC channel A interrupt
68 * - slot 2: SCC channel B interrupt
69 * - slot 3: MACE DMA
70 *
71 * 5 - PSC level 5
72 *
73 * 6 - PSC level 6
74 *
75 * Finally we have good 'ole level 7, the non-maskable interrupt:
76 *
77 * 7 - NMI (programmer's switch on the back of some Macs)
78 * Also RAM parity error on models which support it (IIc, IIfx?)
79 *
80 * The current interrupt logic looks something like this:
81 *
82 * - We install dispatchers for the autovector interrupts (1-7). These
83 * dispatchers are responsible for querying the hardware (the
84 * VIA/RBV/OSS/PSC chips) to determine the actual interrupt source. Using
85 * this information a machspec interrupt number is generated by placing the
86 * index of the interrupt hardware into the low three bits and the original
87 * autovector interrupt number in the upper 5 bits. The handlers for the
88 * resulting machspec interrupt are then called.
89 *
90 * - Nubus is a special case because its interrupts are hidden behind two
91 * layers of hardware. Nubus interrupts come in as index 1 on VIA #2,
92 * which translates to IRQ number 17. In this spot we install _another_
93 * dispatcher. This dispatcher finds the interrupting slot number (9-F) and
94 * then forms a new machspec interrupt number as above with the slot number
95 * minus 9 in the low three bits and the pseudo-level 7 in the upper five
96 * bits. The handlers for this new machspec interrupt number are then
97 * called. This puts Nubus interrupts into the range 56-62.
98 *
99 * - The Baboon interrupts (used on some PowerBooks) are an even more special
100 * case. They're hidden behind the Nubus slot $C interrupt thus adding a
101 * third layer of indirection. Why oh why did the Apple engineers do that?
102 *
103 * - We support "fast" and "slow" handlers, just like the Amiga port. The
104 * fast handlers are called first and with all interrupts disabled. They
105 * are expected to execute quickly (hence the name). The slow handlers are
106 * called last with interrupts enabled and the interrupt level restored.
107 * They must therefore be reentrant.
108 *
109 * TODO:
110 *
111 */
112
113#include <linux/module.h>
114#include <linux/types.h>
115#include <linux/kernel.h>
116#include <linux/sched.h>
117#include <linux/kernel_stat.h>
118#include <linux/interrupt.h> /* for intr_count */
119#include <linux/delay.h>
120#include <linux/seq_file.h>
121
122#include <asm/system.h>
123#include <asm/irq.h>
124#include <asm/traps.h>
125#include <asm/bootinfo.h>
126#include <asm/macintosh.h>
127#include <asm/mac_via.h>
128#include <asm/mac_psc.h>
129#include <asm/hwtest.h>
130#include <asm/errno.h>
131#include <asm/macints.h>
132#include <asm/irq_regs.h>
133#include <asm/mac_oss.h>
134
135#define SHUTUP_SONIC
136
137/*
138 * VIA/RBV hooks
139 */
140
141extern void via_register_interrupts(void);
142extern void via_irq_enable(int);
143extern void via_irq_disable(int);
144extern void via_irq_clear(int);
145extern int via_irq_pending(int);
146
147/*
148 * OSS hooks
149 */
150
151extern void oss_register_interrupts(void);
152extern void oss_irq_enable(int);
153extern void oss_irq_disable(int);
154extern void oss_irq_clear(int);
155extern int oss_irq_pending(int);
156
157/*
158 * PSC hooks
159 */
160
161extern void psc_register_interrupts(void);
162extern void psc_irq_enable(int);
163extern void psc_irq_disable(int);
164extern void psc_irq_clear(int);
165extern int psc_irq_pending(int);
166
167/*
168 * IOP hooks
169 */
170
171extern void iop_register_interrupts(void);
172
173/*
174 * Baboon hooks
175 */
176
177extern int baboon_present;
178
179extern void baboon_register_interrupts(void);
180extern void baboon_irq_enable(int);
181extern void baboon_irq_disable(int);
182extern void baboon_irq_clear(int);
183
184/*
185 * console_loglevel determines NMI handler function
186 */
187
188irqreturn_t mac_nmi_handler(int, void *);
189irqreturn_t mac_debug_handler(int, void *);
190
191/* #define DEBUG_MACINTS */
192
193void mac_enable_irq(unsigned int irq);
194void mac_disable_irq(unsigned int irq);
195
196static struct irq_controller mac_irq_controller = {
197 .name = "mac",
198 .lock = __SPIN_LOCK_UNLOCKED(mac_irq_controller.lock),
199 .enable = mac_enable_irq,
200 .disable = mac_disable_irq,
201};
202
203void __init mac_init_IRQ(void)
204{
205#ifdef DEBUG_MACINTS
206 printk("mac_init_IRQ(): Setting things up...\n");
207#endif
208 m68k_setup_irq_controller(&mac_irq_controller, IRQ_USER,
209 NUM_MAC_SOURCES - IRQ_USER);
210 /* Make sure the SONIC interrupt is cleared or things get ugly */
211#ifdef SHUTUP_SONIC
212 printk("Killing onboard sonic... ");
213 /* This address should hopefully be mapped already */
214 if (hwreg_present((void*)(0x50f0a000))) {
215 *(long *)(0x50f0a014) = 0x7fffL;
216 *(long *)(0x50f0a010) = 0L;
217 }
218 printk("Done.\n");
219#endif /* SHUTUP_SONIC */
220
221 /*
222 * Now register the handlers for the master IRQ handlers
223 * at levels 1-7. Most of the work is done elsewhere.
224 */
225
226 if (oss_present)
227 oss_register_interrupts();
228 else
229 via_register_interrupts();
230 if (psc_present)
231 psc_register_interrupts();
232 if (baboon_present)
233 baboon_register_interrupts();
234 iop_register_interrupts();
235 if (request_irq(IRQ_AUTO_7, mac_nmi_handler, 0, "NMI",
236 mac_nmi_handler))
237 pr_err("Couldn't register NMI\n");
238#ifdef DEBUG_MACINTS
239 printk("mac_init_IRQ(): Done!\n");
240#endif
241}
242
243/*
244 * mac_enable_irq - enable an interrupt source
245 * mac_disable_irq - disable an interrupt source
246 * mac_clear_irq - clears a pending interrupt
247 * mac_pending_irq - Returns the pending status of an IRQ (nonzero = pending)
248 *
249 * These routines are just dispatchers to the VIA/OSS/PSC routines.
250 */
251
252void mac_enable_irq(unsigned int irq)
253{
254 int irq_src = IRQ_SRC(irq);
255
256 switch(irq_src) {
257 case 1:
258 via_irq_enable(irq);
259 break;
260 case 2:
261 case 7:
262 if (oss_present)
263 oss_irq_enable(irq);
264 else
265 via_irq_enable(irq);
266 break;
267 case 3:
268 case 5:
269 case 6:
270 if (psc_present)
271 psc_irq_enable(irq);
272 else if (oss_present)
273 oss_irq_enable(irq);
274 break;
275 case 4:
276 if (psc_present)
277 psc_irq_enable(irq);
278 break;
279 case 8:
280 if (baboon_present)
281 baboon_irq_enable(irq);
282 break;
283 }
284}
285
286void mac_disable_irq(unsigned int irq)
287{
288 int irq_src = IRQ_SRC(irq);
289
290 switch(irq_src) {
291 case 1:
292 via_irq_disable(irq);
293 break;
294 case 2:
295 case 7:
296 if (oss_present)
297 oss_irq_disable(irq);
298 else
299 via_irq_disable(irq);
300 break;
301 case 3:
302 case 5:
303 case 6:
304 if (psc_present)
305 psc_irq_disable(irq);
306 else if (oss_present)
307 oss_irq_disable(irq);
308 break;
309 case 4:
310 if (psc_present)
311 psc_irq_disable(irq);
312 break;
313 case 8:
314 if (baboon_present)
315 baboon_irq_disable(irq);
316 break;
317 }
318}
319
320void mac_clear_irq(unsigned int irq)
321{
322 switch(IRQ_SRC(irq)) {
323 case 1:
324 via_irq_clear(irq);
325 break;
326 case 2:
327 case 7:
328 if (oss_present)
329 oss_irq_clear(irq);
330 else
331 via_irq_clear(irq);
332 break;
333 case 3:
334 case 5:
335 case 6:
336 if (psc_present)
337 psc_irq_clear(irq);
338 else if (oss_present)
339 oss_irq_clear(irq);
340 break;
341 case 4:
342 if (psc_present)
343 psc_irq_clear(irq);
344 break;
345 case 8:
346 if (baboon_present)
347 baboon_irq_clear(irq);
348 break;
349 }
350}
351
352int mac_irq_pending(unsigned int irq)
353{
354 switch(IRQ_SRC(irq)) {
355 case 1:
356 return via_irq_pending(irq);
357 case 2:
358 case 7:
359 if (oss_present)
360 return oss_irq_pending(irq);
361 else
362 return via_irq_pending(irq);
363 case 3:
364 case 5:
365 case 6:
366 if (psc_present)
367 return psc_irq_pending(irq);
368 else if (oss_present)
369 return oss_irq_pending(irq);
370 break;
371 case 4:
372 if (psc_present)
373 psc_irq_pending(irq);
374 break;
375 }
376 return 0;
377}
378EXPORT_SYMBOL(mac_irq_pending);
379
380static int num_debug[8];
381
382irqreturn_t mac_debug_handler(int irq, void *dev_id)
383{
384 if (num_debug[irq] < 10) {
385 printk("DEBUG: Unexpected IRQ %d\n", irq);
386 num_debug[irq]++;
387 }
388 return IRQ_HANDLED;
389}
390
391static int in_nmi;
392static volatile int nmi_hold;
393
394irqreturn_t mac_nmi_handler(int irq, void *dev_id)
395{
396 int i;
397 /*
398 * generate debug output on NMI switch if 'debug' kernel option given
399 * (only works with Penguin!)
400 */
401
402 in_nmi++;
403 for (i=0; i<100; i++)
404 udelay(1000);
405
406 if (in_nmi == 1) {
407 nmi_hold = 1;
408 printk("... pausing, press NMI to resume ...");
409 } else {
410 printk(" ok!\n");
411 nmi_hold = 0;
412 }
413
414 barrier();
415
416 while (nmi_hold == 1)
417 udelay(1000);
418
419 if (console_loglevel >= 8) {
420#if 0
421 struct pt_regs *fp = get_irq_regs();
422 show_state();
423 printk("PC: %08lx\nSR: %04x SP: %p\n", fp->pc, fp->sr, fp);
424 printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
425 fp->d0, fp->d1, fp->d2, fp->d3);
426 printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
427 fp->d4, fp->d5, fp->a0, fp->a1);
428
429 if (STACK_MAGIC != *(unsigned long *)current->kernel_stack_page)
430 printk("Corrupted stack page\n");
431 printk("Process %s (pid: %d, stackpage=%08lx)\n",
432 current->comm, current->pid, current->kernel_stack_page);
433 if (intr_count == 1)
434 dump_stack((struct frame *)fp);
435#else
436 /* printk("NMI "); */
437#endif
438 }
439 in_nmi--;
440 return IRQ_HANDLED;
441}
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Macintosh interrupts
4 *
5 * General design:
6 * In contrary to the Amiga and Atari platforms, the Mac hardware seems to
7 * exclusively use the autovector interrupts (the 'generic level0-level7'
8 * interrupts with exception vectors 0x19-0x1f). The following interrupt levels
9 * are used:
10 * 1 - VIA1
11 * - slot 0: one second interrupt (CA2)
12 * - slot 1: VBlank (CA1)
13 * - slot 2: ADB data ready (SR full)
14 * - slot 3: ADB data (CB2)
15 * - slot 4: ADB clock (CB1)
16 * - slot 5: timer 2
17 * - slot 6: timer 1
18 * - slot 7: status of IRQ; signals 'any enabled int.'
19 *
20 * 2 - VIA2 or RBV
21 * - slot 0: SCSI DRQ (CA2)
22 * - slot 1: NUBUS IRQ (CA1) need to read port A to find which
23 * - slot 2: /EXP IRQ (only on IIci)
24 * - slot 3: SCSI IRQ (CB2)
25 * - slot 4: ASC IRQ (CB1)
26 * - slot 5: timer 2 (not on IIci)
27 * - slot 6: timer 1 (not on IIci)
28 * - slot 7: status of IRQ; signals 'any enabled int.'
29 *
30 * Levels 3-6 vary by machine type. For VIA or RBV Macintoshes:
31 *
32 * 3 - unused (?)
33 *
34 * 4 - SCC
35 *
36 * 5 - unused (?)
37 * [serial errors or special conditions seem to raise level 6
38 * interrupts on some models (LC4xx?)]
39 *
40 * 6 - off switch (?)
41 *
42 * Machines with Quadra-like VIA hardware, except PSC and PMU machines, support
43 * an alternate interrupt mapping, as used by A/UX. It spreads ethernet and
44 * sound out to their own autovector IRQs and gives VIA1 a higher priority:
45 *
46 * 1 - unused (?)
47 *
48 * 3 - on-board SONIC
49 *
50 * 5 - Apple Sound Chip (ASC)
51 *
52 * 6 - VIA1
53 *
54 * For OSS Macintoshes (IIfx only), we apply an interrupt mapping similar to
55 * the Quadra (A/UX) mapping:
56 *
57 * 1 - ISM IOP (ADB)
58 *
59 * 2 - SCSI
60 *
61 * 3 - NuBus
62 *
63 * 4 - SCC IOP
64 *
65 * 6 - VIA1
66 *
67 * For PSC Macintoshes (660AV, 840AV):
68 *
69 * 3 - PSC level 3
70 * - slot 0: MACE
71 *
72 * 4 - PSC level 4
73 * - slot 1: SCC channel A interrupt
74 * - slot 2: SCC channel B interrupt
75 * - slot 3: MACE DMA
76 *
77 * 5 - PSC level 5
78 *
79 * 6 - PSC level 6
80 *
81 * Finally we have good 'ole level 7, the non-maskable interrupt:
82 *
83 * 7 - NMI (programmer's switch on the back of some Macs)
84 * Also RAM parity error on models which support it (IIc, IIfx?)
85 *
86 * The current interrupt logic looks something like this:
87 *
88 * - We install dispatchers for the autovector interrupts (1-7). These
89 * dispatchers are responsible for querying the hardware (the
90 * VIA/RBV/OSS/PSC chips) to determine the actual interrupt source. Using
91 * this information a machspec interrupt number is generated by placing the
92 * index of the interrupt hardware into the low three bits and the original
93 * autovector interrupt number in the upper 5 bits. The handlers for the
94 * resulting machspec interrupt are then called.
95 *
96 * - Nubus is a special case because its interrupts are hidden behind two
97 * layers of hardware. Nubus interrupts come in as index 1 on VIA #2,
98 * which translates to IRQ number 17. In this spot we install _another_
99 * dispatcher. This dispatcher finds the interrupting slot number (9-F) and
100 * then forms a new machspec interrupt number as above with the slot number
101 * minus 9 in the low three bits and the pseudo-level 7 in the upper five
102 * bits. The handlers for this new machspec interrupt number are then
103 * called. This puts Nubus interrupts into the range 56-62.
104 *
105 * - The Baboon interrupts (used on some PowerBooks) are an even more special
106 * case. They're hidden behind the Nubus slot $C interrupt thus adding a
107 * third layer of indirection. Why oh why did the Apple engineers do that?
108 *
109 */
110
111#include <linux/types.h>
112#include <linux/kernel.h>
113#include <linux/sched.h>
114#include <linux/sched/debug.h>
115#include <linux/interrupt.h>
116#include <linux/irq.h>
117#include <linux/delay.h>
118
119#include <asm/irq.h>
120#include <asm/macintosh.h>
121#include <asm/macints.h>
122#include <asm/mac_via.h>
123#include <asm/mac_psc.h>
124#include <asm/mac_oss.h>
125#include <asm/mac_iop.h>
126#include <asm/mac_baboon.h>
127#include <asm/hwtest.h>
128#include <asm/irq_regs.h>
129#include <asm/processor.h>
130
131static unsigned int mac_irq_startup(struct irq_data *);
132static void mac_irq_shutdown(struct irq_data *);
133
134static struct irq_chip mac_irq_chip = {
135 .name = "mac",
136 .irq_enable = mac_irq_enable,
137 .irq_disable = mac_irq_disable,
138 .irq_startup = mac_irq_startup,
139 .irq_shutdown = mac_irq_shutdown,
140};
141
142static irqreturn_t mac_nmi_handler(int irq, void *dev_id)
143{
144 static volatile int in_nmi;
145
146 if (in_nmi)
147 return IRQ_HANDLED;
148 in_nmi = 1;
149
150 pr_info("Non-Maskable Interrupt\n");
151 show_registers(get_irq_regs());
152
153 in_nmi = 0;
154 return IRQ_HANDLED;
155}
156
157void __init mac_init_IRQ(void)
158{
159 m68k_setup_irq_controller(&mac_irq_chip, handle_simple_irq, IRQ_USER,
160 NUM_MAC_SOURCES - IRQ_USER);
161
162 /*
163 * Now register the handlers for the master IRQ handlers
164 * at levels 1-7. Most of the work is done elsewhere.
165 */
166
167 if (oss_present)
168 oss_register_interrupts();
169 else
170 via_register_interrupts();
171 if (psc)
172 psc_register_interrupts();
173 if (baboon_present)
174 baboon_register_interrupts();
175 iop_register_interrupts();
176 if (request_irq(IRQ_AUTO_7, mac_nmi_handler, 0, "NMI",
177 mac_nmi_handler))
178 pr_err("Couldn't register NMI\n");
179}
180
181/*
182 * mac_irq_enable - enable an interrupt source
183 * mac_irq_disable - disable an interrupt source
184 *
185 * These routines are just dispatchers to the VIA/OSS/PSC routines.
186 */
187
188void mac_irq_enable(struct irq_data *data)
189{
190 int irq = data->irq;
191 int irq_src = IRQ_SRC(irq);
192
193 switch(irq_src) {
194 case 1:
195 case 2:
196 case 7:
197 if (oss_present)
198 oss_irq_enable(irq);
199 else
200 via_irq_enable(irq);
201 break;
202 case 3:
203 case 4:
204 case 5:
205 case 6:
206 if (psc)
207 psc_irq_enable(irq);
208 else if (oss_present)
209 oss_irq_enable(irq);
210 break;
211 case 8:
212 if (baboon_present)
213 baboon_irq_enable(irq);
214 break;
215 }
216}
217
218void mac_irq_disable(struct irq_data *data)
219{
220 int irq = data->irq;
221 int irq_src = IRQ_SRC(irq);
222
223 switch(irq_src) {
224 case 1:
225 case 2:
226 case 7:
227 if (oss_present)
228 oss_irq_disable(irq);
229 else
230 via_irq_disable(irq);
231 break;
232 case 3:
233 case 4:
234 case 5:
235 case 6:
236 if (psc)
237 psc_irq_disable(irq);
238 else if (oss_present)
239 oss_irq_disable(irq);
240 break;
241 case 8:
242 if (baboon_present)
243 baboon_irq_disable(irq);
244 break;
245 }
246}
247
248static unsigned int mac_irq_startup(struct irq_data *data)
249{
250 int irq = data->irq;
251
252 if (IRQ_SRC(irq) == 7 && !oss_present)
253 via_nubus_irq_startup(irq);
254 else
255 mac_irq_enable(data);
256
257 return 0;
258}
259
260static void mac_irq_shutdown(struct irq_data *data)
261{
262 int irq = data->irq;
263
264 if (IRQ_SRC(irq) == 7 && !oss_present)
265 via_nubus_irq_shutdown(irq);
266 else
267 mac_irq_disable(data);
268}