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1/*
2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
3 * I/O routines for GF1/InterWave synthesizer chips
4 *
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#include <linux/delay.h>
23#include <linux/time.h>
24#include <sound/core.h>
25#include <sound/gus.h>
26
27void snd_gf1_delay(struct snd_gus_card * gus)
28{
29 int i;
30
31 for (i = 0; i < 6; i++) {
32 mb();
33 inb(GUSP(gus, DRAM));
34 }
35}
36
37/*
38 * =======================================================================
39 */
40
41/*
42 * ok.. stop of control registers (wave & ramp) need some special things..
43 * big UltraClick (tm) elimination...
44 */
45
46static inline void __snd_gf1_ctrl_stop(struct snd_gus_card * gus, unsigned char reg)
47{
48 unsigned char value;
49
50 outb(reg | 0x80, gus->gf1.reg_regsel);
51 mb();
52 value = inb(gus->gf1.reg_data8);
53 mb();
54 outb(reg, gus->gf1.reg_regsel);
55 mb();
56 outb((value | 0x03) & ~(0x80 | 0x20), gus->gf1.reg_data8);
57 mb();
58}
59
60static inline void __snd_gf1_write8(struct snd_gus_card * gus,
61 unsigned char reg,
62 unsigned char data)
63{
64 outb(reg, gus->gf1.reg_regsel);
65 mb();
66 outb(data, gus->gf1.reg_data8);
67 mb();
68}
69
70static inline unsigned char __snd_gf1_look8(struct snd_gus_card * gus,
71 unsigned char reg)
72{
73 outb(reg, gus->gf1.reg_regsel);
74 mb();
75 return inb(gus->gf1.reg_data8);
76}
77
78static inline void __snd_gf1_write16(struct snd_gus_card * gus,
79 unsigned char reg, unsigned int data)
80{
81 outb(reg, gus->gf1.reg_regsel);
82 mb();
83 outw((unsigned short) data, gus->gf1.reg_data16);
84 mb();
85}
86
87static inline unsigned short __snd_gf1_look16(struct snd_gus_card * gus,
88 unsigned char reg)
89{
90 outb(reg, gus->gf1.reg_regsel);
91 mb();
92 return inw(gus->gf1.reg_data16);
93}
94
95static inline void __snd_gf1_adlib_write(struct snd_gus_card * gus,
96 unsigned char reg, unsigned char data)
97{
98 outb(reg, gus->gf1.reg_timerctrl);
99 inb(gus->gf1.reg_timerctrl);
100 inb(gus->gf1.reg_timerctrl);
101 outb(data, gus->gf1.reg_timerdata);
102 inb(gus->gf1.reg_timerctrl);
103 inb(gus->gf1.reg_timerctrl);
104}
105
106static inline void __snd_gf1_write_addr(struct snd_gus_card * gus, unsigned char reg,
107 unsigned int addr, int w_16bit)
108{
109 if (gus->gf1.enh_mode) {
110 if (w_16bit)
111 addr = ((addr >> 1) & ~0x0000000f) | (addr & 0x0000000f);
112 __snd_gf1_write8(gus, SNDRV_GF1_VB_UPPER_ADDRESS, (unsigned char) ((addr >> 26) & 0x03));
113 } else if (w_16bit)
114 addr = (addr & 0x00c0000f) | ((addr & 0x003ffff0) >> 1);
115 __snd_gf1_write16(gus, reg, (unsigned short) (addr >> 11));
116 __snd_gf1_write16(gus, reg + 1, (unsigned short) (addr << 5));
117}
118
119static inline unsigned int __snd_gf1_read_addr(struct snd_gus_card * gus,
120 unsigned char reg, short w_16bit)
121{
122 unsigned int res;
123
124 res = ((unsigned int) __snd_gf1_look16(gus, reg | 0x80) << 11) & 0xfff800;
125 res |= ((unsigned int) __snd_gf1_look16(gus, (reg + 1) | 0x80) >> 5) & 0x0007ff;
126 if (gus->gf1.enh_mode) {
127 res |= (unsigned int) __snd_gf1_look8(gus, SNDRV_GF1_VB_UPPER_ADDRESS | 0x80) << 26;
128 if (w_16bit)
129 res = ((res << 1) & 0xffffffe0) | (res & 0x0000000f);
130 } else if (w_16bit)
131 res = ((res & 0x001ffff0) << 1) | (res & 0x00c0000f);
132 return res;
133}
134
135
136/*
137 * =======================================================================
138 */
139
140void snd_gf1_ctrl_stop(struct snd_gus_card * gus, unsigned char reg)
141{
142 __snd_gf1_ctrl_stop(gus, reg);
143}
144
145void snd_gf1_write8(struct snd_gus_card * gus,
146 unsigned char reg,
147 unsigned char data)
148{
149 __snd_gf1_write8(gus, reg, data);
150}
151
152unsigned char snd_gf1_look8(struct snd_gus_card * gus, unsigned char reg)
153{
154 return __snd_gf1_look8(gus, reg);
155}
156
157void snd_gf1_write16(struct snd_gus_card * gus,
158 unsigned char reg,
159 unsigned int data)
160{
161 __snd_gf1_write16(gus, reg, data);
162}
163
164unsigned short snd_gf1_look16(struct snd_gus_card * gus, unsigned char reg)
165{
166 return __snd_gf1_look16(gus, reg);
167}
168
169void snd_gf1_adlib_write(struct snd_gus_card * gus,
170 unsigned char reg,
171 unsigned char data)
172{
173 __snd_gf1_adlib_write(gus, reg, data);
174}
175
176void snd_gf1_write_addr(struct snd_gus_card * gus, unsigned char reg,
177 unsigned int addr, short w_16bit)
178{
179 __snd_gf1_write_addr(gus, reg, addr, w_16bit);
180}
181
182unsigned int snd_gf1_read_addr(struct snd_gus_card * gus,
183 unsigned char reg,
184 short w_16bit)
185{
186 return __snd_gf1_read_addr(gus, reg, w_16bit);
187}
188
189/*
190
191 */
192
193void snd_gf1_i_ctrl_stop(struct snd_gus_card * gus, unsigned char reg)
194{
195 unsigned long flags;
196
197 spin_lock_irqsave(&gus->reg_lock, flags);
198 __snd_gf1_ctrl_stop(gus, reg);
199 spin_unlock_irqrestore(&gus->reg_lock, flags);
200}
201
202void snd_gf1_i_write8(struct snd_gus_card * gus,
203 unsigned char reg,
204 unsigned char data)
205{
206 unsigned long flags;
207
208 spin_lock_irqsave(&gus->reg_lock, flags);
209 __snd_gf1_write8(gus, reg, data);
210 spin_unlock_irqrestore(&gus->reg_lock, flags);
211}
212
213unsigned char snd_gf1_i_look8(struct snd_gus_card * gus, unsigned char reg)
214{
215 unsigned long flags;
216 unsigned char res;
217
218 spin_lock_irqsave(&gus->reg_lock, flags);
219 res = __snd_gf1_look8(gus, reg);
220 spin_unlock_irqrestore(&gus->reg_lock, flags);
221 return res;
222}
223
224void snd_gf1_i_write16(struct snd_gus_card * gus,
225 unsigned char reg,
226 unsigned int data)
227{
228 unsigned long flags;
229
230 spin_lock_irqsave(&gus->reg_lock, flags);
231 __snd_gf1_write16(gus, reg, data);
232 spin_unlock_irqrestore(&gus->reg_lock, flags);
233}
234
235unsigned short snd_gf1_i_look16(struct snd_gus_card * gus, unsigned char reg)
236{
237 unsigned long flags;
238 unsigned short res;
239
240 spin_lock_irqsave(&gus->reg_lock, flags);
241 res = __snd_gf1_look16(gus, reg);
242 spin_unlock_irqrestore(&gus->reg_lock, flags);
243 return res;
244}
245
246#if 0
247
248void snd_gf1_i_adlib_write(struct snd_gus_card * gus,
249 unsigned char reg,
250 unsigned char data)
251{
252 unsigned long flags;
253
254 spin_lock_irqsave(&gus->reg_lock, flags);
255 __snd_gf1_adlib_write(gus, reg, data);
256 spin_unlock_irqrestore(&gus->reg_lock, flags);
257}
258
259void snd_gf1_i_write_addr(struct snd_gus_card * gus, unsigned char reg,
260 unsigned int addr, short w_16bit)
261{
262 unsigned long flags;
263
264 spin_lock_irqsave(&gus->reg_lock, flags);
265 __snd_gf1_write_addr(gus, reg, addr, w_16bit);
266 spin_unlock_irqrestore(&gus->reg_lock, flags);
267}
268
269#endif /* 0 */
270
271#ifdef CONFIG_SND_DEBUG
272static unsigned int snd_gf1_i_read_addr(struct snd_gus_card * gus,
273 unsigned char reg, short w_16bit)
274{
275 unsigned int res;
276 unsigned long flags;
277
278 spin_lock_irqsave(&gus->reg_lock, flags);
279 res = __snd_gf1_read_addr(gus, reg, w_16bit);
280 spin_unlock_irqrestore(&gus->reg_lock, flags);
281 return res;
282}
283#endif
284
285/*
286
287 */
288
289void snd_gf1_dram_addr(struct snd_gus_card * gus, unsigned int addr)
290{
291 outb(0x43, gus->gf1.reg_regsel);
292 mb();
293 outw((unsigned short) addr, gus->gf1.reg_data16);
294 mb();
295 outb(0x44, gus->gf1.reg_regsel);
296 mb();
297 outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
298 mb();
299}
300
301void snd_gf1_poke(struct snd_gus_card * gus, unsigned int addr, unsigned char data)
302{
303 unsigned long flags;
304
305 spin_lock_irqsave(&gus->reg_lock, flags);
306 outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
307 mb();
308 outw((unsigned short) addr, gus->gf1.reg_data16);
309 mb();
310 outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
311 mb();
312 outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
313 mb();
314 outb(data, gus->gf1.reg_dram);
315 spin_unlock_irqrestore(&gus->reg_lock, flags);
316}
317
318unsigned char snd_gf1_peek(struct snd_gus_card * gus, unsigned int addr)
319{
320 unsigned long flags;
321 unsigned char res;
322
323 spin_lock_irqsave(&gus->reg_lock, flags);
324 outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
325 mb();
326 outw((unsigned short) addr, gus->gf1.reg_data16);
327 mb();
328 outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
329 mb();
330 outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
331 mb();
332 res = inb(gus->gf1.reg_dram);
333 spin_unlock_irqrestore(&gus->reg_lock, flags);
334 return res;
335}
336
337#if 0
338
339void snd_gf1_pokew(struct snd_gus_card * gus, unsigned int addr, unsigned short data)
340{
341 unsigned long flags;
342
343#ifdef CONFIG_SND_DEBUG
344 if (!gus->interwave)
345 snd_printk(KERN_DEBUG "snd_gf1_pokew - GF1!!!\n");
346#endif
347 spin_lock_irqsave(&gus->reg_lock, flags);
348 outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
349 mb();
350 outw((unsigned short) addr, gus->gf1.reg_data16);
351 mb();
352 outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
353 mb();
354 outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
355 mb();
356 outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel);
357 mb();
358 outw(data, gus->gf1.reg_data16);
359 spin_unlock_irqrestore(&gus->reg_lock, flags);
360}
361
362unsigned short snd_gf1_peekw(struct snd_gus_card * gus, unsigned int addr)
363{
364 unsigned long flags;
365 unsigned short res;
366
367#ifdef CONFIG_SND_DEBUG
368 if (!gus->interwave)
369 snd_printk(KERN_DEBUG "snd_gf1_peekw - GF1!!!\n");
370#endif
371 spin_lock_irqsave(&gus->reg_lock, flags);
372 outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
373 mb();
374 outw((unsigned short) addr, gus->gf1.reg_data16);
375 mb();
376 outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
377 mb();
378 outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
379 mb();
380 outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel);
381 mb();
382 res = inw(gus->gf1.reg_data16);
383 spin_unlock_irqrestore(&gus->reg_lock, flags);
384 return res;
385}
386
387void snd_gf1_dram_setmem(struct snd_gus_card * gus, unsigned int addr,
388 unsigned short value, unsigned int count)
389{
390 unsigned long port;
391 unsigned long flags;
392
393#ifdef CONFIG_SND_DEBUG
394 if (!gus->interwave)
395 snd_printk(KERN_DEBUG "snd_gf1_dram_setmem - GF1!!!\n");
396#endif
397 addr &= ~1;
398 count >>= 1;
399 port = GUSP(gus, GF1DATALOW);
400 spin_lock_irqsave(&gus->reg_lock, flags);
401 outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
402 mb();
403 outw((unsigned short) addr, gus->gf1.reg_data16);
404 mb();
405 outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
406 mb();
407 outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
408 mb();
409 outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel);
410 while (count--)
411 outw(value, port);
412 spin_unlock_irqrestore(&gus->reg_lock, flags);
413}
414
415#endif /* 0 */
416
417void snd_gf1_select_active_voices(struct snd_gus_card * gus)
418{
419 unsigned short voices;
420
421 static unsigned short voices_tbl[32 - 14 + 1] =
422 {
423 44100, 41160, 38587, 36317, 34300, 32494, 30870, 29400, 28063, 26843,
424 25725, 24696, 23746, 22866, 22050, 21289, 20580, 19916, 19293
425 };
426
427 voices = gus->gf1.active_voices;
428 if (voices > 32)
429 voices = 32;
430 if (voices < 14)
431 voices = 14;
432 if (gus->gf1.enh_mode)
433 voices = 32;
434 gus->gf1.active_voices = voices;
435 gus->gf1.playback_freq =
436 gus->gf1.enh_mode ? 44100 : voices_tbl[voices - 14];
437 if (!gus->gf1.enh_mode) {
438 snd_gf1_i_write8(gus, SNDRV_GF1_GB_ACTIVE_VOICES, 0xc0 | (voices - 1));
439 udelay(100);
440 }
441}
442
443#ifdef CONFIG_SND_DEBUG
444
445void snd_gf1_print_voice_registers(struct snd_gus_card * gus)
446{
447 unsigned char mode;
448 int voice, ctrl;
449
450 voice = gus->gf1.active_voice;
451 printk(KERN_INFO " -%i- GF1 voice ctrl, ramp ctrl = 0x%x, 0x%x\n", voice, ctrl = snd_gf1_i_read8(gus, 0), snd_gf1_i_read8(gus, 0x0d));
452 printk(KERN_INFO " -%i- GF1 frequency = 0x%x\n", voice, snd_gf1_i_read16(gus, 1));
453 printk(KERN_INFO " -%i- GF1 loop start, end = 0x%x (0x%x), 0x%x (0x%x)\n", voice, snd_gf1_i_read_addr(gus, 2, ctrl & 4), snd_gf1_i_read_addr(gus, 2, (ctrl & 4) ^ 4), snd_gf1_i_read_addr(gus, 4, ctrl & 4), snd_gf1_i_read_addr(gus, 4, (ctrl & 4) ^ 4));
454 printk(KERN_INFO " -%i- GF1 ramp start, end, rate = 0x%x, 0x%x, 0x%x\n", voice, snd_gf1_i_read8(gus, 7), snd_gf1_i_read8(gus, 8), snd_gf1_i_read8(gus, 6));
455 printk(KERN_INFO" -%i- GF1 volume = 0x%x\n", voice, snd_gf1_i_read16(gus, 9));
456 printk(KERN_INFO " -%i- GF1 position = 0x%x (0x%x)\n", voice, snd_gf1_i_read_addr(gus, 0x0a, ctrl & 4), snd_gf1_i_read_addr(gus, 0x0a, (ctrl & 4) ^ 4));
457 if (gus->interwave && snd_gf1_i_read8(gus, 0x19) & 0x01) { /* enhanced mode */
458 mode = snd_gf1_i_read8(gus, 0x15);
459 printk(KERN_INFO " -%i- GFA1 mode = 0x%x\n", voice, mode);
460 if (mode & 0x01) { /* Effect processor */
461 printk(KERN_INFO " -%i- GFA1 effect address = 0x%x\n", voice, snd_gf1_i_read_addr(gus, 0x11, ctrl & 4));
462 printk(KERN_INFO " -%i- GFA1 effect volume = 0x%x\n", voice, snd_gf1_i_read16(gus, 0x16));
463 printk(KERN_INFO " -%i- GFA1 effect volume final = 0x%x\n", voice, snd_gf1_i_read16(gus, 0x1d));
464 printk(KERN_INFO " -%i- GFA1 effect acumulator = 0x%x\n", voice, snd_gf1_i_read8(gus, 0x14));
465 }
466 if (mode & 0x20) {
467 printk(KERN_INFO " -%i- GFA1 left offset = 0x%x (%i)\n", voice, snd_gf1_i_read16(gus, 0x13), snd_gf1_i_read16(gus, 0x13) >> 4);
468 printk(KERN_INFO " -%i- GFA1 left offset final = 0x%x (%i)\n", voice, snd_gf1_i_read16(gus, 0x1c), snd_gf1_i_read16(gus, 0x1c) >> 4);
469 printk(KERN_INFO " -%i- GFA1 right offset = 0x%x (%i)\n", voice, snd_gf1_i_read16(gus, 0x0c), snd_gf1_i_read16(gus, 0x0c) >> 4);
470 printk(KERN_INFO " -%i- GFA1 right offset final = 0x%x (%i)\n", voice, snd_gf1_i_read16(gus, 0x1b), snd_gf1_i_read16(gus, 0x1b) >> 4);
471 } else
472 printk(KERN_INFO " -%i- GF1 pan = 0x%x\n", voice, snd_gf1_i_read8(gus, 0x0c));
473 } else
474 printk(KERN_INFO " -%i- GF1 pan = 0x%x\n", voice, snd_gf1_i_read8(gus, 0x0c));
475}
476
477#if 0
478
479void snd_gf1_print_global_registers(struct snd_gus_card * gus)
480{
481 unsigned char global_mode = 0x00;
482
483 printk(KERN_INFO " -G- GF1 active voices = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_ACTIVE_VOICES));
484 if (gus->interwave) {
485 global_mode = snd_gf1_i_read8(gus, SNDRV_GF1_GB_GLOBAL_MODE);
486 printk(KERN_INFO " -G- GF1 global mode = 0x%x\n", global_mode);
487 }
488 if (global_mode & 0x02) /* LFO enabled? */
489 printk(KERN_INFO " -G- GF1 LFO base = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_LFO_BASE));
490 printk(KERN_INFO " -G- GF1 voices IRQ read = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_VOICES_IRQ_READ));
491 printk(KERN_INFO " -G- GF1 DRAM DMA control = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL));
492 printk(KERN_INFO " -G- GF1 DRAM DMA high/low = 0x%x/0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_DMA_HIGH), snd_gf1_i_read16(gus, SNDRV_GF1_GW_DRAM_DMA_LOW));
493 printk(KERN_INFO " -G- GF1 DRAM IO high/low = 0x%x/0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_IO_HIGH), snd_gf1_i_read16(gus, SNDRV_GF1_GW_DRAM_IO_LOW));
494 if (!gus->interwave)
495 printk(KERN_INFO " -G- GF1 record DMA control = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_REC_DMA_CONTROL));
496 printk(KERN_INFO " -G- GF1 DRAM IO 16 = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_DRAM_IO16));
497 if (gus->gf1.enh_mode) {
498 printk(KERN_INFO " -G- GFA1 memory config = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_MEMORY_CONFIG));
499 printk(KERN_INFO " -G- GFA1 memory control = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_MEMORY_CONTROL));
500 printk(KERN_INFO " -G- GFA1 FIFO record base = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_FIFO_RECORD_BASE_ADDR));
501 printk(KERN_INFO " -G- GFA1 FIFO playback base = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_FIFO_PLAY_BASE_ADDR));
502 printk(KERN_INFO " -G- GFA1 interleave control = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_INTERLEAVE));
503 }
504}
505
506void snd_gf1_print_setup_registers(struct snd_gus_card * gus)
507{
508 printk(KERN_INFO " -S- mix control = 0x%x\n", inb(GUSP(gus, MIXCNTRLREG)));
509 printk(KERN_INFO " -S- IRQ status = 0x%x\n", inb(GUSP(gus, IRQSTAT)));
510 printk(KERN_INFO " -S- timer control = 0x%x\n", inb(GUSP(gus, TIMERCNTRL)));
511 printk(KERN_INFO " -S- timer data = 0x%x\n", inb(GUSP(gus, TIMERDATA)));
512 printk(KERN_INFO " -S- status read = 0x%x\n", inb(GUSP(gus, REGCNTRLS)));
513 printk(KERN_INFO " -S- Sound Blaster control = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL));
514 printk(KERN_INFO " -S- AdLib timer 1/2 = 0x%x/0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_ADLIB_TIMER_1), snd_gf1_i_look8(gus, SNDRV_GF1_GB_ADLIB_TIMER_2));
515 printk(KERN_INFO " -S- reset = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_RESET));
516 if (gus->interwave) {
517 printk(KERN_INFO " -S- compatibility = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_COMPATIBILITY));
518 printk(KERN_INFO " -S- decode control = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_DECODE_CONTROL));
519 printk(KERN_INFO " -S- version number = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_VERSION_NUMBER));
520 printk(KERN_INFO " -S- MPU-401 emul. control A/B = 0x%x/0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_MPU401_CONTROL_A), snd_gf1_i_look8(gus, SNDRV_GF1_GB_MPU401_CONTROL_B));
521 printk(KERN_INFO " -S- emulation IRQ = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_EMULATION_IRQ));
522 }
523}
524
525void snd_gf1_peek_print_block(struct snd_gus_card * gus, unsigned int addr, int count, int w_16bit)
526{
527 if (!w_16bit) {
528 while (count-- > 0)
529 printk(count > 0 ? "%02x:" : "%02x", snd_gf1_peek(gus, addr++));
530 } else {
531 while (count-- > 0) {
532 printk(count > 0 ? "%04x:" : "%04x", snd_gf1_peek(gus, addr) | (snd_gf1_peek(gus, addr + 1) << 8));
533 addr += 2;
534 }
535 }
536}
537
538#endif /* 0 */
539
540#endif
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4 * I/O routines for GF1/InterWave synthesizer chips
5 */
6
7#include <linux/delay.h>
8#include <linux/time.h>
9#include <sound/core.h>
10#include <sound/gus.h>
11
12void snd_gf1_delay(struct snd_gus_card * gus)
13{
14 int i;
15
16 for (i = 0; i < 6; i++) {
17 mb();
18 inb(GUSP(gus, DRAM));
19 }
20}
21
22/*
23 * =======================================================================
24 */
25
26/*
27 * ok.. stop of control registers (wave & ramp) need some special things..
28 * big UltraClick (tm) elimination...
29 */
30
31static inline void __snd_gf1_ctrl_stop(struct snd_gus_card * gus, unsigned char reg)
32{
33 unsigned char value;
34
35 outb(reg | 0x80, gus->gf1.reg_regsel);
36 mb();
37 value = inb(gus->gf1.reg_data8);
38 mb();
39 outb(reg, gus->gf1.reg_regsel);
40 mb();
41 outb((value | 0x03) & ~(0x80 | 0x20), gus->gf1.reg_data8);
42 mb();
43}
44
45static inline void __snd_gf1_write8(struct snd_gus_card * gus,
46 unsigned char reg,
47 unsigned char data)
48{
49 outb(reg, gus->gf1.reg_regsel);
50 mb();
51 outb(data, gus->gf1.reg_data8);
52 mb();
53}
54
55static inline unsigned char __snd_gf1_look8(struct snd_gus_card * gus,
56 unsigned char reg)
57{
58 outb(reg, gus->gf1.reg_regsel);
59 mb();
60 return inb(gus->gf1.reg_data8);
61}
62
63static inline void __snd_gf1_write16(struct snd_gus_card * gus,
64 unsigned char reg, unsigned int data)
65{
66 outb(reg, gus->gf1.reg_regsel);
67 mb();
68 outw((unsigned short) data, gus->gf1.reg_data16);
69 mb();
70}
71
72static inline unsigned short __snd_gf1_look16(struct snd_gus_card * gus,
73 unsigned char reg)
74{
75 outb(reg, gus->gf1.reg_regsel);
76 mb();
77 return inw(gus->gf1.reg_data16);
78}
79
80static inline void __snd_gf1_adlib_write(struct snd_gus_card * gus,
81 unsigned char reg, unsigned char data)
82{
83 outb(reg, gus->gf1.reg_timerctrl);
84 inb(gus->gf1.reg_timerctrl);
85 inb(gus->gf1.reg_timerctrl);
86 outb(data, gus->gf1.reg_timerdata);
87 inb(gus->gf1.reg_timerctrl);
88 inb(gus->gf1.reg_timerctrl);
89}
90
91static inline void __snd_gf1_write_addr(struct snd_gus_card * gus, unsigned char reg,
92 unsigned int addr, int w_16bit)
93{
94 if (gus->gf1.enh_mode) {
95 if (w_16bit)
96 addr = ((addr >> 1) & ~0x0000000f) | (addr & 0x0000000f);
97 __snd_gf1_write8(gus, SNDRV_GF1_VB_UPPER_ADDRESS, (unsigned char) ((addr >> 26) & 0x03));
98 } else if (w_16bit)
99 addr = (addr & 0x00c0000f) | ((addr & 0x003ffff0) >> 1);
100 __snd_gf1_write16(gus, reg, (unsigned short) (addr >> 11));
101 __snd_gf1_write16(gus, reg + 1, (unsigned short) (addr << 5));
102}
103
104static inline unsigned int __snd_gf1_read_addr(struct snd_gus_card * gus,
105 unsigned char reg, short w_16bit)
106{
107 unsigned int res;
108
109 res = ((unsigned int) __snd_gf1_look16(gus, reg | 0x80) << 11) & 0xfff800;
110 res |= ((unsigned int) __snd_gf1_look16(gus, (reg + 1) | 0x80) >> 5) & 0x0007ff;
111 if (gus->gf1.enh_mode) {
112 res |= (unsigned int) __snd_gf1_look8(gus, SNDRV_GF1_VB_UPPER_ADDRESS | 0x80) << 26;
113 if (w_16bit)
114 res = ((res << 1) & 0xffffffe0) | (res & 0x0000000f);
115 } else if (w_16bit)
116 res = ((res & 0x001ffff0) << 1) | (res & 0x00c0000f);
117 return res;
118}
119
120
121/*
122 * =======================================================================
123 */
124
125void snd_gf1_ctrl_stop(struct snd_gus_card * gus, unsigned char reg)
126{
127 __snd_gf1_ctrl_stop(gus, reg);
128}
129
130void snd_gf1_write8(struct snd_gus_card * gus,
131 unsigned char reg,
132 unsigned char data)
133{
134 __snd_gf1_write8(gus, reg, data);
135}
136
137unsigned char snd_gf1_look8(struct snd_gus_card * gus, unsigned char reg)
138{
139 return __snd_gf1_look8(gus, reg);
140}
141
142void snd_gf1_write16(struct snd_gus_card * gus,
143 unsigned char reg,
144 unsigned int data)
145{
146 __snd_gf1_write16(gus, reg, data);
147}
148
149unsigned short snd_gf1_look16(struct snd_gus_card * gus, unsigned char reg)
150{
151 return __snd_gf1_look16(gus, reg);
152}
153
154void snd_gf1_adlib_write(struct snd_gus_card * gus,
155 unsigned char reg,
156 unsigned char data)
157{
158 __snd_gf1_adlib_write(gus, reg, data);
159}
160
161void snd_gf1_write_addr(struct snd_gus_card * gus, unsigned char reg,
162 unsigned int addr, short w_16bit)
163{
164 __snd_gf1_write_addr(gus, reg, addr, w_16bit);
165}
166
167unsigned int snd_gf1_read_addr(struct snd_gus_card * gus,
168 unsigned char reg,
169 short w_16bit)
170{
171 return __snd_gf1_read_addr(gus, reg, w_16bit);
172}
173
174/*
175
176 */
177
178void snd_gf1_i_ctrl_stop(struct snd_gus_card * gus, unsigned char reg)
179{
180 unsigned long flags;
181
182 spin_lock_irqsave(&gus->reg_lock, flags);
183 __snd_gf1_ctrl_stop(gus, reg);
184 spin_unlock_irqrestore(&gus->reg_lock, flags);
185}
186
187void snd_gf1_i_write8(struct snd_gus_card * gus,
188 unsigned char reg,
189 unsigned char data)
190{
191 unsigned long flags;
192
193 spin_lock_irqsave(&gus->reg_lock, flags);
194 __snd_gf1_write8(gus, reg, data);
195 spin_unlock_irqrestore(&gus->reg_lock, flags);
196}
197
198unsigned char snd_gf1_i_look8(struct snd_gus_card * gus, unsigned char reg)
199{
200 unsigned long flags;
201 unsigned char res;
202
203 spin_lock_irqsave(&gus->reg_lock, flags);
204 res = __snd_gf1_look8(gus, reg);
205 spin_unlock_irqrestore(&gus->reg_lock, flags);
206 return res;
207}
208
209void snd_gf1_i_write16(struct snd_gus_card * gus,
210 unsigned char reg,
211 unsigned int data)
212{
213 unsigned long flags;
214
215 spin_lock_irqsave(&gus->reg_lock, flags);
216 __snd_gf1_write16(gus, reg, data);
217 spin_unlock_irqrestore(&gus->reg_lock, flags);
218}
219
220unsigned short snd_gf1_i_look16(struct snd_gus_card * gus, unsigned char reg)
221{
222 unsigned long flags;
223 unsigned short res;
224
225 spin_lock_irqsave(&gus->reg_lock, flags);
226 res = __snd_gf1_look16(gus, reg);
227 spin_unlock_irqrestore(&gus->reg_lock, flags);
228 return res;
229}
230
231#if 0
232
233void snd_gf1_i_adlib_write(struct snd_gus_card * gus,
234 unsigned char reg,
235 unsigned char data)
236{
237 unsigned long flags;
238
239 spin_lock_irqsave(&gus->reg_lock, flags);
240 __snd_gf1_adlib_write(gus, reg, data);
241 spin_unlock_irqrestore(&gus->reg_lock, flags);
242}
243
244void snd_gf1_i_write_addr(struct snd_gus_card * gus, unsigned char reg,
245 unsigned int addr, short w_16bit)
246{
247 unsigned long flags;
248
249 spin_lock_irqsave(&gus->reg_lock, flags);
250 __snd_gf1_write_addr(gus, reg, addr, w_16bit);
251 spin_unlock_irqrestore(&gus->reg_lock, flags);
252}
253
254#endif /* 0 */
255
256#ifdef CONFIG_SND_DEBUG
257static unsigned int snd_gf1_i_read_addr(struct snd_gus_card * gus,
258 unsigned char reg, short w_16bit)
259{
260 unsigned int res;
261 unsigned long flags;
262
263 spin_lock_irqsave(&gus->reg_lock, flags);
264 res = __snd_gf1_read_addr(gus, reg, w_16bit);
265 spin_unlock_irqrestore(&gus->reg_lock, flags);
266 return res;
267}
268#endif
269
270/*
271
272 */
273
274void snd_gf1_dram_addr(struct snd_gus_card * gus, unsigned int addr)
275{
276 outb(0x43, gus->gf1.reg_regsel);
277 mb();
278 outw((unsigned short) addr, gus->gf1.reg_data16);
279 mb();
280 outb(0x44, gus->gf1.reg_regsel);
281 mb();
282 outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
283 mb();
284}
285
286void snd_gf1_poke(struct snd_gus_card * gus, unsigned int addr, unsigned char data)
287{
288 unsigned long flags;
289
290 spin_lock_irqsave(&gus->reg_lock, flags);
291 outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
292 mb();
293 outw((unsigned short) addr, gus->gf1.reg_data16);
294 mb();
295 outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
296 mb();
297 outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
298 mb();
299 outb(data, gus->gf1.reg_dram);
300 spin_unlock_irqrestore(&gus->reg_lock, flags);
301}
302
303unsigned char snd_gf1_peek(struct snd_gus_card * gus, unsigned int addr)
304{
305 unsigned long flags;
306 unsigned char res;
307
308 spin_lock_irqsave(&gus->reg_lock, flags);
309 outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
310 mb();
311 outw((unsigned short) addr, gus->gf1.reg_data16);
312 mb();
313 outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
314 mb();
315 outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
316 mb();
317 res = inb(gus->gf1.reg_dram);
318 spin_unlock_irqrestore(&gus->reg_lock, flags);
319 return res;
320}
321
322#if 0
323
324void snd_gf1_pokew(struct snd_gus_card * gus, unsigned int addr, unsigned short data)
325{
326 unsigned long flags;
327
328#ifdef CONFIG_SND_DEBUG
329 if (!gus->interwave)
330 snd_printk(KERN_DEBUG "snd_gf1_pokew - GF1!!!\n");
331#endif
332 spin_lock_irqsave(&gus->reg_lock, flags);
333 outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
334 mb();
335 outw((unsigned short) addr, gus->gf1.reg_data16);
336 mb();
337 outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
338 mb();
339 outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
340 mb();
341 outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel);
342 mb();
343 outw(data, gus->gf1.reg_data16);
344 spin_unlock_irqrestore(&gus->reg_lock, flags);
345}
346
347unsigned short snd_gf1_peekw(struct snd_gus_card * gus, unsigned int addr)
348{
349 unsigned long flags;
350 unsigned short res;
351
352#ifdef CONFIG_SND_DEBUG
353 if (!gus->interwave)
354 snd_printk(KERN_DEBUG "snd_gf1_peekw - GF1!!!\n");
355#endif
356 spin_lock_irqsave(&gus->reg_lock, flags);
357 outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
358 mb();
359 outw((unsigned short) addr, gus->gf1.reg_data16);
360 mb();
361 outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
362 mb();
363 outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
364 mb();
365 outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel);
366 mb();
367 res = inw(gus->gf1.reg_data16);
368 spin_unlock_irqrestore(&gus->reg_lock, flags);
369 return res;
370}
371
372void snd_gf1_dram_setmem(struct snd_gus_card * gus, unsigned int addr,
373 unsigned short value, unsigned int count)
374{
375 unsigned long port;
376 unsigned long flags;
377
378#ifdef CONFIG_SND_DEBUG
379 if (!gus->interwave)
380 snd_printk(KERN_DEBUG "snd_gf1_dram_setmem - GF1!!!\n");
381#endif
382 addr &= ~1;
383 count >>= 1;
384 port = GUSP(gus, GF1DATALOW);
385 spin_lock_irqsave(&gus->reg_lock, flags);
386 outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
387 mb();
388 outw((unsigned short) addr, gus->gf1.reg_data16);
389 mb();
390 outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
391 mb();
392 outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
393 mb();
394 outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel);
395 while (count--)
396 outw(value, port);
397 spin_unlock_irqrestore(&gus->reg_lock, flags);
398}
399
400#endif /* 0 */
401
402void snd_gf1_select_active_voices(struct snd_gus_card * gus)
403{
404 unsigned short voices;
405
406 static const unsigned short voices_tbl[32 - 14 + 1] =
407 {
408 44100, 41160, 38587, 36317, 34300, 32494, 30870, 29400, 28063, 26843,
409 25725, 24696, 23746, 22866, 22050, 21289, 20580, 19916, 19293
410 };
411
412 voices = gus->gf1.active_voices;
413 if (voices > 32)
414 voices = 32;
415 if (voices < 14)
416 voices = 14;
417 if (gus->gf1.enh_mode)
418 voices = 32;
419 gus->gf1.active_voices = voices;
420 gus->gf1.playback_freq =
421 gus->gf1.enh_mode ? 44100 : voices_tbl[voices - 14];
422 if (!gus->gf1.enh_mode) {
423 snd_gf1_i_write8(gus, SNDRV_GF1_GB_ACTIVE_VOICES, 0xc0 | (voices - 1));
424 udelay(100);
425 }
426}
427
428#ifdef CONFIG_SND_DEBUG
429
430void snd_gf1_print_voice_registers(struct snd_gus_card * gus)
431{
432 unsigned char mode;
433 int voice, ctrl;
434
435 voice = gus->gf1.active_voice;
436 printk(KERN_INFO " -%i- GF1 voice ctrl, ramp ctrl = 0x%x, 0x%x\n", voice, ctrl = snd_gf1_i_read8(gus, 0), snd_gf1_i_read8(gus, 0x0d));
437 printk(KERN_INFO " -%i- GF1 frequency = 0x%x\n", voice, snd_gf1_i_read16(gus, 1));
438 printk(KERN_INFO " -%i- GF1 loop start, end = 0x%x (0x%x), 0x%x (0x%x)\n", voice, snd_gf1_i_read_addr(gus, 2, ctrl & 4), snd_gf1_i_read_addr(gus, 2, (ctrl & 4) ^ 4), snd_gf1_i_read_addr(gus, 4, ctrl & 4), snd_gf1_i_read_addr(gus, 4, (ctrl & 4) ^ 4));
439 printk(KERN_INFO " -%i- GF1 ramp start, end, rate = 0x%x, 0x%x, 0x%x\n", voice, snd_gf1_i_read8(gus, 7), snd_gf1_i_read8(gus, 8), snd_gf1_i_read8(gus, 6));
440 printk(KERN_INFO" -%i- GF1 volume = 0x%x\n", voice, snd_gf1_i_read16(gus, 9));
441 printk(KERN_INFO " -%i- GF1 position = 0x%x (0x%x)\n", voice, snd_gf1_i_read_addr(gus, 0x0a, ctrl & 4), snd_gf1_i_read_addr(gus, 0x0a, (ctrl & 4) ^ 4));
442 if (gus->interwave && snd_gf1_i_read8(gus, 0x19) & 0x01) { /* enhanced mode */
443 mode = snd_gf1_i_read8(gus, 0x15);
444 printk(KERN_INFO " -%i- GFA1 mode = 0x%x\n", voice, mode);
445 if (mode & 0x01) { /* Effect processor */
446 printk(KERN_INFO " -%i- GFA1 effect address = 0x%x\n", voice, snd_gf1_i_read_addr(gus, 0x11, ctrl & 4));
447 printk(KERN_INFO " -%i- GFA1 effect volume = 0x%x\n", voice, snd_gf1_i_read16(gus, 0x16));
448 printk(KERN_INFO " -%i- GFA1 effect volume final = 0x%x\n", voice, snd_gf1_i_read16(gus, 0x1d));
449 printk(KERN_INFO " -%i- GFA1 effect accumulator = 0x%x\n", voice, snd_gf1_i_read8(gus, 0x14));
450 }
451 if (mode & 0x20) {
452 printk(KERN_INFO " -%i- GFA1 left offset = 0x%x (%i)\n", voice, snd_gf1_i_read16(gus, 0x13), snd_gf1_i_read16(gus, 0x13) >> 4);
453 printk(KERN_INFO " -%i- GFA1 left offset final = 0x%x (%i)\n", voice, snd_gf1_i_read16(gus, 0x1c), snd_gf1_i_read16(gus, 0x1c) >> 4);
454 printk(KERN_INFO " -%i- GFA1 right offset = 0x%x (%i)\n", voice, snd_gf1_i_read16(gus, 0x0c), snd_gf1_i_read16(gus, 0x0c) >> 4);
455 printk(KERN_INFO " -%i- GFA1 right offset final = 0x%x (%i)\n", voice, snd_gf1_i_read16(gus, 0x1b), snd_gf1_i_read16(gus, 0x1b) >> 4);
456 } else
457 printk(KERN_INFO " -%i- GF1 pan = 0x%x\n", voice, snd_gf1_i_read8(gus, 0x0c));
458 } else
459 printk(KERN_INFO " -%i- GF1 pan = 0x%x\n", voice, snd_gf1_i_read8(gus, 0x0c));
460}
461
462#if 0
463
464void snd_gf1_print_global_registers(struct snd_gus_card * gus)
465{
466 unsigned char global_mode = 0x00;
467
468 printk(KERN_INFO " -G- GF1 active voices = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_ACTIVE_VOICES));
469 if (gus->interwave) {
470 global_mode = snd_gf1_i_read8(gus, SNDRV_GF1_GB_GLOBAL_MODE);
471 printk(KERN_INFO " -G- GF1 global mode = 0x%x\n", global_mode);
472 }
473 if (global_mode & 0x02) /* LFO enabled? */
474 printk(KERN_INFO " -G- GF1 LFO base = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_LFO_BASE));
475 printk(KERN_INFO " -G- GF1 voices IRQ read = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_VOICES_IRQ_READ));
476 printk(KERN_INFO " -G- GF1 DRAM DMA control = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL));
477 printk(KERN_INFO " -G- GF1 DRAM DMA high/low = 0x%x/0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_DMA_HIGH), snd_gf1_i_read16(gus, SNDRV_GF1_GW_DRAM_DMA_LOW));
478 printk(KERN_INFO " -G- GF1 DRAM IO high/low = 0x%x/0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_IO_HIGH), snd_gf1_i_read16(gus, SNDRV_GF1_GW_DRAM_IO_LOW));
479 if (!gus->interwave)
480 printk(KERN_INFO " -G- GF1 record DMA control = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_REC_DMA_CONTROL));
481 printk(KERN_INFO " -G- GF1 DRAM IO 16 = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_DRAM_IO16));
482 if (gus->gf1.enh_mode) {
483 printk(KERN_INFO " -G- GFA1 memory config = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_MEMORY_CONFIG));
484 printk(KERN_INFO " -G- GFA1 memory control = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_MEMORY_CONTROL));
485 printk(KERN_INFO " -G- GFA1 FIFO record base = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_FIFO_RECORD_BASE_ADDR));
486 printk(KERN_INFO " -G- GFA1 FIFO playback base = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_FIFO_PLAY_BASE_ADDR));
487 printk(KERN_INFO " -G- GFA1 interleave control = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_INTERLEAVE));
488 }
489}
490
491void snd_gf1_print_setup_registers(struct snd_gus_card * gus)
492{
493 printk(KERN_INFO " -S- mix control = 0x%x\n", inb(GUSP(gus, MIXCNTRLREG)));
494 printk(KERN_INFO " -S- IRQ status = 0x%x\n", inb(GUSP(gus, IRQSTAT)));
495 printk(KERN_INFO " -S- timer control = 0x%x\n", inb(GUSP(gus, TIMERCNTRL)));
496 printk(KERN_INFO " -S- timer data = 0x%x\n", inb(GUSP(gus, TIMERDATA)));
497 printk(KERN_INFO " -S- status read = 0x%x\n", inb(GUSP(gus, REGCNTRLS)));
498 printk(KERN_INFO " -S- Sound Blaster control = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL));
499 printk(KERN_INFO " -S- AdLib timer 1/2 = 0x%x/0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_ADLIB_TIMER_1), snd_gf1_i_look8(gus, SNDRV_GF1_GB_ADLIB_TIMER_2));
500 printk(KERN_INFO " -S- reset = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_RESET));
501 if (gus->interwave) {
502 printk(KERN_INFO " -S- compatibility = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_COMPATIBILITY));
503 printk(KERN_INFO " -S- decode control = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_DECODE_CONTROL));
504 printk(KERN_INFO " -S- version number = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_VERSION_NUMBER));
505 printk(KERN_INFO " -S- MPU-401 emul. control A/B = 0x%x/0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_MPU401_CONTROL_A), snd_gf1_i_look8(gus, SNDRV_GF1_GB_MPU401_CONTROL_B));
506 printk(KERN_INFO " -S- emulation IRQ = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_EMULATION_IRQ));
507 }
508}
509
510void snd_gf1_peek_print_block(struct snd_gus_card * gus, unsigned int addr, int count, int w_16bit)
511{
512 if (!w_16bit) {
513 while (count-- > 0)
514 printk(count > 0 ? "%02x:" : "%02x", snd_gf1_peek(gus, addr++));
515 } else {
516 while (count-- > 0) {
517 printk(count > 0 ? "%04x:" : "%04x", snd_gf1_peek(gus, addr) | (snd_gf1_peek(gus, addr + 1) << 8));
518 addr += 2;
519 }
520 }
521}
522
523#endif /* 0 */
524
525#endif