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1/*
2 * linux/drivers/pcmcia/soc_common.h
3 *
4 * Copyright (C) 2000 John G Dorsey <john+@cs.cmu.edu>
5 *
6 * This file contains definitions for the PCMCIA support code common to
7 * integrated SOCs like the SA-11x0 and PXA2xx microprocessors.
8 */
9#ifndef _ASM_ARCH_PCMCIA
10#define _ASM_ARCH_PCMCIA
11
12/* include the world */
13#include <linux/clk.h>
14#include <linux/cpufreq.h>
15#include <pcmcia/ss.h>
16#include <pcmcia/cistpl.h>
17
18
19struct device;
20struct pcmcia_low_level;
21
22/*
23 * This structure encapsulates per-socket state which we might need to
24 * use when responding to a Card Services query of some kind.
25 */
26struct soc_pcmcia_socket {
27 struct pcmcia_socket socket;
28
29 /*
30 * Info from low level handler
31 */
32 unsigned int nr;
33 struct clk *clk;
34
35 /*
36 * Core PCMCIA state
37 */
38 const struct pcmcia_low_level *ops;
39
40 unsigned int status;
41 socket_state_t cs_state;
42
43 unsigned short spd_io[MAX_IO_WIN];
44 unsigned short spd_mem[MAX_WIN];
45 unsigned short spd_attr[MAX_WIN];
46
47 struct resource res_skt;
48 struct resource res_io;
49 struct resource res_mem;
50 struct resource res_attr;
51 void __iomem *virt_io;
52
53 unsigned int irq_state;
54
55 struct timer_list poll_timer;
56 struct list_head node;
57};
58
59struct skt_dev_info {
60 int nskt;
61 struct clk *clk;
62 struct soc_pcmcia_socket skt[0];
63};
64
65struct pcmcia_state {
66 unsigned detect: 1,
67 ready: 1,
68 bvd1: 1,
69 bvd2: 1,
70 wrprot: 1,
71 vs_3v: 1,
72 vs_Xv: 1;
73};
74
75struct pcmcia_low_level {
76 struct module *owner;
77
78 /* first socket in system */
79 int first;
80 /* nr of sockets */
81 int nr;
82
83 int (*hw_init)(struct soc_pcmcia_socket *);
84 void (*hw_shutdown)(struct soc_pcmcia_socket *);
85
86 void (*socket_state)(struct soc_pcmcia_socket *, struct pcmcia_state *);
87 int (*configure_socket)(struct soc_pcmcia_socket *, const socket_state_t *);
88
89 /*
90 * Enable card status IRQs on (re-)initialisation. This can
91 * be called at initialisation, power management event, or
92 * pcmcia event.
93 */
94 void (*socket_init)(struct soc_pcmcia_socket *);
95
96 /*
97 * Disable card status IRQs and PCMCIA bus on suspend.
98 */
99 void (*socket_suspend)(struct soc_pcmcia_socket *);
100
101 /*
102 * Hardware specific timing routines.
103 * If provided, the get_timing routine overrides the SOC default.
104 */
105 unsigned int (*get_timing)(struct soc_pcmcia_socket *, unsigned int, unsigned int);
106 int (*set_timing)(struct soc_pcmcia_socket *);
107 int (*show_timing)(struct soc_pcmcia_socket *, char *);
108
109#ifdef CONFIG_CPU_FREQ
110 /*
111 * CPUFREQ support.
112 */
113 int (*frequency_change)(struct soc_pcmcia_socket *, unsigned long, struct cpufreq_freqs *);
114#endif
115};
116
117
118struct pcmcia_irqs {
119 int sock;
120 int irq;
121 const char *str;
122};
123
124struct soc_pcmcia_timing {
125 unsigned short io;
126 unsigned short mem;
127 unsigned short attr;
128};
129
130extern int soc_pcmcia_request_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr);
131extern void soc_pcmcia_free_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr);
132extern void soc_pcmcia_disable_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr);
133extern void soc_pcmcia_enable_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr);
134extern void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket *, struct soc_pcmcia_timing *);
135
136
137void soc_pcmcia_remove_one(struct soc_pcmcia_socket *skt);
138int soc_pcmcia_add_one(struct soc_pcmcia_socket *skt);
139
140
141#ifdef CONFIG_PCMCIA_DEBUG
142
143extern void soc_pcmcia_debug(struct soc_pcmcia_socket *skt, const char *func,
144 int lvl, const char *fmt, ...);
145
146#define debug(skt, lvl, fmt, arg...) \
147 soc_pcmcia_debug(skt, __func__, lvl, fmt , ## arg)
148
149#else
150#define debug(skt, lvl, fmt, arg...) do { } while (0)
151#endif
152
153
154/*
155 * The PC Card Standard, Release 7, section 4.13.4, says that twIORD
156 * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has
157 * a minimum value of 165ns, as well. Section 4.7.2 (describing
158 * common and attribute memory write timing) says that twWE has a
159 * minimum value of 150ns for a 250ns cycle time (for 5V operation;
160 * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V
161 * operation, also section 4.7.4). Section 4.7.3 says that taOE
162 * has a maximum value of 150ns for a 300ns cycle time (for 5V
163 * operation), or 300ns for a 600ns cycle time (for 3.3V operation).
164 *
165 * When configuring memory maps, Card Services appears to adopt the policy
166 * that a memory access time of "0" means "use the default." The default
167 * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute
168 * and memory command width time is 150ns; the PCMCIA 3.3V attribute and
169 * memory command width time is 300ns.
170 */
171#define SOC_PCMCIA_IO_ACCESS (165)
172#define SOC_PCMCIA_5V_MEM_ACCESS (150)
173#define SOC_PCMCIA_3V_MEM_ACCESS (300)
174#define SOC_PCMCIA_ATTR_MEM_ACCESS (300)
175
176/*
177 * The socket driver actually works nicely in interrupt-driven form,
178 * so the (relatively infrequent) polling is "just to be sure."
179 */
180#define SOC_PCMCIA_POLL_PERIOD (2*HZ)
181
182
183/* I/O pins replacing memory pins
184 * (PCMCIA System Architecture, 2nd ed., by Don Anderson, p.75)
185 *
186 * These signals change meaning when going from memory-only to
187 * memory-or-I/O interface:
188 */
189#define iostschg bvd1
190#define iospkr bvd2
191
192#endif
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * linux/drivers/pcmcia/soc_common.h
4 *
5 * Copyright (C) 2000 John G Dorsey <john+@cs.cmu.edu>
6 *
7 * This file contains definitions for the PCMCIA support code common to
8 * integrated SOCs like the SA-11x0 and PXA2xx microprocessors.
9 */
10#ifndef _ASM_ARCH_PCMCIA
11#define _ASM_ARCH_PCMCIA
12
13/* include the world */
14#include <linux/clk.h>
15#include <linux/cpufreq.h>
16#include <pcmcia/cistpl.h>
17#include <pcmcia/soc_common.h>
18
19struct device;
20struct gpio_desc;
21struct pcmcia_low_level;
22struct regulator;
23
24struct skt_dev_info {
25 int nskt;
26 struct soc_pcmcia_socket skt[];
27};
28
29struct soc_pcmcia_timing {
30 unsigned short io;
31 unsigned short mem;
32 unsigned short attr;
33};
34
35extern void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket *, struct soc_pcmcia_timing *);
36
37void soc_pcmcia_init_one(struct soc_pcmcia_socket *skt,
38 const struct pcmcia_low_level *ops, struct device *dev);
39void soc_pcmcia_remove_one(struct soc_pcmcia_socket *skt);
40int soc_pcmcia_add_one(struct soc_pcmcia_socket *skt);
41int soc_pcmcia_request_gpiods(struct soc_pcmcia_socket *skt);
42
43void soc_common_cf_socket_state(struct soc_pcmcia_socket *skt,
44 struct pcmcia_state *state);
45
46int soc_pcmcia_regulator_set(struct soc_pcmcia_socket *skt,
47 struct soc_pcmcia_regulator *r, int v);
48
49#ifdef CONFIG_PCMCIA_DEBUG
50
51extern void soc_pcmcia_debug(struct soc_pcmcia_socket *skt, const char *func,
52 int lvl, const char *fmt, ...);
53
54#define debug(skt, lvl, fmt, arg...) \
55 soc_pcmcia_debug(skt, __func__, lvl, fmt , ## arg)
56
57#else
58#define debug(skt, lvl, fmt, arg...) do { } while (0)
59#endif
60
61
62/*
63 * The PC Card Standard, Release 7, section 4.13.4, says that twIORD
64 * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has
65 * a minimum value of 165ns, as well. Section 4.7.2 (describing
66 * common and attribute memory write timing) says that twWE has a
67 * minimum value of 150ns for a 250ns cycle time (for 5V operation;
68 * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V
69 * operation, also section 4.7.4). Section 4.7.3 says that taOE
70 * has a maximum value of 150ns for a 300ns cycle time (for 5V
71 * operation), or 300ns for a 600ns cycle time (for 3.3V operation).
72 *
73 * When configuring memory maps, Card Services appears to adopt the policy
74 * that a memory access time of "0" means "use the default." The default
75 * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute
76 * and memory command width time is 150ns; the PCMCIA 3.3V attribute and
77 * memory command width time is 300ns.
78 */
79#define SOC_PCMCIA_IO_ACCESS (165)
80#define SOC_PCMCIA_5V_MEM_ACCESS (150)
81#define SOC_PCMCIA_3V_MEM_ACCESS (300)
82#define SOC_PCMCIA_ATTR_MEM_ACCESS (300)
83
84/*
85 * The socket driver actually works nicely in interrupt-driven form,
86 * so the (relatively infrequent) polling is "just to be sure."
87 */
88#define SOC_PCMCIA_POLL_PERIOD (2*HZ)
89
90
91/* I/O pins replacing memory pins
92 * (PCMCIA System Architecture, 2nd ed., by Don Anderson, p.75)
93 *
94 * These signals change meaning when going from memory-only to
95 * memory-or-I/O interface:
96 */
97#define iostschg bvd1
98#define iospkr bvd2
99
100#endif