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1// SPDX-License-Identifier: ISC
2/* Copyright (C) 2019 MediaTek Inc.
3 *
4 * Author: Roy Luo <royluo@google.com>
5 * Ryder Lee <ryder.lee@mediatek.com>
6 * Felix Fietkau <nbd@nbd.name>
7 * Lorenzo Bianconi <lorenzo@kernel.org>
8 */
9
10#include <linux/etherdevice.h>
11#include <linux/hwmon.h>
12#include <linux/hwmon-sysfs.h>
13#include "mt7615.h"
14#include "mac.h"
15#include "mcu.h"
16#include "eeprom.h"
17
18static ssize_t mt7615_thermal_show_temp(struct device *dev,
19 struct device_attribute *attr,
20 char *buf)
21{
22 struct mt7615_dev *mdev = dev_get_drvdata(dev);
23 int temperature;
24
25 if (!mt7615_wait_for_mcu_init(mdev))
26 return 0;
27
28 mt7615_mutex_acquire(mdev);
29 temperature = mt7615_mcu_get_temperature(mdev);
30 mt7615_mutex_release(mdev);
31
32 if (temperature < 0)
33 return temperature;
34
35 /* display in millidegree celcius */
36 return sprintf(buf, "%u\n", temperature * 1000);
37}
38
39static SENSOR_DEVICE_ATTR(temp1_input, 0444, mt7615_thermal_show_temp,
40 NULL, 0);
41
42static struct attribute *mt7615_hwmon_attrs[] = {
43 &sensor_dev_attr_temp1_input.dev_attr.attr,
44 NULL,
45};
46ATTRIBUTE_GROUPS(mt7615_hwmon);
47
48int mt7615_thermal_init(struct mt7615_dev *dev)
49{
50 struct wiphy *wiphy = mt76_hw(dev)->wiphy;
51 struct device *hwmon;
52 const char *name;
53
54 if (!IS_REACHABLE(CONFIG_HWMON))
55 return 0;
56
57 name = devm_kasprintf(&wiphy->dev, GFP_KERNEL, "mt7615_%s",
58 wiphy_name(wiphy));
59 hwmon = devm_hwmon_device_register_with_groups(&wiphy->dev, name, dev,
60 mt7615_hwmon_groups);
61 return PTR_ERR_OR_ZERO(hwmon);
62}
63EXPORT_SYMBOL_GPL(mt7615_thermal_init);
64
65static void
66mt7615_phy_init(struct mt7615_dev *dev)
67{
68 /* disable rf low power beacon mode */
69 mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(0), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
70 mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(1), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
71}
72
73static void
74mt7615_init_mac_chain(struct mt7615_dev *dev, int chain)
75{
76 u32 val;
77
78 if (!chain)
79 val = MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN;
80 else
81 val = MT_CFG_CCR_MAC_D1_1X_GC_EN | MT_CFG_CCR_MAC_D1_2X_GC_EN;
82
83 /* enable band 0/1 clk */
84 mt76_set(dev, MT_CFG_CCR, val);
85
86 mt76_rmw(dev, MT_TMAC_TRCR(chain),
87 MT_TMAC_TRCR_CCA_SEL | MT_TMAC_TRCR_SEC_CCA_SEL,
88 FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) |
89 FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0));
90
91 mt76_wr(dev, MT_AGG_ACR(chain),
92 MT_AGG_ACR_PKT_TIME_EN | MT_AGG_ACR_NO_BA_AR_RULE |
93 FIELD_PREP(MT_AGG_ACR_CFEND_RATE, MT7615_CFEND_RATE_DEFAULT) |
94 FIELD_PREP(MT_AGG_ACR_BAR_RATE, MT7615_BAR_RATE_DEFAULT));
95
96 mt76_wr(dev, MT_AGG_ARUCR(chain),
97 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) |
98 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) |
99 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) |
100 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) |
101 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) |
102 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) |
103 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) |
104 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1));
105
106 mt76_wr(dev, MT_AGG_ARDCR(chain),
107 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7615_RATE_RETRY - 1) |
108 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7615_RATE_RETRY - 1) |
109 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) |
110 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) |
111 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) |
112 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) |
113 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) |
114 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1));
115
116 mt76_clear(dev, MT_DMA_RCFR0(chain), MT_DMA_RCFR0_MCU_RX_TDLS);
117 if (!mt7615_firmware_offload(dev)) {
118 u32 mask, set;
119
120 mask = MT_DMA_RCFR0_MCU_RX_MGMT |
121 MT_DMA_RCFR0_MCU_RX_CTL_NON_BAR |
122 MT_DMA_RCFR0_MCU_RX_CTL_BAR |
123 MT_DMA_RCFR0_MCU_RX_BYPASS |
124 MT_DMA_RCFR0_RX_DROPPED_UCAST |
125 MT_DMA_RCFR0_RX_DROPPED_MCAST;
126 set = FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_UCAST, 2) |
127 FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_MCAST, 2);
128 mt76_rmw(dev, MT_DMA_RCFR0(chain), mask, set);
129 }
130}
131
132static void
133mt7615_mac_init(struct mt7615_dev *dev)
134{
135 int i;
136
137 mt7615_init_mac_chain(dev, 0);
138
139 mt76_rmw_field(dev, MT_TMAC_CTCR0,
140 MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
141 mt76_rmw_field(dev, MT_TMAC_CTCR0,
142 MT_TMAC_CTCR0_INS_DDLMT_DENSITY, 0x3);
143 mt76_rmw(dev, MT_TMAC_CTCR0,
144 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
145 MT_TMAC_CTCR0_INS_DDLMT_EN,
146 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
147 MT_TMAC_CTCR0_INS_DDLMT_EN);
148
149 mt76_connac_mcu_set_rts_thresh(&dev->mt76, 0x92b, 0);
150 mt7615_mac_set_scs(&dev->phy, true);
151
152 mt76_rmw(dev, MT_AGG_SCR, MT_AGG_SCR_NLNAV_MID_PTEC_DIS,
153 MT_AGG_SCR_NLNAV_MID_PTEC_DIS);
154
155 mt76_wr(dev, MT_AGG_ARCR,
156 FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) |
157 MT_AGG_ARCR_RATE_DOWN_RATIO_EN |
158 FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) |
159 FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4));
160
161 for (i = 0; i < MT7615_WTBL_SIZE; i++)
162 mt7615_mac_wtbl_update(dev, i,
163 MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
164
165 mt76_set(dev, MT_WF_RMAC_MIB_TIME0, MT_WF_RMAC_MIB_RXTIME_EN);
166 mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0, MT_WF_RMAC_MIB_RXTIME_EN);
167
168 mt76_wr(dev, MT_DMA_DCR0,
169 FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072) |
170 MT_DMA_DCR0_RX_VEC_DROP | MT_DMA_DCR0_DAMSDU_EN |
171 MT_DMA_DCR0_RX_HDR_TRANS_EN);
172 /* disable TDLS filtering */
173 mt76_clear(dev, MT_WF_PFCR, MT_WF_PFCR_TDLS_EN);
174 mt76_set(dev, MT_WF_MIB_SCR0, MT_MIB_SCR0_AGG_CNT_RANGE_EN);
175 if (is_mt7663(&dev->mt76)) {
176 mt76_wr(dev, MT_WF_AGG(0x160), 0x5c341c02);
177 mt76_wr(dev, MT_WF_AGG(0x164), 0x70708040);
178 } else {
179 mt7615_init_mac_chain(dev, 1);
180 }
181 mt7615_mcu_set_rx_hdr_trans_blacklist(dev);
182}
183
184static void
185mt7615_check_offload_capability(struct mt7615_dev *dev)
186{
187 struct ieee80211_hw *hw = mt76_hw(dev);
188 struct wiphy *wiphy = hw->wiphy;
189
190 if (mt7615_firmware_offload(dev)) {
191 ieee80211_hw_set(hw, SUPPORTS_PS);
192 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
193
194 wiphy->flags &= ~WIPHY_FLAG_4ADDR_STATION;
195 wiphy->max_remain_on_channel_duration = 5000;
196 wiphy->features |= NL80211_FEATURE_SCHED_SCAN_RANDOM_MAC_ADDR |
197 NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR |
198 WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL |
199 NL80211_FEATURE_P2P_GO_CTWIN |
200 NL80211_FEATURE_P2P_GO_OPPPS;
201 } else {
202 dev->ops->hw_scan = NULL;
203 dev->ops->cancel_hw_scan = NULL;
204 dev->ops->sched_scan_start = NULL;
205 dev->ops->sched_scan_stop = NULL;
206 dev->ops->set_rekey_data = NULL;
207 dev->ops->remain_on_channel = NULL;
208 dev->ops->cancel_remain_on_channel = NULL;
209
210 wiphy->max_sched_scan_plan_interval = 0;
211 wiphy->max_sched_scan_ie_len = 0;
212 wiphy->max_scan_ie_len = IEEE80211_MAX_DATA_LEN;
213 wiphy->max_sched_scan_ssids = 0;
214 wiphy->max_match_sets = 0;
215 wiphy->max_sched_scan_reqs = 0;
216 }
217}
218
219bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev)
220{
221 flush_work(&dev->mcu_work);
222
223 return test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
224}
225EXPORT_SYMBOL_GPL(mt7615_wait_for_mcu_init);
226
227static const struct ieee80211_iface_limit if_limits[] = {
228 {
229 .max = 1,
230 .types = BIT(NL80211_IFTYPE_ADHOC)
231 }, {
232 .max = MT7615_MAX_INTERFACES,
233 .types = BIT(NL80211_IFTYPE_AP) |
234#ifdef CONFIG_MAC80211_MESH
235 BIT(NL80211_IFTYPE_MESH_POINT) |
236#endif
237 BIT(NL80211_IFTYPE_P2P_CLIENT) |
238 BIT(NL80211_IFTYPE_P2P_GO) |
239 BIT(NL80211_IFTYPE_STATION)
240 }
241};
242
243static const struct ieee80211_iface_combination if_comb_radar[] = {
244 {
245 .limits = if_limits,
246 .n_limits = ARRAY_SIZE(if_limits),
247 .max_interfaces = MT7615_MAX_INTERFACES,
248 .num_different_channels = 1,
249 .beacon_int_infra_match = true,
250 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
251 BIT(NL80211_CHAN_WIDTH_20) |
252 BIT(NL80211_CHAN_WIDTH_40) |
253 BIT(NL80211_CHAN_WIDTH_80) |
254 BIT(NL80211_CHAN_WIDTH_160) |
255 BIT(NL80211_CHAN_WIDTH_80P80),
256 }
257};
258
259static const struct ieee80211_iface_combination if_comb[] = {
260 {
261 .limits = if_limits,
262 .n_limits = ARRAY_SIZE(if_limits),
263 .max_interfaces = MT7615_MAX_INTERFACES,
264 .num_different_channels = 1,
265 .beacon_int_infra_match = true,
266 }
267};
268
269void mt7615_init_txpower(struct mt7615_dev *dev,
270 struct ieee80211_supported_band *sband)
271{
272 int i, n_chains = hweight8(dev->mphy.antenna_mask), target_chains;
273 int delta_idx, delta = mt76_tx_power_nss_delta(n_chains);
274 u8 *eep = (u8 *)dev->mt76.eeprom.data;
275 enum nl80211_band band = sband->band;
276 struct mt76_power_limits limits;
277 u8 rate_val;
278
279 delta_idx = mt7615_eeprom_get_power_delta_index(dev, band);
280 rate_val = eep[delta_idx];
281 if ((rate_val & ~MT_EE_RATE_POWER_MASK) ==
282 (MT_EE_RATE_POWER_EN | MT_EE_RATE_POWER_SIGN))
283 delta += rate_val & MT_EE_RATE_POWER_MASK;
284
285 if (!is_mt7663(&dev->mt76) && mt7615_ext_pa_enabled(dev, band))
286 target_chains = 1;
287 else
288 target_chains = n_chains;
289
290 for (i = 0; i < sband->n_channels; i++) {
291 struct ieee80211_channel *chan = &sband->channels[i];
292 u8 target_power = 0;
293 int j;
294
295 for (j = 0; j < target_chains; j++) {
296 int index;
297
298 index = mt7615_eeprom_get_target_power_index(dev, chan, j);
299 if (index < 0)
300 continue;
301
302 target_power = max(target_power, eep[index]);
303 }
304
305 target_power = mt76_get_rate_power_limits(&dev->mphy, chan,
306 &limits,
307 target_power);
308 target_power += delta;
309 target_power = DIV_ROUND_UP(target_power, 2);
310 chan->max_power = min_t(int, chan->max_reg_power,
311 target_power);
312 chan->orig_mpwr = target_power;
313 }
314}
315EXPORT_SYMBOL_GPL(mt7615_init_txpower);
316
317void mt7615_init_work(struct mt7615_dev *dev)
318{
319 mt7615_mcu_set_eeprom(dev);
320 mt7615_mac_init(dev);
321 mt7615_phy_init(dev);
322 mt7615_mcu_del_wtbl_all(dev);
323 mt7615_check_offload_capability(dev);
324}
325EXPORT_SYMBOL_GPL(mt7615_init_work);
326
327static void
328mt7615_regd_notifier(struct wiphy *wiphy,
329 struct regulatory_request *request)
330{
331 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
332 struct mt7615_dev *dev = mt7615_hw_dev(hw);
333 struct mt76_phy *mphy = hw->priv;
334 struct mt7615_phy *phy = mphy->priv;
335 struct cfg80211_chan_def *chandef = &mphy->chandef;
336
337 memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2));
338 dev->mt76.region = request->dfs_region;
339
340 mt7615_init_txpower(dev, &mphy->sband_2g.sband);
341 mt7615_init_txpower(dev, &mphy->sband_5g.sband);
342
343 mt7615_mutex_acquire(dev);
344
345 if (chandef->chan->flags & IEEE80211_CHAN_RADAR)
346 mt7615_dfs_init_radar_detector(phy);
347
348 if (mt7615_firmware_offload(phy->dev)) {
349 mt76_connac_mcu_set_channel_domain(mphy);
350 mt76_connac_mcu_set_rate_txpower(mphy);
351 }
352
353 mt7615_mutex_release(dev);
354}
355
356static void
357mt7615_init_wiphy(struct ieee80211_hw *hw)
358{
359 struct mt7615_phy *phy = mt7615_hw_phy(hw);
360 struct wiphy *wiphy = hw->wiphy;
361
362 hw->queues = 4;
363 hw->max_rates = 3;
364 hw->max_report_rates = 7;
365 hw->max_rate_tries = 11;
366 hw->netdev_features = NETIF_F_RXCSUM;
367
368 hw->radiotap_timestamp.units_pos =
369 IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US;
370
371 phy->slottime = 9;
372
373 hw->sta_data_size = sizeof(struct mt7615_sta);
374 hw->vif_data_size = sizeof(struct mt7615_vif);
375
376 if (is_mt7663(&phy->dev->mt76)) {
377 wiphy->iface_combinations = if_comb;
378 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
379 } else {
380 wiphy->iface_combinations = if_comb_radar;
381 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb_radar);
382 }
383 wiphy->reg_notifier = mt7615_regd_notifier;
384
385 wiphy->max_sched_scan_plan_interval =
386 MT76_CONNAC_MAX_TIME_SCHED_SCAN_INTERVAL;
387 wiphy->max_sched_scan_ie_len = IEEE80211_MAX_DATA_LEN;
388 wiphy->max_scan_ie_len = MT76_CONNAC_SCAN_IE_LEN;
389 wiphy->max_sched_scan_ssids = MT76_CONNAC_MAX_SCHED_SCAN_SSID;
390 wiphy->max_match_sets = MT76_CONNAC_MAX_SCAN_MATCH;
391 wiphy->max_sched_scan_reqs = 1;
392 wiphy->max_scan_ssids = 4;
393
394 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
395 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
396 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
397 if (!is_mt7622(&phy->dev->mt76))
398 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_MU_MIMO_AIR_SNIFFER);
399
400 ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
401 ieee80211_hw_set(hw, TX_STATUS_NO_AMPDU_LEN);
402 ieee80211_hw_set(hw, WANT_MONITOR_VIF);
403 ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD);
404 ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW);
405
406 if (is_mt7615(&phy->dev->mt76))
407 hw->max_tx_fragments = MT_TXP_MAX_BUF_NUM;
408 else
409 hw->max_tx_fragments = MT_HW_TXP_MAX_BUF_NUM;
410
411 phy->mt76->sband_2g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
412 phy->mt76->sband_5g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
413 phy->mt76->sband_5g.sband.vht_cap.cap |=
414 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
415}
416
417static void
418mt7615_cap_dbdc_enable(struct mt7615_dev *dev)
419{
420 dev->mphy.sband_5g.sband.vht_cap.cap &=
421 ~(IEEE80211_VHT_CAP_SHORT_GI_160 |
422 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ);
423 if (dev->chainmask == 0xf)
424 dev->mphy.antenna_mask = dev->chainmask >> 2;
425 else
426 dev->mphy.antenna_mask = dev->chainmask >> 1;
427 dev->mphy.chainmask = dev->mphy.antenna_mask;
428 dev->mphy.hw->wiphy->available_antennas_rx = dev->mphy.chainmask;
429 dev->mphy.hw->wiphy->available_antennas_tx = dev->mphy.chainmask;
430 mt76_set_stream_caps(&dev->mphy, true);
431}
432
433static void
434mt7615_cap_dbdc_disable(struct mt7615_dev *dev)
435{
436 dev->mphy.sband_5g.sband.vht_cap.cap |=
437 IEEE80211_VHT_CAP_SHORT_GI_160 |
438 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ;
439 dev->mphy.antenna_mask = dev->chainmask;
440 dev->mphy.chainmask = dev->chainmask;
441 dev->mphy.hw->wiphy->available_antennas_rx = dev->chainmask;
442 dev->mphy.hw->wiphy->available_antennas_tx = dev->chainmask;
443 mt76_set_stream_caps(&dev->mphy, true);
444}
445
446u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr)
447{
448 u32 base, offset;
449
450 if (is_mt7663(&dev->mt76)) {
451 base = addr & MT7663_MCU_PCIE_REMAP_2_BASE;
452 offset = addr & MT7663_MCU_PCIE_REMAP_2_OFFSET;
453 } else {
454 base = addr & MT_MCU_PCIE_REMAP_2_BASE;
455 offset = addr & MT_MCU_PCIE_REMAP_2_OFFSET;
456 }
457 mt76_wr(dev, MT_MCU_PCIE_REMAP_2, base);
458
459 return MT_PCIE_REMAP_BASE_2 + offset;
460}
461EXPORT_SYMBOL_GPL(mt7615_reg_map);
462
463static void
464mt7615_led_set_config(struct led_classdev *led_cdev,
465 u8 delay_on, u8 delay_off)
466{
467 struct mt7615_dev *dev;
468 struct mt76_phy *mphy;
469 u32 val, addr;
470 u8 index;
471
472 mphy = container_of(led_cdev, struct mt76_phy, leds.cdev);
473 dev = container_of(mphy->dev, struct mt7615_dev, mt76);
474
475 if (!mt76_connac_pm_ref(mphy, &dev->pm))
476 return;
477
478 val = FIELD_PREP(MT_LED_STATUS_DURATION, 0xffff) |
479 FIELD_PREP(MT_LED_STATUS_OFF, delay_off) |
480 FIELD_PREP(MT_LED_STATUS_ON, delay_on);
481
482 index = dev->dbdc_support ? mphy->band_idx : mphy->leds.pin;
483 addr = mt7615_reg_map(dev, MT_LED_STATUS_0(index));
484 mt76_wr(dev, addr, val);
485 addr = mt7615_reg_map(dev, MT_LED_STATUS_1(index));
486 mt76_wr(dev, addr, val);
487
488 val = MT_LED_CTRL_REPLAY(index) | MT_LED_CTRL_KICK(index);
489 if (dev->mphy.leds.al)
490 val |= MT_LED_CTRL_POLARITY(index);
491 if (mphy->band_idx)
492 val |= MT_LED_CTRL_BAND(index);
493
494 addr = mt7615_reg_map(dev, MT_LED_CTRL);
495 mt76_wr(dev, addr, val);
496
497 mt76_connac_pm_unref(mphy, &dev->pm);
498}
499
500int mt7615_led_set_blink(struct led_classdev *led_cdev,
501 unsigned long *delay_on,
502 unsigned long *delay_off)
503{
504 u8 delta_on, delta_off;
505
506 delta_off = max_t(u8, *delay_off / 10, 1);
507 delta_on = max_t(u8, *delay_on / 10, 1);
508
509 mt7615_led_set_config(led_cdev, delta_on, delta_off);
510
511 return 0;
512}
513EXPORT_SYMBOL_GPL(mt7615_led_set_blink);
514
515void mt7615_led_set_brightness(struct led_classdev *led_cdev,
516 enum led_brightness brightness)
517{
518 if (!brightness)
519 mt7615_led_set_config(led_cdev, 0, 0xff);
520 else
521 mt7615_led_set_config(led_cdev, 0xff, 0);
522}
523EXPORT_SYMBOL_GPL(mt7615_led_set_brightness);
524
525int mt7615_register_ext_phy(struct mt7615_dev *dev)
526{
527 struct mt7615_phy *phy = mt7615_ext_phy(dev);
528 struct mt76_phy *mphy;
529 int i, ret;
530
531 if (!is_mt7615(&dev->mt76))
532 return -EOPNOTSUPP;
533
534 if (test_bit(MT76_STATE_RUNNING, &dev->mphy.state))
535 return -EINVAL;
536
537 if (phy)
538 return 0;
539
540 mt7615_cap_dbdc_enable(dev);
541 mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7615_ops, MT_BAND1);
542 if (!mphy)
543 return -ENOMEM;
544
545 phy = mphy->priv;
546 phy->dev = dev;
547 phy->mt76 = mphy;
548 mphy->chainmask = dev->chainmask & ~dev->mphy.chainmask;
549 mphy->antenna_mask = BIT(hweight8(mphy->chainmask)) - 1;
550 mt7615_init_wiphy(mphy->hw);
551
552 INIT_DELAYED_WORK(&mphy->mac_work, mt7615_mac_work);
553 INIT_DELAYED_WORK(&phy->scan_work, mt7615_scan_work);
554 skb_queue_head_init(&phy->scan_event_list);
555
556 INIT_WORK(&phy->roc_work, mt7615_roc_work);
557 timer_setup(&phy->roc_timer, mt7615_roc_timer, 0);
558 init_waitqueue_head(&phy->roc_wait);
559
560 mt7615_mac_set_scs(phy, true);
561
562 /*
563 * Make the secondary PHY MAC address local without overlapping with
564 * the usual MAC address allocation scheme on multiple virtual interfaces
565 */
566 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
567 ETH_ALEN);
568 mphy->macaddr[0] |= 2;
569 mphy->macaddr[0] ^= BIT(7);
570 mt76_eeprom_override(mphy);
571
572 /* second phy can only handle 5 GHz */
573 mphy->cap.has_5ghz = true;
574
575 /* mt7615 second phy shares the same hw queues with the primary one */
576 for (i = 0; i <= MT_TXQ_PSD ; i++)
577 mphy->q_tx[i] = dev->mphy.q_tx[i];
578
579 /* init led callbacks */
580 if (IS_ENABLED(CONFIG_MT76_LEDS)) {
581 mphy->leds.cdev.brightness_set = mt7615_led_set_brightness;
582 mphy->leds.cdev.blink_set = mt7615_led_set_blink;
583 }
584
585 ret = mt76_register_phy(mphy, true, mt76_rates,
586 ARRAY_SIZE(mt76_rates));
587 if (ret)
588 ieee80211_free_hw(mphy->hw);
589
590 return ret;
591}
592EXPORT_SYMBOL_GPL(mt7615_register_ext_phy);
593
594void mt7615_unregister_ext_phy(struct mt7615_dev *dev)
595{
596 struct mt7615_phy *phy = mt7615_ext_phy(dev);
597 struct mt76_phy *mphy = dev->mt76.phys[MT_BAND1];
598
599 if (!phy)
600 return;
601
602 mt7615_cap_dbdc_disable(dev);
603 mt76_unregister_phy(mphy);
604 ieee80211_free_hw(mphy->hw);
605}
606EXPORT_SYMBOL_GPL(mt7615_unregister_ext_phy);
607
608void mt7615_init_device(struct mt7615_dev *dev)
609{
610 struct ieee80211_hw *hw = mt76_hw(dev);
611
612 dev->phy.dev = dev;
613 dev->phy.mt76 = &dev->mt76.phy;
614 dev->mt76.phy.priv = &dev->phy;
615 dev->mt76.tx_worker.fn = mt7615_tx_worker;
616
617 INIT_DELAYED_WORK(&dev->pm.ps_work, mt7615_pm_power_save_work);
618 INIT_WORK(&dev->pm.wake_work, mt7615_pm_wake_work);
619 spin_lock_init(&dev->pm.wake.lock);
620 mutex_init(&dev->pm.mutex);
621 init_waitqueue_head(&dev->pm.wait);
622 spin_lock_init(&dev->pm.txq_lock);
623 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7615_mac_work);
624 INIT_DELAYED_WORK(&dev->phy.scan_work, mt7615_scan_work);
625 INIT_DELAYED_WORK(&dev->coredump.work, mt7615_coredump_work);
626 skb_queue_head_init(&dev->phy.scan_event_list);
627 skb_queue_head_init(&dev->coredump.msg_list);
628 init_waitqueue_head(&dev->reset_wait);
629 init_waitqueue_head(&dev->phy.roc_wait);
630
631 INIT_WORK(&dev->phy.roc_work, mt7615_roc_work);
632 timer_setup(&dev->phy.roc_timer, mt7615_roc_timer, 0);
633
634 mt7615_init_wiphy(hw);
635 dev->pm.idle_timeout = MT7615_PM_TIMEOUT;
636 dev->pm.stats.last_wake_event = jiffies;
637 dev->pm.stats.last_doze_event = jiffies;
638 mt7615_cap_dbdc_disable(dev);
639
640#ifdef CONFIG_NL80211_TESTMODE
641 dev->mt76.test_ops = &mt7615_testmode_ops;
642#endif
643}
644EXPORT_SYMBOL_GPL(mt7615_init_device);