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1// SPDX-License-Identifier: GPL-2.0-or-later
2
3/* Driver for the Texas Instruments TMP464 SMBus temperature sensor IC.
4 * Supported models: TMP464, TMP468
5
6 * Copyright (C) 2022 Agathe Porte <agathe.porte@nokia.com>
7 * Preliminary support by:
8 * Lionel Pouliquen <lionel.lp.pouliquen@nokia.com>
9 */
10
11#include <linux/err.h>
12#include <linux/hwmon.h>
13#include <linux/i2c.h>
14#include <linux/init.h>
15#include <linux/module.h>
16#include <linux/mutex.h>
17#include <linux/of.h>
18#include <linux/regmap.h>
19#include <linux/slab.h>
20
21/* Addresses to scan */
22static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4b, I2C_CLIENT_END };
23
24#define TMP464_NUM_CHANNELS 5 /* chan 0 is internal, 1-4 are remote */
25#define TMP468_NUM_CHANNELS 9 /* chan 0 is internal, 1-8 are remote */
26
27#define MAX_CHANNELS 9
28
29#define TMP464_TEMP_REG(channel) (channel)
30#define TMP464_TEMP_OFFSET_REG(channel) (0x40 + ((channel) - 1) * 8)
31#define TMP464_N_FACTOR_REG(channel) (0x41 + ((channel) - 1) * 8)
32
33static const u8 TMP464_THERM_LIMIT[MAX_CHANNELS] = {
34 0x39, 0x42, 0x4A, 0x52, 0x5A, 0x62, 0x6a, 0x72, 0x7a };
35static const u8 TMP464_THERM2_LIMIT[MAX_CHANNELS] = {
36 0x3A, 0x43, 0x4B, 0x53, 0x5B, 0x63, 0x6b, 0x73, 0x7b };
37
38#define TMP464_THERM_STATUS_REG 0x21
39#define TMP464_THERM2_STATUS_REG 0x22
40#define TMP464_REMOTE_OPEN_REG 0x23
41#define TMP464_CONFIG_REG 0x30
42#define TMP464_TEMP_HYST_REG 0x38
43#define TMP464_LOCK_REG 0xc4
44
45/* Identification */
46#define TMP464_MANUFACTURER_ID_REG 0xFE
47#define TMP464_DEVICE_ID_REG 0xFF
48
49/* Flags */
50#define TMP464_CONFIG_SHUTDOWN BIT(5)
51#define TMP464_CONFIG_RANGE 0x04
52#define TMP464_CONFIG_REG_REN(x) (BIT(7 + (x)))
53#define TMP464_CONFIG_REG_REN_MASK GENMASK(15, 7)
54#define TMP464_CONFIG_CONVERSION_RATE_B0 2
55#define TMP464_CONFIG_CONVERSION_RATE_B2 4
56#define TMP464_CONFIG_CONVERSION_RATE_MASK GENMASK(TMP464_CONFIG_CONVERSION_RATE_B2, \
57 TMP464_CONFIG_CONVERSION_RATE_B0)
58
59#define TMP464_UNLOCK_VAL 0xeb19
60#define TMP464_LOCK_VAL 0x5ca6
61#define TMP464_LOCKED 0x8000
62
63/* Manufacturer / Device ID's */
64#define TMP464_MANUFACTURER_ID 0x5449
65#define TMP464_DEVICE_ID 0x1468
66#define TMP468_DEVICE_ID 0x0468
67
68static const struct i2c_device_id tmp464_id[] = {
69 { "tmp464", TMP464_NUM_CHANNELS },
70 { "tmp468", TMP468_NUM_CHANNELS },
71 { }
72};
73MODULE_DEVICE_TABLE(i2c, tmp464_id);
74
75static const struct of_device_id __maybe_unused tmp464_of_match[] = {
76 {
77 .compatible = "ti,tmp464",
78 .data = (void *)TMP464_NUM_CHANNELS
79 },
80 {
81 .compatible = "ti,tmp468",
82 .data = (void *)TMP468_NUM_CHANNELS
83 },
84 {},
85};
86MODULE_DEVICE_TABLE(of, tmp464_of_match);
87
88struct tmp464_channel {
89 const char *label;
90 bool enabled;
91};
92
93struct tmp464_data {
94 struct regmap *regmap;
95 struct mutex update_lock;
96 int channels;
97 s16 config_orig;
98 u16 open_reg;
99 unsigned long last_updated;
100 bool valid;
101 int update_interval;
102 struct tmp464_channel channel[MAX_CHANNELS];
103};
104
105static int temp_from_reg(s16 reg)
106{
107 return DIV_ROUND_CLOSEST((reg >> 3) * 625, 10);
108}
109
110static s16 temp_to_limit_reg(long temp)
111{
112 return DIV_ROUND_CLOSEST(temp, 500) << 6;
113}
114
115static s16 temp_to_offset_reg(long temp)
116{
117 return DIV_ROUND_CLOSEST(temp * 10, 625) << 3;
118}
119
120static int tmp464_enable_channels(struct tmp464_data *data)
121{
122 struct regmap *regmap = data->regmap;
123 u16 enable = 0;
124 int i;
125
126 for (i = 0; i < data->channels; i++)
127 if (data->channel[i].enabled)
128 enable |= TMP464_CONFIG_REG_REN(i);
129
130 return regmap_update_bits(regmap, TMP464_CONFIG_REG, TMP464_CONFIG_REG_REN_MASK, enable);
131}
132
133static int tmp464_chip_read(struct device *dev, u32 attr, int channel, long *val)
134{
135 struct tmp464_data *data = dev_get_drvdata(dev);
136
137 switch (attr) {
138 case hwmon_chip_update_interval:
139 *val = data->update_interval;
140 return 0;
141 default:
142 return -EOPNOTSUPP;
143 }
144}
145
146static int tmp464_temp_read(struct device *dev, u32 attr, int channel, long *val)
147{
148 struct tmp464_data *data = dev_get_drvdata(dev);
149 struct regmap *regmap = data->regmap;
150 unsigned int regval, regval2;
151 int err = 0;
152
153 mutex_lock(&data->update_lock);
154
155 switch (attr) {
156 case hwmon_temp_max_alarm:
157 err = regmap_read(regmap, TMP464_THERM_STATUS_REG, ®val);
158 if (err < 0)
159 break;
160 *val = !!(regval & BIT(channel + 7));
161 break;
162 case hwmon_temp_crit_alarm:
163 err = regmap_read(regmap, TMP464_THERM2_STATUS_REG, ®val);
164 if (err < 0)
165 break;
166 *val = !!(regval & BIT(channel + 7));
167 break;
168 case hwmon_temp_fault:
169 /*
170 * The chip clears TMP464_REMOTE_OPEN_REG after it is read
171 * and only updates it after the next measurement cycle is
172 * complete. That means we have to cache the value internally
173 * for one measurement cycle and report the cached value.
174 */
175 if (!data->valid || time_after(jiffies, data->last_updated +
176 msecs_to_jiffies(data->update_interval))) {
177 err = regmap_read(regmap, TMP464_REMOTE_OPEN_REG, ®val);
178 if (err < 0)
179 break;
180 data->open_reg = regval;
181 data->last_updated = jiffies;
182 data->valid = true;
183 }
184 *val = !!(data->open_reg & BIT(channel + 7));
185 break;
186 case hwmon_temp_max_hyst:
187 err = regmap_read(regmap, TMP464_THERM_LIMIT[channel], ®val);
188 if (err < 0)
189 break;
190 err = regmap_read(regmap, TMP464_TEMP_HYST_REG, ®val2);
191 if (err < 0)
192 break;
193 regval -= regval2;
194 *val = temp_from_reg(regval);
195 break;
196 case hwmon_temp_max:
197 err = regmap_read(regmap, TMP464_THERM_LIMIT[channel], ®val);
198 if (err < 0)
199 break;
200 *val = temp_from_reg(regval);
201 break;
202 case hwmon_temp_crit_hyst:
203 err = regmap_read(regmap, TMP464_THERM2_LIMIT[channel], ®val);
204 if (err < 0)
205 break;
206 err = regmap_read(regmap, TMP464_TEMP_HYST_REG, ®val2);
207 if (err < 0)
208 break;
209 regval -= regval2;
210 *val = temp_from_reg(regval);
211 break;
212 case hwmon_temp_crit:
213 err = regmap_read(regmap, TMP464_THERM2_LIMIT[channel], ®val);
214 if (err < 0)
215 break;
216 *val = temp_from_reg(regval);
217 break;
218 case hwmon_temp_offset:
219 err = regmap_read(regmap, TMP464_TEMP_OFFSET_REG(channel), ®val);
220 if (err < 0)
221 break;
222 *val = temp_from_reg(regval);
223 break;
224 case hwmon_temp_input:
225 if (!data->channel[channel].enabled) {
226 err = -ENODATA;
227 break;
228 }
229 err = regmap_read(regmap, TMP464_TEMP_REG(channel), ®val);
230 if (err < 0)
231 break;
232 *val = temp_from_reg(regval);
233 break;
234 case hwmon_temp_enable:
235 *val = data->channel[channel].enabled;
236 break;
237 default:
238 err = -EOPNOTSUPP;
239 break;
240 }
241
242 mutex_unlock(&data->update_lock);
243
244 return err;
245}
246
247static int tmp464_read(struct device *dev, enum hwmon_sensor_types type,
248 u32 attr, int channel, long *val)
249{
250 switch (type) {
251 case hwmon_chip:
252 return tmp464_chip_read(dev, attr, channel, val);
253 case hwmon_temp:
254 return tmp464_temp_read(dev, attr, channel, val);
255 default:
256 return -EOPNOTSUPP;
257 }
258}
259
260static int tmp464_read_string(struct device *dev, enum hwmon_sensor_types type,
261 u32 attr, int channel, const char **str)
262{
263 struct tmp464_data *data = dev_get_drvdata(dev);
264
265 *str = data->channel[channel].label;
266
267 return 0;
268}
269
270static int tmp464_set_convrate(struct tmp464_data *data, long interval)
271{
272 int rate;
273
274 /*
275 * For valid rates, interval in milli-seconds can be calculated as
276 * interval = 125 << (7 - rate);
277 * or
278 * interval = (1 << (7 - rate)) * 125;
279 * The rate is therefore
280 * rate = 7 - __fls(interval / 125);
281 * and the rounded rate is
282 * rate = 7 - __fls(interval * 4 / (125 * 3));
283 * Use clamp_val() to avoid overflows, and to ensure valid input
284 * for __fls.
285 */
286 interval = clamp_val(interval, 125, 16000);
287 rate = 7 - __fls(interval * 4 / (125 * 3));
288 data->update_interval = 125 << (7 - rate);
289
290 return regmap_update_bits(data->regmap, TMP464_CONFIG_REG,
291 TMP464_CONFIG_CONVERSION_RATE_MASK,
292 rate << TMP464_CONFIG_CONVERSION_RATE_B0);
293}
294
295static int tmp464_chip_write(struct tmp464_data *data, u32 attr, int channel, long val)
296{
297 switch (attr) {
298 case hwmon_chip_update_interval:
299 return tmp464_set_convrate(data, val);
300 default:
301 return -EOPNOTSUPP;
302 }
303}
304
305static int tmp464_temp_write(struct tmp464_data *data, u32 attr, int channel, long val)
306{
307 struct regmap *regmap = data->regmap;
308 unsigned int regval;
309 int err = 0;
310
311 switch (attr) {
312 case hwmon_temp_max_hyst:
313 err = regmap_read(regmap, TMP464_THERM_LIMIT[0], ®val);
314 if (err < 0)
315 break;
316 val = clamp_val(val, -256000, 256000); /* prevent overflow/underflow */
317 val = clamp_val(temp_from_reg(regval) - val, 0, 255000);
318 err = regmap_write(regmap, TMP464_TEMP_HYST_REG,
319 DIV_ROUND_CLOSEST(val, 1000) << 7);
320 break;
321 case hwmon_temp_max:
322 val = temp_to_limit_reg(clamp_val(val, -255000, 255500));
323 err = regmap_write(regmap, TMP464_THERM_LIMIT[channel], val);
324 break;
325 case hwmon_temp_crit:
326 val = temp_to_limit_reg(clamp_val(val, -255000, 255500));
327 err = regmap_write(regmap, TMP464_THERM2_LIMIT[channel], val);
328 break;
329 case hwmon_temp_offset:
330 val = temp_to_offset_reg(clamp_val(val, -128000, 127937));
331 err = regmap_write(regmap, TMP464_TEMP_OFFSET_REG(channel), val);
332 break;
333 case hwmon_temp_enable:
334 data->channel[channel].enabled = !!val;
335 err = tmp464_enable_channels(data);
336 break;
337 default:
338 err = -EOPNOTSUPP;
339 break;
340 }
341
342 return err;
343}
344
345static int tmp464_write(struct device *dev, enum hwmon_sensor_types type,
346 u32 attr, int channel, long val)
347{
348 struct tmp464_data *data = dev_get_drvdata(dev);
349 int err;
350
351 mutex_lock(&data->update_lock);
352
353 switch (type) {
354 case hwmon_chip:
355 err = tmp464_chip_write(data, attr, channel, val);
356 break;
357 case hwmon_temp:
358 err = tmp464_temp_write(data, attr, channel, val);
359 break;
360 default:
361 err = -EOPNOTSUPP;
362 break;
363 }
364
365 mutex_unlock(&data->update_lock);
366
367 return err;
368}
369
370static umode_t tmp464_is_visible(const void *_data, enum hwmon_sensor_types type,
371 u32 attr, int channel)
372{
373 const struct tmp464_data *data = _data;
374
375 if (channel >= data->channels)
376 return 0;
377
378 if (type == hwmon_chip) {
379 if (attr == hwmon_chip_update_interval)
380 return 0644;
381 return 0;
382 }
383
384 switch (attr) {
385 case hwmon_temp_input:
386 case hwmon_temp_max_alarm:
387 case hwmon_temp_crit_alarm:
388 case hwmon_temp_crit_hyst:
389 return 0444;
390 case hwmon_temp_enable:
391 case hwmon_temp_max:
392 case hwmon_temp_crit:
393 return 0644;
394 case hwmon_temp_max_hyst:
395 if (!channel)
396 return 0644;
397 return 0444;
398 case hwmon_temp_label:
399 if (data->channel[channel].label)
400 return 0444;
401 return 0;
402 case hwmon_temp_fault:
403 if (channel)
404 return 0444;
405 return 0;
406 case hwmon_temp_offset:
407 if (channel)
408 return 0644;
409 return 0;
410 default:
411 return 0;
412 }
413}
414
415static void tmp464_restore_lock(void *regmap)
416{
417 regmap_write(regmap, TMP464_LOCK_REG, TMP464_LOCK_VAL);
418}
419
420static void tmp464_restore_config(void *_data)
421{
422 struct tmp464_data *data = _data;
423
424 regmap_write(data->regmap, TMP464_CONFIG_REG, data->config_orig);
425}
426
427static int tmp464_init_client(struct device *dev, struct tmp464_data *data)
428{
429 struct regmap *regmap = data->regmap;
430 unsigned int regval;
431 int err;
432
433 err = regmap_read(regmap, TMP464_LOCK_REG, ®val);
434 if (err)
435 return err;
436 if (regval == TMP464_LOCKED) {
437 /* Explicitly unlock chip if it is locked */
438 err = regmap_write(regmap, TMP464_LOCK_REG, TMP464_UNLOCK_VAL);
439 if (err)
440 return err;
441 /* and lock it again when unloading the driver */
442 err = devm_add_action_or_reset(dev, tmp464_restore_lock, regmap);
443 if (err)
444 return err;
445 }
446
447 err = regmap_read(regmap, TMP464_CONFIG_REG, ®val);
448 if (err)
449 return err;
450 data->config_orig = regval;
451 err = devm_add_action_or_reset(dev, tmp464_restore_config, data);
452 if (err)
453 return err;
454
455 /* Default to 500 ms update interval */
456 err = regmap_update_bits(regmap, TMP464_CONFIG_REG,
457 TMP464_CONFIG_CONVERSION_RATE_MASK | TMP464_CONFIG_SHUTDOWN,
458 BIT(TMP464_CONFIG_CONVERSION_RATE_B0) |
459 BIT(TMP464_CONFIG_CONVERSION_RATE_B2));
460 if (err)
461 return err;
462
463 data->update_interval = 500;
464
465 return tmp464_enable_channels(data);
466}
467
468static int tmp464_detect(struct i2c_client *client,
469 struct i2c_board_info *info)
470{
471 struct i2c_adapter *adapter = client->adapter;
472 char *name, *chip;
473 int reg;
474
475 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA))
476 return -ENODEV;
477
478 reg = i2c_smbus_read_word_swapped(client, TMP464_MANUFACTURER_ID_REG);
479 if (reg < 0)
480 return reg;
481 if (reg != TMP464_MANUFACTURER_ID)
482 return -ENODEV;
483
484 /* Check for "always return zero" bits */
485 reg = i2c_smbus_read_word_swapped(client, TMP464_THERM_STATUS_REG);
486 if (reg < 0)
487 return reg;
488 if (reg & 0x1f)
489 return -ENODEV;
490 reg = i2c_smbus_read_word_swapped(client, TMP464_THERM2_STATUS_REG);
491 if (reg < 0)
492 return reg;
493 if (reg & 0x1f)
494 return -ENODEV;
495
496 reg = i2c_smbus_read_word_swapped(client, TMP464_DEVICE_ID_REG);
497 if (reg < 0)
498 return reg;
499 switch (reg) {
500 case TMP464_DEVICE_ID:
501 name = "tmp464";
502 chip = "TMP464";
503 break;
504 case TMP468_DEVICE_ID:
505 name = "tmp468";
506 chip = "TMP468";
507 break;
508 default:
509 return -ENODEV;
510 }
511
512 strscpy(info->type, name, I2C_NAME_SIZE);
513 dev_info(&adapter->dev, "Detected TI %s chip at 0x%02x\n", chip, client->addr);
514
515 return 0;
516}
517
518static int tmp464_probe_child_from_dt(struct device *dev,
519 struct device_node *child,
520 struct tmp464_data *data)
521
522{
523 struct regmap *regmap = data->regmap;
524 u32 channel;
525 s32 nfactor;
526 int err;
527
528 err = of_property_read_u32(child, "reg", &channel);
529 if (err) {
530 dev_err(dev, "missing reg property of %pOFn\n", child);
531 return err;
532 }
533
534 if (channel >= data->channels) {
535 dev_err(dev, "invalid reg %d of %pOFn\n", channel, child);
536 return -EINVAL;
537 }
538
539 of_property_read_string(child, "label", &data->channel[channel].label);
540
541 data->channel[channel].enabled = of_device_is_available(child);
542
543 err = of_property_read_s32(child, "ti,n-factor", &nfactor);
544 if (err && err != -EINVAL)
545 return err;
546 if (!err) {
547 if (channel == 0) {
548 dev_err(dev, "n-factor can't be set for internal channel\n");
549 return -EINVAL;
550 }
551 if (nfactor > 127 || nfactor < -128) {
552 dev_err(dev, "n-factor for channel %d invalid (%d)\n",
553 channel, nfactor);
554 return -EINVAL;
555 }
556 err = regmap_write(regmap, TMP464_N_FACTOR_REG(channel),
557 (nfactor << 8) & 0xff00);
558 if (err)
559 return err;
560 }
561
562 return 0;
563}
564
565static int tmp464_probe_from_dt(struct device *dev, struct tmp464_data *data)
566{
567 const struct device_node *np = dev->of_node;
568 struct device_node *child;
569 int err;
570
571 for_each_child_of_node(np, child) {
572 if (strcmp(child->name, "channel"))
573 continue;
574
575 err = tmp464_probe_child_from_dt(dev, child, data);
576 if (err) {
577 of_node_put(child);
578 return err;
579 }
580 }
581
582 return 0;
583}
584
585static const struct hwmon_ops tmp464_ops = {
586 .is_visible = tmp464_is_visible,
587 .read = tmp464_read,
588 .read_string = tmp464_read_string,
589 .write = tmp464_write,
590};
591
592static const struct hwmon_channel_info * const tmp464_info[] = {
593 HWMON_CHANNEL_INFO(chip,
594 HWMON_C_UPDATE_INTERVAL),
595 HWMON_CHANNEL_INFO(temp,
596 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST | HWMON_T_CRIT |
597 HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM |
598 HWMON_T_LABEL | HWMON_T_ENABLE,
599 HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
600 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
601 HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
602 HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
603 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
604 HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
605 HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
606 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
607 HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
608 HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
609 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
610 HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
611 HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
612 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
613 HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
614 HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
615 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
616 HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
617 HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
618 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
619 HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
620 HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
621 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
622 HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE),
623 NULL
624};
625
626static const struct hwmon_chip_info tmp464_chip_info = {
627 .ops = &tmp464_ops,
628 .info = tmp464_info,
629};
630
631/* regmap */
632
633static bool tmp464_is_volatile_reg(struct device *dev, unsigned int reg)
634{
635 return (reg < TMP464_TEMP_REG(TMP468_NUM_CHANNELS) ||
636 reg == TMP464_THERM_STATUS_REG ||
637 reg == TMP464_THERM2_STATUS_REG ||
638 reg == TMP464_REMOTE_OPEN_REG);
639}
640
641static const struct regmap_config tmp464_regmap_config = {
642 .reg_bits = 8,
643 .val_bits = 16,
644 .max_register = TMP464_DEVICE_ID_REG,
645 .volatile_reg = tmp464_is_volatile_reg,
646 .val_format_endian = REGMAP_ENDIAN_BIG,
647 .cache_type = REGCACHE_MAPLE,
648 .use_single_read = true,
649 .use_single_write = true,
650};
651
652static int tmp464_probe(struct i2c_client *client)
653{
654 struct device *dev = &client->dev;
655 struct device *hwmon_dev;
656 struct tmp464_data *data;
657 int i, err;
658
659 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
660 dev_err(&client->dev, "i2c functionality check failed\n");
661 return -ENODEV;
662 }
663 data = devm_kzalloc(dev, sizeof(struct tmp464_data), GFP_KERNEL);
664 if (!data)
665 return -ENOMEM;
666
667 mutex_init(&data->update_lock);
668
669 if (dev->of_node)
670 data->channels = (int)(unsigned long)of_device_get_match_data(&client->dev);
671 else
672 data->channels = i2c_match_id(tmp464_id, client)->driver_data;
673
674 data->regmap = devm_regmap_init_i2c(client, &tmp464_regmap_config);
675 if (IS_ERR(data->regmap))
676 return PTR_ERR(data->regmap);
677
678 for (i = 0; i < data->channels; i++)
679 data->channel[i].enabled = true;
680
681 err = tmp464_init_client(dev, data);
682 if (err)
683 return err;
684
685 if (dev->of_node) {
686 err = tmp464_probe_from_dt(dev, data);
687 if (err)
688 return err;
689 }
690
691 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
692 data, &tmp464_chip_info, NULL);
693 return PTR_ERR_OR_ZERO(hwmon_dev);
694}
695
696static struct i2c_driver tmp464_driver = {
697 .class = I2C_CLASS_HWMON,
698 .driver = {
699 .name = "tmp464",
700 .of_match_table = of_match_ptr(tmp464_of_match),
701 },
702 .probe = tmp464_probe,
703 .id_table = tmp464_id,
704 .detect = tmp464_detect,
705 .address_list = normal_i2c,
706};
707
708module_i2c_driver(tmp464_driver);
709
710MODULE_AUTHOR("Agathe Porte <agathe.porte@nokia.com>");
711MODULE_DESCRIPTION("Texas Instruments TMP464 temperature sensor driver");
712MODULE_LICENSE("GPL");