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1// SPDX-License-Identifier: MIT
2/*
3 * Copyright © 2022 Intel Corporation
4 */
5
6#include "xe_rtp.h"
7
8#include <kunit/visibility.h>
9
10#include <drm/xe_drm.h>
11
12#include "xe_gt.h"
13#include "xe_gt_topology.h"
14#include "xe_macros.h"
15#include "xe_reg_sr.h"
16
17/**
18 * DOC: Register Table Processing
19 *
20 * Internal infrastructure to define how registers should be updated based on
21 * rules and actions. This can be used to define tables with multiple entries
22 * (one per register) that will be walked over at some point in time to apply
23 * the values to the registers that have matching rules.
24 */
25
26static bool has_samedia(const struct xe_device *xe)
27{
28 return xe->info.media_verx100 >= 1300;
29}
30
31static bool rule_matches(const struct xe_device *xe,
32 struct xe_gt *gt,
33 struct xe_hw_engine *hwe,
34 const struct xe_rtp_rule *rules,
35 unsigned int n_rules)
36{
37 const struct xe_rtp_rule *r;
38 unsigned int i;
39 bool match;
40
41 for (r = rules, i = 0; i < n_rules; r = &rules[++i]) {
42 switch (r->match_type) {
43 case XE_RTP_MATCH_PLATFORM:
44 match = xe->info.platform == r->platform;
45 break;
46 case XE_RTP_MATCH_SUBPLATFORM:
47 match = xe->info.platform == r->platform &&
48 xe->info.subplatform == r->subplatform;
49 break;
50 case XE_RTP_MATCH_GRAPHICS_VERSION:
51 match = xe->info.graphics_verx100 == r->ver_start &&
52 (!has_samedia(xe) || !xe_gt_is_media_type(gt));
53 break;
54 case XE_RTP_MATCH_GRAPHICS_VERSION_RANGE:
55 match = xe->info.graphics_verx100 >= r->ver_start &&
56 xe->info.graphics_verx100 <= r->ver_end &&
57 (!has_samedia(xe) || !xe_gt_is_media_type(gt));
58 break;
59 case XE_RTP_MATCH_GRAPHICS_STEP:
60 match = xe->info.step.graphics >= r->step_start &&
61 xe->info.step.graphics < r->step_end &&
62 (!has_samedia(xe) || !xe_gt_is_media_type(gt));
63 break;
64 case XE_RTP_MATCH_MEDIA_VERSION:
65 match = xe->info.media_verx100 == r->ver_start &&
66 (!has_samedia(xe) || xe_gt_is_media_type(gt));
67 break;
68 case XE_RTP_MATCH_MEDIA_VERSION_RANGE:
69 match = xe->info.media_verx100 >= r->ver_start &&
70 xe->info.media_verx100 <= r->ver_end &&
71 (!has_samedia(xe) || xe_gt_is_media_type(gt));
72 break;
73 case XE_RTP_MATCH_MEDIA_STEP:
74 match = xe->info.step.media >= r->step_start &&
75 xe->info.step.media < r->step_end &&
76 (!has_samedia(xe) || xe_gt_is_media_type(gt));
77 break;
78 case XE_RTP_MATCH_INTEGRATED:
79 match = !xe->info.is_dgfx;
80 break;
81 case XE_RTP_MATCH_DISCRETE:
82 match = xe->info.is_dgfx;
83 break;
84 case XE_RTP_MATCH_ENGINE_CLASS:
85 if (drm_WARN_ON(&xe->drm, !hwe))
86 return false;
87
88 match = hwe->class == r->engine_class;
89 break;
90 case XE_RTP_MATCH_NOT_ENGINE_CLASS:
91 if (drm_WARN_ON(&xe->drm, !hwe))
92 return false;
93
94 match = hwe->class != r->engine_class;
95 break;
96 case XE_RTP_MATCH_FUNC:
97 match = r->match_func(gt, hwe);
98 break;
99 default:
100 drm_warn(&xe->drm, "Invalid RTP match %u\n",
101 r->match_type);
102 match = false;
103 }
104
105 if (!match)
106 return false;
107 }
108
109 return true;
110}
111
112static void rtp_add_sr_entry(const struct xe_rtp_action *action,
113 struct xe_gt *gt,
114 u32 mmio_base,
115 struct xe_reg_sr *sr)
116{
117 struct xe_reg_sr_entry sr_entry = {
118 .reg = action->reg,
119 .clr_bits = action->clr_bits,
120 .set_bits = action->set_bits,
121 .read_mask = action->read_mask,
122 };
123
124 sr_entry.reg.addr += mmio_base;
125 xe_reg_sr_add(sr, &sr_entry, gt);
126}
127
128static bool rtp_process_one_sr(const struct xe_rtp_entry_sr *entry,
129 struct xe_device *xe, struct xe_gt *gt,
130 struct xe_hw_engine *hwe, struct xe_reg_sr *sr)
131{
132 const struct xe_rtp_action *action;
133 u32 mmio_base;
134 unsigned int i;
135
136 if (!rule_matches(xe, gt, hwe, entry->rules, entry->n_rules))
137 return false;
138
139 for (i = 0, action = &entry->actions[0]; i < entry->n_actions; action++, i++) {
140 if ((entry->flags & XE_RTP_ENTRY_FLAG_FOREACH_ENGINE) ||
141 (action->flags & XE_RTP_ACTION_FLAG_ENGINE_BASE))
142 mmio_base = hwe->mmio_base;
143 else
144 mmio_base = 0;
145
146 rtp_add_sr_entry(action, gt, mmio_base, sr);
147 }
148
149 return true;
150}
151
152static void rtp_get_context(struct xe_rtp_process_ctx *ctx,
153 struct xe_hw_engine **hwe,
154 struct xe_gt **gt,
155 struct xe_device **xe)
156{
157 switch (ctx->type) {
158 case XE_RTP_PROCESS_TYPE_GT:
159 *hwe = NULL;
160 *gt = ctx->gt;
161 *xe = gt_to_xe(*gt);
162 break;
163 case XE_RTP_PROCESS_TYPE_ENGINE:
164 *hwe = ctx->hwe;
165 *gt = (*hwe)->gt;
166 *xe = gt_to_xe(*gt);
167 break;
168 };
169}
170
171/**
172 * xe_rtp_process_ctx_enable_active_tracking - Enable tracking of active entries
173 *
174 * Set additional metadata to track what entries are considered "active", i.e.
175 * their rules match the condition. Bits are never cleared: entries with
176 * matching rules set the corresponding bit in the bitmap.
177 *
178 * @ctx: The context for processing the table
179 * @active_entries: bitmap to store the active entries
180 * @n_entries: number of entries to be processed
181 */
182void xe_rtp_process_ctx_enable_active_tracking(struct xe_rtp_process_ctx *ctx,
183 unsigned long *active_entries,
184 size_t n_entries)
185{
186 ctx->active_entries = active_entries;
187 ctx->n_entries = n_entries;
188}
189
190static void rtp_mark_active(struct xe_device *xe,
191 struct xe_rtp_process_ctx *ctx,
192 unsigned int first, unsigned int last)
193{
194 if (!ctx->active_entries)
195 return;
196
197 if (drm_WARN_ON(&xe->drm, last > ctx->n_entries))
198 return;
199
200 if (first == last)
201 bitmap_set(ctx->active_entries, first, 1);
202 else
203 bitmap_set(ctx->active_entries, first, last - first + 2);
204}
205
206/**
207 * xe_rtp_process_to_sr - Process all rtp @entries, adding the matching ones to
208 * the save-restore argument.
209 * @ctx: The context for processing the table, with one of device, gt or hwe
210 * @entries: Table with RTP definitions
211 * @sr: Save-restore struct where matching rules execute the action. This can be
212 * viewed as the "coalesced view" of multiple the tables. The bits for each
213 * register set are expected not to collide with previously added entries
214 *
215 * Walk the table pointed by @entries (with an empty sentinel) and add all
216 * entries with matching rules to @sr. If @hwe is not NULL, its mmio_base is
217 * used to calculate the right register offset
218 */
219void xe_rtp_process_to_sr(struct xe_rtp_process_ctx *ctx,
220 const struct xe_rtp_entry_sr *entries,
221 struct xe_reg_sr *sr)
222{
223 const struct xe_rtp_entry_sr *entry;
224 struct xe_hw_engine *hwe = NULL;
225 struct xe_gt *gt = NULL;
226 struct xe_device *xe = NULL;
227
228 rtp_get_context(ctx, &hwe, >, &xe);
229
230 for (entry = entries; entry && entry->name; entry++) {
231 bool match = false;
232
233 if (entry->flags & XE_RTP_ENTRY_FLAG_FOREACH_ENGINE) {
234 struct xe_hw_engine *each_hwe;
235 enum xe_hw_engine_id id;
236
237 for_each_hw_engine(each_hwe, gt, id)
238 match |= rtp_process_one_sr(entry, xe, gt,
239 each_hwe, sr);
240 } else {
241 match = rtp_process_one_sr(entry, xe, gt, hwe, sr);
242 }
243
244 if (match)
245 rtp_mark_active(xe, ctx, entry - entries,
246 entry - entries);
247 }
248}
249EXPORT_SYMBOL_IF_KUNIT(xe_rtp_process_to_sr);
250
251/**
252 * xe_rtp_process - Process all rtp @entries, without running any action
253 * @ctx: The context for processing the table, with one of device, gt or hwe
254 * @entries: Table with RTP definitions
255 *
256 * Walk the table pointed by @entries (with an empty sentinel), executing the
257 * rules. A few differences from xe_rtp_process_to_sr():
258 *
259 * 1. There is no action associated with each entry since this uses
260 * struct xe_rtp_entry. Its main use is for marking active workarounds via
261 * xe_rtp_process_ctx_enable_active_tracking().
262 * 2. There is support for OR operations by having entries with no name.
263 */
264void xe_rtp_process(struct xe_rtp_process_ctx *ctx,
265 const struct xe_rtp_entry *entries)
266{
267 const struct xe_rtp_entry *entry, *first_entry;
268 struct xe_hw_engine *hwe;
269 struct xe_gt *gt;
270 struct xe_device *xe;
271
272 rtp_get_context(ctx, &hwe, >, &xe);
273
274 first_entry = entries;
275 if (drm_WARN_ON(&xe->drm, !first_entry->name))
276 return;
277
278 for (entry = entries; entry && entry->rules; entry++) {
279 if (entry->name)
280 first_entry = entry;
281
282 if (!rule_matches(xe, gt, hwe, entry->rules, entry->n_rules))
283 continue;
284
285 /* Fast-forward entry, eliminating the OR'ed entries */
286 for (entry++; entry && entry->rules; entry++)
287 if (entry->name)
288 break;
289 entry--;
290
291 rtp_mark_active(xe, ctx, first_entry - entries,
292 entry - entries);
293 }
294}
295
296bool xe_rtp_match_even_instance(const struct xe_gt *gt,
297 const struct xe_hw_engine *hwe)
298{
299 return hwe->instance % 2 == 0;
300}
301
302bool xe_rtp_match_first_render_or_compute(const struct xe_gt *gt,
303 const struct xe_hw_engine *hwe)
304{
305 u64 render_compute_mask = gt->info.engine_mask &
306 (XE_HW_ENGINE_CCS_MASK | XE_HW_ENGINE_RCS_MASK);
307
308 return render_compute_mask &&
309 hwe->engine_id == __ffs(render_compute_mask);
310}
311
312bool xe_rtp_match_first_gslice_fused_off(const struct xe_gt *gt,
313 const struct xe_hw_engine *hwe)
314{
315 unsigned int dss_per_gslice = 4;
316 unsigned int dss;
317
318 if (drm_WARN(>_to_xe(gt)->drm, xe_dss_mask_empty(gt->fuse_topo.g_dss_mask),
319 "Checking gslice for platform without geometry pipeline\n"))
320 return false;
321
322 dss = xe_dss_mask_group_ffs(gt->fuse_topo.g_dss_mask, 0, 0);
323
324 return dss >= dss_per_gslice;
325}