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1/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 */
27#include <linux/i2c.h>
28#include <linux/slab.h>
29#include "drmP.h"
30#include "drm.h"
31#include "drm_crtc.h"
32#include "intel_drv.h"
33#include "i915_drm.h"
34#include "i915_drv.h"
35#include "dvo.h"
36
37#define SIL164_ADDR 0x38
38#define CH7xxx_ADDR 0x76
39#define TFP410_ADDR 0x38
40
41static const struct intel_dvo_device intel_dvo_devices[] = {
42 {
43 .type = INTEL_DVO_CHIP_TMDS,
44 .name = "sil164",
45 .dvo_reg = DVOC,
46 .slave_addr = SIL164_ADDR,
47 .dev_ops = &sil164_ops,
48 },
49 {
50 .type = INTEL_DVO_CHIP_TMDS,
51 .name = "ch7xxx",
52 .dvo_reg = DVOC,
53 .slave_addr = CH7xxx_ADDR,
54 .dev_ops = &ch7xxx_ops,
55 },
56 {
57 .type = INTEL_DVO_CHIP_LVDS,
58 .name = "ivch",
59 .dvo_reg = DVOA,
60 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
61 .dev_ops = &ivch_ops,
62 },
63 {
64 .type = INTEL_DVO_CHIP_TMDS,
65 .name = "tfp410",
66 .dvo_reg = DVOC,
67 .slave_addr = TFP410_ADDR,
68 .dev_ops = &tfp410_ops,
69 },
70 {
71 .type = INTEL_DVO_CHIP_LVDS,
72 .name = "ch7017",
73 .dvo_reg = DVOC,
74 .slave_addr = 0x75,
75 .gpio = GMBUS_PORT_DPB,
76 .dev_ops = &ch7017_ops,
77 }
78};
79
80struct intel_dvo {
81 struct intel_encoder base;
82
83 struct intel_dvo_device dev;
84
85 struct drm_display_mode *panel_fixed_mode;
86 bool panel_wants_dither;
87};
88
89static struct intel_dvo *enc_to_intel_dvo(struct drm_encoder *encoder)
90{
91 return container_of(encoder, struct intel_dvo, base.base);
92}
93
94static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
95{
96 return container_of(intel_attached_encoder(connector),
97 struct intel_dvo, base);
98}
99
100static void intel_dvo_dpms(struct drm_encoder *encoder, int mode)
101{
102 struct drm_i915_private *dev_priv = encoder->dev->dev_private;
103 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
104 u32 dvo_reg = intel_dvo->dev.dvo_reg;
105 u32 temp = I915_READ(dvo_reg);
106
107 if (mode == DRM_MODE_DPMS_ON) {
108 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
109 I915_READ(dvo_reg);
110 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode);
111 } else {
112 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode);
113 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
114 I915_READ(dvo_reg);
115 }
116}
117
118static int intel_dvo_mode_valid(struct drm_connector *connector,
119 struct drm_display_mode *mode)
120{
121 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
122
123 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
124 return MODE_NO_DBLESCAN;
125
126 /* XXX: Validate clock range */
127
128 if (intel_dvo->panel_fixed_mode) {
129 if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
130 return MODE_PANEL;
131 if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
132 return MODE_PANEL;
133 }
134
135 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
136}
137
138static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
139 struct drm_display_mode *mode,
140 struct drm_display_mode *adjusted_mode)
141{
142 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
143
144 /* If we have timings from the BIOS for the panel, put them in
145 * to the adjusted mode. The CRTC will be set up for this mode,
146 * with the panel scaling set up to source from the H/VDisplay
147 * of the original mode.
148 */
149 if (intel_dvo->panel_fixed_mode != NULL) {
150#define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
151 C(hdisplay);
152 C(hsync_start);
153 C(hsync_end);
154 C(htotal);
155 C(vdisplay);
156 C(vsync_start);
157 C(vsync_end);
158 C(vtotal);
159 C(clock);
160 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
161#undef C
162 }
163
164 if (intel_dvo->dev.dev_ops->mode_fixup)
165 return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev, mode, adjusted_mode);
166
167 return true;
168}
169
170static void intel_dvo_mode_set(struct drm_encoder *encoder,
171 struct drm_display_mode *mode,
172 struct drm_display_mode *adjusted_mode)
173{
174 struct drm_device *dev = encoder->dev;
175 struct drm_i915_private *dev_priv = dev->dev_private;
176 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
177 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
178 int pipe = intel_crtc->pipe;
179 u32 dvo_val;
180 u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
181 int dpll_reg = DPLL(pipe);
182
183 switch (dvo_reg) {
184 case DVOA:
185 default:
186 dvo_srcdim_reg = DVOA_SRCDIM;
187 break;
188 case DVOB:
189 dvo_srcdim_reg = DVOB_SRCDIM;
190 break;
191 case DVOC:
192 dvo_srcdim_reg = DVOC_SRCDIM;
193 break;
194 }
195
196 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, mode, adjusted_mode);
197
198 /* Save the data order, since I don't know what it should be set to. */
199 dvo_val = I915_READ(dvo_reg) &
200 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
201 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
202 DVO_BLANK_ACTIVE_HIGH;
203
204 if (pipe == 1)
205 dvo_val |= DVO_PIPE_B_SELECT;
206 dvo_val |= DVO_PIPE_STALL;
207 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
208 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
209 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
210 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
211
212 I915_WRITE(dpll_reg, I915_READ(dpll_reg) | DPLL_DVO_HIGH_SPEED);
213
214 /*I915_WRITE(DVOB_SRCDIM,
215 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
216 (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
217 I915_WRITE(dvo_srcdim_reg,
218 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
219 (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
220 /*I915_WRITE(DVOB, dvo_val);*/
221 I915_WRITE(dvo_reg, dvo_val);
222}
223
224/**
225 * Detect the output connection on our DVO device.
226 *
227 * Unimplemented.
228 */
229static enum drm_connector_status
230intel_dvo_detect(struct drm_connector *connector, bool force)
231{
232 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
233 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
234}
235
236static int intel_dvo_get_modes(struct drm_connector *connector)
237{
238 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
239 struct drm_i915_private *dev_priv = connector->dev->dev_private;
240
241 /* We should probably have an i2c driver get_modes function for those
242 * devices which will have a fixed set of modes determined by the chip
243 * (TV-out, for example), but for now with just TMDS and LVDS,
244 * that's not the case.
245 */
246 intel_ddc_get_modes(connector,
247 &dev_priv->gmbus[GMBUS_PORT_DPC].adapter);
248 if (!list_empty(&connector->probed_modes))
249 return 1;
250
251 if (intel_dvo->panel_fixed_mode != NULL) {
252 struct drm_display_mode *mode;
253 mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
254 if (mode) {
255 drm_mode_probed_add(connector, mode);
256 return 1;
257 }
258 }
259
260 return 0;
261}
262
263static void intel_dvo_destroy(struct drm_connector *connector)
264{
265 drm_sysfs_connector_remove(connector);
266 drm_connector_cleanup(connector);
267 kfree(connector);
268}
269
270static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
271 .dpms = intel_dvo_dpms,
272 .mode_fixup = intel_dvo_mode_fixup,
273 .prepare = intel_encoder_prepare,
274 .mode_set = intel_dvo_mode_set,
275 .commit = intel_encoder_commit,
276};
277
278static const struct drm_connector_funcs intel_dvo_connector_funcs = {
279 .dpms = drm_helper_connector_dpms,
280 .detect = intel_dvo_detect,
281 .destroy = intel_dvo_destroy,
282 .fill_modes = drm_helper_probe_single_connector_modes,
283};
284
285static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
286 .mode_valid = intel_dvo_mode_valid,
287 .get_modes = intel_dvo_get_modes,
288 .best_encoder = intel_best_encoder,
289};
290
291static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
292{
293 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
294
295 if (intel_dvo->dev.dev_ops->destroy)
296 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
297
298 kfree(intel_dvo->panel_fixed_mode);
299
300 intel_encoder_destroy(encoder);
301}
302
303static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
304 .destroy = intel_dvo_enc_destroy,
305};
306
307/**
308 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
309 *
310 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
311 * chip being on DVOB/C and having multiple pipes.
312 */
313static struct drm_display_mode *
314intel_dvo_get_current_mode(struct drm_connector *connector)
315{
316 struct drm_device *dev = connector->dev;
317 struct drm_i915_private *dev_priv = dev->dev_private;
318 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
319 uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
320 struct drm_display_mode *mode = NULL;
321
322 /* If the DVO port is active, that'll be the LVDS, so we can pull out
323 * its timings to get how the BIOS set up the panel.
324 */
325 if (dvo_val & DVO_ENABLE) {
326 struct drm_crtc *crtc;
327 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
328
329 crtc = intel_get_crtc_for_pipe(dev, pipe);
330 if (crtc) {
331 mode = intel_crtc_mode_get(dev, crtc);
332 if (mode) {
333 mode->type |= DRM_MODE_TYPE_PREFERRED;
334 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
335 mode->flags |= DRM_MODE_FLAG_PHSYNC;
336 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
337 mode->flags |= DRM_MODE_FLAG_PVSYNC;
338 }
339 }
340 }
341
342 return mode;
343}
344
345void intel_dvo_init(struct drm_device *dev)
346{
347 struct drm_i915_private *dev_priv = dev->dev_private;
348 struct intel_encoder *intel_encoder;
349 struct intel_dvo *intel_dvo;
350 struct intel_connector *intel_connector;
351 int i;
352 int encoder_type = DRM_MODE_ENCODER_NONE;
353
354 intel_dvo = kzalloc(sizeof(struct intel_dvo), GFP_KERNEL);
355 if (!intel_dvo)
356 return;
357
358 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
359 if (!intel_connector) {
360 kfree(intel_dvo);
361 return;
362 }
363
364 intel_encoder = &intel_dvo->base;
365 drm_encoder_init(dev, &intel_encoder->base,
366 &intel_dvo_enc_funcs, encoder_type);
367
368 /* Now, try to find a controller */
369 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
370 struct drm_connector *connector = &intel_connector->base;
371 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
372 struct i2c_adapter *i2c;
373 int gpio;
374
375 /* Allow the I2C driver info to specify the GPIO to be used in
376 * special cases, but otherwise default to what's defined
377 * in the spec.
378 */
379 if (dvo->gpio != 0)
380 gpio = dvo->gpio;
381 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
382 gpio = GMBUS_PORT_SSC;
383 else
384 gpio = GMBUS_PORT_DPB;
385
386 /* Set up the I2C bus necessary for the chip we're probing.
387 * It appears that everything is on GPIOE except for panels
388 * on i830 laptops, which are on GPIOB (DVOA).
389 */
390 i2c = &dev_priv->gmbus[gpio].adapter;
391
392 intel_dvo->dev = *dvo;
393 if (!dvo->dev_ops->init(&intel_dvo->dev, i2c))
394 continue;
395
396 intel_encoder->type = INTEL_OUTPUT_DVO;
397 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
398 switch (dvo->type) {
399 case INTEL_DVO_CHIP_TMDS:
400 intel_encoder->clone_mask =
401 (1 << INTEL_DVO_TMDS_CLONE_BIT) |
402 (1 << INTEL_ANALOG_CLONE_BIT);
403 drm_connector_init(dev, connector,
404 &intel_dvo_connector_funcs,
405 DRM_MODE_CONNECTOR_DVII);
406 encoder_type = DRM_MODE_ENCODER_TMDS;
407 break;
408 case INTEL_DVO_CHIP_LVDS:
409 intel_encoder->clone_mask =
410 (1 << INTEL_DVO_LVDS_CLONE_BIT);
411 drm_connector_init(dev, connector,
412 &intel_dvo_connector_funcs,
413 DRM_MODE_CONNECTOR_LVDS);
414 encoder_type = DRM_MODE_ENCODER_LVDS;
415 break;
416 }
417
418 drm_connector_helper_add(connector,
419 &intel_dvo_connector_helper_funcs);
420 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
421 connector->interlace_allowed = false;
422 connector->doublescan_allowed = false;
423
424 drm_encoder_helper_add(&intel_encoder->base,
425 &intel_dvo_helper_funcs);
426
427 intel_connector_attach_encoder(intel_connector, intel_encoder);
428 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
429 /* For our LVDS chipsets, we should hopefully be able
430 * to dig the fixed panel mode out of the BIOS data.
431 * However, it's in a different format from the BIOS
432 * data on chipsets with integrated LVDS (stored in AIM
433 * headers, likely), so for now, just get the current
434 * mode being output through DVO.
435 */
436 intel_dvo->panel_fixed_mode =
437 intel_dvo_get_current_mode(connector);
438 intel_dvo->panel_wants_dither = true;
439 }
440
441 drm_sysfs_connector_add(connector);
442 return;
443 }
444
445 drm_encoder_cleanup(&intel_encoder->base);
446 kfree(intel_dvo);
447 kfree(intel_connector);
448}