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1// SPDX-License-Identifier: MIT
2/*
3 * Copyright © 2020 Intel Corporation
4 */
5
6#include <linux/string_helpers.h>
7
8#include <drm/drm_debugfs.h>
9#include <drm/drm_edid.h>
10#include <drm/drm_fourcc.h>
11
12#include "hsw_ips.h"
13#include "i915_debugfs.h"
14#include "i915_irq.h"
15#include "i915_reg.h"
16#include "intel_crtc.h"
17#include "intel_de.h"
18#include "intel_crtc_state_dump.h"
19#include "intel_display_debugfs.h"
20#include "intel_display_debugfs_params.h"
21#include "intel_display_power.h"
22#include "intel_display_power_well.h"
23#include "intel_display_types.h"
24#include "intel_dmc.h"
25#include "intel_dp.h"
26#include "intel_dp_mst.h"
27#include "intel_drrs.h"
28#include "intel_fbc.h"
29#include "intel_fbdev.h"
30#include "intel_hdcp.h"
31#include "intel_hdmi.h"
32#include "intel_hotplug.h"
33#include "intel_panel.h"
34#include "intel_psr.h"
35#include "intel_psr_regs.h"
36#include "intel_wm.h"
37
38static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node)
39{
40 return to_i915(node->minor->dev);
41}
42
43static int i915_frontbuffer_tracking(struct seq_file *m, void *unused)
44{
45 struct drm_i915_private *dev_priv = node_to_i915(m->private);
46
47 spin_lock(&dev_priv->display.fb_tracking.lock);
48
49 seq_printf(m, "FB tracking busy bits: 0x%08x\n",
50 dev_priv->display.fb_tracking.busy_bits);
51
52 seq_printf(m, "FB tracking flip bits: 0x%08x\n",
53 dev_priv->display.fb_tracking.flip_bits);
54
55 spin_unlock(&dev_priv->display.fb_tracking.lock);
56
57 return 0;
58}
59
60static int i915_sr_status(struct seq_file *m, void *unused)
61{
62 struct drm_i915_private *dev_priv = node_to_i915(m->private);
63 intel_wakeref_t wakeref;
64 bool sr_enabled = false;
65
66 wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
67
68 if (DISPLAY_VER(dev_priv) >= 9)
69 /* no global SR status; inspect per-plane WM */;
70 else if (HAS_PCH_SPLIT(dev_priv))
71 sr_enabled = intel_de_read(dev_priv, WM1_LP_ILK) & WM_LP_ENABLE;
72 else if (IS_I965GM(dev_priv) || IS_G4X(dev_priv) ||
73 IS_I945G(dev_priv) || IS_I945GM(dev_priv))
74 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF) & FW_BLC_SELF_EN;
75 else if (IS_I915GM(dev_priv))
76 sr_enabled = intel_de_read(dev_priv, INSTPM) & INSTPM_SELF_EN;
77 else if (IS_PINEVIEW(dev_priv))
78 sr_enabled = intel_de_read(dev_priv, DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
79 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
80 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
81
82 intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref);
83
84 seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled));
85
86 return 0;
87}
88
89static int i915_opregion(struct seq_file *m, void *unused)
90{
91 struct drm_i915_private *i915 = node_to_i915(m->private);
92 struct intel_opregion *opregion = &i915->display.opregion;
93
94 if (opregion->header)
95 seq_write(m, opregion->header, OPREGION_SIZE);
96
97 return 0;
98}
99
100static int i915_vbt(struct seq_file *m, void *unused)
101{
102 struct drm_i915_private *i915 = node_to_i915(m->private);
103 struct intel_opregion *opregion = &i915->display.opregion;
104
105 if (opregion->vbt)
106 seq_write(m, opregion->vbt, opregion->vbt_size);
107
108 return 0;
109}
110
111static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
112{
113 struct drm_i915_private *dev_priv = node_to_i915(m->private);
114 struct intel_framebuffer *fbdev_fb = NULL;
115 struct drm_framebuffer *drm_fb;
116
117#ifdef CONFIG_DRM_FBDEV_EMULATION
118 fbdev_fb = intel_fbdev_framebuffer(dev_priv->display.fbdev.fbdev);
119 if (fbdev_fb) {
120 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
121 fbdev_fb->base.width,
122 fbdev_fb->base.height,
123 fbdev_fb->base.format->depth,
124 fbdev_fb->base.format->cpp[0] * 8,
125 fbdev_fb->base.modifier,
126 drm_framebuffer_read_refcount(&fbdev_fb->base));
127 i915_debugfs_describe_obj(m, intel_fb_obj(&fbdev_fb->base));
128 seq_putc(m, '\n');
129 }
130#endif
131
132 mutex_lock(&dev_priv->drm.mode_config.fb_lock);
133 drm_for_each_fb(drm_fb, &dev_priv->drm) {
134 struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb);
135 if (fb == fbdev_fb)
136 continue;
137
138 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
139 fb->base.width,
140 fb->base.height,
141 fb->base.format->depth,
142 fb->base.format->cpp[0] * 8,
143 fb->base.modifier,
144 drm_framebuffer_read_refcount(&fb->base));
145 i915_debugfs_describe_obj(m, intel_fb_obj(&fb->base));
146 seq_putc(m, '\n');
147 }
148 mutex_unlock(&dev_priv->drm.mode_config.fb_lock);
149
150 return 0;
151}
152
153static int i915_power_domain_info(struct seq_file *m, void *unused)
154{
155 struct drm_i915_private *i915 = node_to_i915(m->private);
156
157 intel_display_power_debug(i915, m);
158
159 return 0;
160}
161
162static void intel_seq_print_mode(struct seq_file *m, int tabs,
163 const struct drm_display_mode *mode)
164{
165 int i;
166
167 for (i = 0; i < tabs; i++)
168 seq_putc(m, '\t');
169
170 seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode));
171}
172
173static void intel_encoder_info(struct seq_file *m,
174 struct intel_crtc *crtc,
175 struct intel_encoder *encoder)
176{
177 struct drm_i915_private *dev_priv = node_to_i915(m->private);
178 struct drm_connector_list_iter conn_iter;
179 struct drm_connector *connector;
180
181 seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n",
182 encoder->base.base.id, encoder->base.name);
183
184 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
185 drm_for_each_connector_iter(connector, &conn_iter) {
186 const struct drm_connector_state *conn_state =
187 connector->state;
188
189 if (conn_state->best_encoder != &encoder->base)
190 continue;
191
192 seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n",
193 connector->base.id, connector->name);
194 }
195 drm_connector_list_iter_end(&conn_iter);
196}
197
198static void intel_panel_info(struct seq_file *m,
199 struct intel_connector *connector)
200{
201 const struct drm_display_mode *fixed_mode;
202
203 if (list_empty(&connector->panel.fixed_modes))
204 return;
205
206 seq_puts(m, "\tfixed modes:\n");
207
208 list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head)
209 intel_seq_print_mode(m, 2, fixed_mode);
210}
211
212static void intel_hdcp_info(struct seq_file *m,
213 struct intel_connector *intel_connector)
214{
215 bool hdcp_cap, hdcp2_cap;
216
217 if (!intel_connector->hdcp.shim) {
218 seq_puts(m, "No Connector Support");
219 goto out;
220 }
221
222 hdcp_cap = intel_hdcp_capable(intel_connector);
223 hdcp2_cap = intel_hdcp2_capable(intel_connector);
224
225 if (hdcp_cap)
226 seq_puts(m, "HDCP1.4 ");
227 if (hdcp2_cap)
228 seq_puts(m, "HDCP2.2 ");
229
230 if (!hdcp_cap && !hdcp2_cap)
231 seq_puts(m, "None");
232
233out:
234 seq_puts(m, "\n");
235}
236
237static void intel_dp_info(struct seq_file *m, struct intel_connector *connector)
238{
239 struct intel_encoder *intel_encoder = intel_attached_encoder(connector);
240 struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder);
241
242 seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]);
243 seq_printf(m, "\taudio support: %s\n",
244 str_yes_no(connector->base.display_info.has_audio));
245
246 drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports,
247 connector->detect_edid, &intel_dp->aux);
248}
249
250static void intel_dp_mst_info(struct seq_file *m,
251 struct intel_connector *connector)
252{
253 bool has_audio = connector->base.display_info.has_audio;
254
255 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
256}
257
258static void intel_hdmi_info(struct seq_file *m,
259 struct intel_connector *connector)
260{
261 bool has_audio = connector->base.display_info.has_audio;
262
263 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
264}
265
266static void intel_connector_info(struct seq_file *m,
267 struct drm_connector *connector)
268{
269 struct intel_connector *intel_connector = to_intel_connector(connector);
270 const struct drm_connector_state *conn_state = connector->state;
271 struct intel_encoder *encoder =
272 to_intel_encoder(conn_state->best_encoder);
273 const struct drm_display_mode *mode;
274
275 seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n",
276 connector->base.id, connector->name,
277 drm_get_connector_status_name(connector->status));
278
279 if (connector->status == connector_status_disconnected)
280 return;
281
282 seq_printf(m, "\tphysical dimensions: %dx%dmm\n",
283 connector->display_info.width_mm,
284 connector->display_info.height_mm);
285 seq_printf(m, "\tsubpixel order: %s\n",
286 drm_get_subpixel_order_name(connector->display_info.subpixel_order));
287 seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev);
288
289 if (!encoder)
290 return;
291
292 switch (connector->connector_type) {
293 case DRM_MODE_CONNECTOR_DisplayPort:
294 case DRM_MODE_CONNECTOR_eDP:
295 if (encoder->type == INTEL_OUTPUT_DP_MST)
296 intel_dp_mst_info(m, intel_connector);
297 else
298 intel_dp_info(m, intel_connector);
299 break;
300 case DRM_MODE_CONNECTOR_HDMIA:
301 if (encoder->type == INTEL_OUTPUT_HDMI ||
302 encoder->type == INTEL_OUTPUT_DDI)
303 intel_hdmi_info(m, intel_connector);
304 break;
305 default:
306 break;
307 }
308
309 seq_puts(m, "\tHDCP version: ");
310 intel_hdcp_info(m, intel_connector);
311
312 seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc);
313
314 intel_panel_info(m, intel_connector);
315
316 seq_printf(m, "\tmodes:\n");
317 list_for_each_entry(mode, &connector->modes, head)
318 intel_seq_print_mode(m, 2, mode);
319}
320
321static const char *plane_type(enum drm_plane_type type)
322{
323 switch (type) {
324 case DRM_PLANE_TYPE_OVERLAY:
325 return "OVL";
326 case DRM_PLANE_TYPE_PRIMARY:
327 return "PRI";
328 case DRM_PLANE_TYPE_CURSOR:
329 return "CUR";
330 /*
331 * Deliberately omitting default: to generate compiler warnings
332 * when a new drm_plane_type gets added.
333 */
334 }
335
336 return "unknown";
337}
338
339static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation)
340{
341 /*
342 * According to doc only one DRM_MODE_ROTATE_ is allowed but this
343 * will print them all to visualize if the values are misused
344 */
345 snprintf(buf, bufsize,
346 "%s%s%s%s%s%s(0x%08x)",
347 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "",
348 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "",
349 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "",
350 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "",
351 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "",
352 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "",
353 rotation);
354}
355
356static const char *plane_visibility(const struct intel_plane_state *plane_state)
357{
358 if (plane_state->uapi.visible)
359 return "visible";
360
361 if (plane_state->planar_slave)
362 return "planar-slave";
363
364 return "hidden";
365}
366
367static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane)
368{
369 const struct intel_plane_state *plane_state =
370 to_intel_plane_state(plane->base.state);
371 const struct drm_framebuffer *fb = plane_state->uapi.fb;
372 struct drm_rect src, dst;
373 char rot_str[48];
374
375 src = drm_plane_state_src(&plane_state->uapi);
376 dst = drm_plane_state_dest(&plane_state->uapi);
377
378 plane_rotation(rot_str, sizeof(rot_str),
379 plane_state->uapi.rotation);
380
381 seq_puts(m, "\t\tuapi: [FB:");
382 if (fb)
383 seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id,
384 &fb->format->format, fb->modifier, fb->width,
385 fb->height);
386 else
387 seq_puts(m, "0] n/a,0x0,0x0,");
388 seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT
389 ", rotation=%s\n", plane_visibility(plane_state),
390 DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str);
391
392 if (plane_state->planar_linked_plane)
393 seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n",
394 plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name,
395 plane_state->planar_slave ? "slave" : "master");
396}
397
398static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane)
399{
400 const struct intel_plane_state *plane_state =
401 to_intel_plane_state(plane->base.state);
402 const struct drm_framebuffer *fb = plane_state->hw.fb;
403 char rot_str[48];
404
405 if (!fb)
406 return;
407
408 plane_rotation(rot_str, sizeof(rot_str),
409 plane_state->hw.rotation);
410
411 seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src="
412 DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n",
413 fb->base.id, &fb->format->format,
414 fb->modifier, fb->width, fb->height,
415 str_yes_no(plane_state->uapi.visible),
416 DRM_RECT_FP_ARG(&plane_state->uapi.src),
417 DRM_RECT_ARG(&plane_state->uapi.dst),
418 rot_str);
419}
420
421static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc)
422{
423 struct drm_i915_private *dev_priv = node_to_i915(m->private);
424 struct intel_plane *plane;
425
426 for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) {
427 seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n",
428 plane->base.base.id, plane->base.name,
429 plane_type(plane->base.type));
430 intel_plane_uapi_info(m, plane);
431 intel_plane_hw_info(m, plane);
432 }
433}
434
435static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc)
436{
437 const struct intel_crtc_state *crtc_state =
438 to_intel_crtc_state(crtc->base.state);
439 int num_scalers = crtc->num_scalers;
440 int i;
441
442 /* Not all platformas have a scaler */
443 if (num_scalers) {
444 seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d",
445 num_scalers,
446 crtc_state->scaler_state.scaler_users,
447 crtc_state->scaler_state.scaler_id,
448 crtc_state->hw.scaling_filter);
449
450 for (i = 0; i < num_scalers; i++) {
451 const struct intel_scaler *sc =
452 &crtc_state->scaler_state.scalers[i];
453
454 seq_printf(m, ", scalers[%d]: use=%s, mode=%x",
455 i, str_yes_no(sc->in_use), sc->mode);
456 }
457 seq_puts(m, "\n");
458 } else {
459 seq_puts(m, "\tNo scalers available on this platform\n");
460 }
461}
462
463#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE)
464static void crtc_updates_info(struct seq_file *m,
465 struct intel_crtc *crtc,
466 const char *hdr)
467{
468 u64 count;
469 int row;
470
471 count = 0;
472 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++)
473 count += crtc->debug.vbl.times[row];
474 seq_printf(m, "%sUpdates: %llu\n", hdr, count);
475 if (!count)
476 return;
477
478 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) {
479 char columns[80] = " |";
480 unsigned int x;
481
482 if (row & 1) {
483 const char *units;
484
485 if (row > 10) {
486 x = 1000000;
487 units = "ms";
488 } else {
489 x = 1000;
490 units = "us";
491 }
492
493 snprintf(columns, sizeof(columns), "%4ld%s |",
494 DIV_ROUND_CLOSEST(BIT(row + 9), x), units);
495 }
496
497 if (crtc->debug.vbl.times[row]) {
498 x = ilog2(crtc->debug.vbl.times[row]);
499 memset(columns + 8, '*', x);
500 columns[8 + x] = '\0';
501 }
502
503 seq_printf(m, "%s%s\n", hdr, columns);
504 }
505
506 seq_printf(m, "%sMin update: %lluns\n",
507 hdr, crtc->debug.vbl.min);
508 seq_printf(m, "%sMax update: %lluns\n",
509 hdr, crtc->debug.vbl.max);
510 seq_printf(m, "%sAverage update: %lluns\n",
511 hdr, div64_u64(crtc->debug.vbl.sum, count));
512 seq_printf(m, "%sOverruns > %uus: %u\n",
513 hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over);
514}
515
516static int crtc_updates_show(struct seq_file *m, void *data)
517{
518 crtc_updates_info(m, m->private, "");
519 return 0;
520}
521
522static int crtc_updates_open(struct inode *inode, struct file *file)
523{
524 return single_open(file, crtc_updates_show, inode->i_private);
525}
526
527static ssize_t crtc_updates_write(struct file *file,
528 const char __user *ubuf,
529 size_t len, loff_t *offp)
530{
531 struct seq_file *m = file->private_data;
532 struct intel_crtc *crtc = m->private;
533
534 /* May race with an update. Meh. */
535 memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl));
536
537 return len;
538}
539
540static const struct file_operations crtc_updates_fops = {
541 .owner = THIS_MODULE,
542 .open = crtc_updates_open,
543 .read = seq_read,
544 .llseek = seq_lseek,
545 .release = single_release,
546 .write = crtc_updates_write
547};
548
549static void crtc_updates_add(struct intel_crtc *crtc)
550{
551 debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry,
552 crtc, &crtc_updates_fops);
553}
554
555#else
556static void crtc_updates_info(struct seq_file *m,
557 struct intel_crtc *crtc,
558 const char *hdr)
559{
560}
561
562static void crtc_updates_add(struct intel_crtc *crtc)
563{
564}
565#endif
566
567static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc)
568{
569 struct drm_i915_private *dev_priv = node_to_i915(m->private);
570 const struct intel_crtc_state *crtc_state =
571 to_intel_crtc_state(crtc->base.state);
572 struct intel_encoder *encoder;
573
574 seq_printf(m, "[CRTC:%d:%s]:\n",
575 crtc->base.base.id, crtc->base.name);
576
577 seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n",
578 str_yes_no(crtc_state->uapi.enable),
579 str_yes_no(crtc_state->uapi.active),
580 DRM_MODE_ARG(&crtc_state->uapi.mode));
581
582 seq_printf(m, "\thw: enable=%s, active=%s\n",
583 str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active));
584 seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n",
585 DRM_MODE_ARG(&crtc_state->hw.adjusted_mode));
586 seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n",
587 DRM_MODE_ARG(&crtc_state->hw.pipe_mode));
588
589 seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n",
590 DRM_RECT_ARG(&crtc_state->pipe_src),
591 str_yes_no(crtc_state->dither), crtc_state->pipe_bpp);
592
593 intel_scaler_info(m, crtc);
594
595 if (crtc_state->bigjoiner_pipes)
596 seq_printf(m, "\tLinked to 0x%x pipes as a %s\n",
597 crtc_state->bigjoiner_pipes,
598 intel_crtc_is_bigjoiner_slave(crtc_state) ? "slave" : "master");
599
600 for_each_intel_encoder_mask(&dev_priv->drm, encoder,
601 crtc_state->uapi.encoder_mask)
602 intel_encoder_info(m, crtc, encoder);
603
604 intel_plane_info(m, crtc);
605
606 seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n",
607 str_yes_no(!crtc->cpu_fifo_underrun_disabled),
608 str_yes_no(!crtc->pch_fifo_underrun_disabled));
609
610 crtc_updates_info(m, crtc, "\t");
611}
612
613static int i915_display_info(struct seq_file *m, void *unused)
614{
615 struct drm_i915_private *dev_priv = node_to_i915(m->private);
616 struct intel_crtc *crtc;
617 struct drm_connector *connector;
618 struct drm_connector_list_iter conn_iter;
619 intel_wakeref_t wakeref;
620
621 wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
622
623 drm_modeset_lock_all(&dev_priv->drm);
624
625 seq_printf(m, "CRTC info\n");
626 seq_printf(m, "---------\n");
627 for_each_intel_crtc(&dev_priv->drm, crtc)
628 intel_crtc_info(m, crtc);
629
630 seq_printf(m, "\n");
631 seq_printf(m, "Connector info\n");
632 seq_printf(m, "--------------\n");
633 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
634 drm_for_each_connector_iter(connector, &conn_iter)
635 intel_connector_info(m, connector);
636 drm_connector_list_iter_end(&conn_iter);
637
638 drm_modeset_unlock_all(&dev_priv->drm);
639
640 intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
641
642 return 0;
643}
644
645static int i915_display_capabilities(struct seq_file *m, void *unused)
646{
647 struct drm_i915_private *i915 = node_to_i915(m->private);
648 struct drm_printer p = drm_seq_file_printer(m);
649
650 intel_display_device_info_print(DISPLAY_INFO(i915),
651 DISPLAY_RUNTIME_INFO(i915), &p);
652
653 return 0;
654}
655
656static int i915_shared_dplls_info(struct seq_file *m, void *unused)
657{
658 struct drm_i915_private *dev_priv = node_to_i915(m->private);
659 struct intel_shared_dpll *pll;
660 int i;
661
662 drm_modeset_lock_all(&dev_priv->drm);
663
664 seq_printf(m, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n",
665 dev_priv->display.dpll.ref_clks.nssc,
666 dev_priv->display.dpll.ref_clks.ssc);
667
668 for_each_shared_dpll(dev_priv, pll, i) {
669 seq_printf(m, "DPLL%i: %s, id: %i\n", pll->index,
670 pll->info->name, pll->info->id);
671 seq_printf(m, " pipe_mask: 0x%x, active: 0x%x, on: %s\n",
672 pll->state.pipe_mask, pll->active_mask,
673 str_yes_no(pll->on));
674 seq_printf(m, " tracked hardware state:\n");
675 seq_printf(m, " dpll: 0x%08x\n", pll->state.hw_state.dpll);
676 seq_printf(m, " dpll_md: 0x%08x\n",
677 pll->state.hw_state.dpll_md);
678 seq_printf(m, " fp0: 0x%08x\n", pll->state.hw_state.fp0);
679 seq_printf(m, " fp1: 0x%08x\n", pll->state.hw_state.fp1);
680 seq_printf(m, " wrpll: 0x%08x\n", pll->state.hw_state.wrpll);
681 seq_printf(m, " cfgcr0: 0x%08x\n", pll->state.hw_state.cfgcr0);
682 seq_printf(m, " cfgcr1: 0x%08x\n", pll->state.hw_state.cfgcr1);
683 seq_printf(m, " div0: 0x%08x\n", pll->state.hw_state.div0);
684 seq_printf(m, " mg_refclkin_ctl: 0x%08x\n",
685 pll->state.hw_state.mg_refclkin_ctl);
686 seq_printf(m, " mg_clktop2_coreclkctl1: 0x%08x\n",
687 pll->state.hw_state.mg_clktop2_coreclkctl1);
688 seq_printf(m, " mg_clktop2_hsclkctl: 0x%08x\n",
689 pll->state.hw_state.mg_clktop2_hsclkctl);
690 seq_printf(m, " mg_pll_div0: 0x%08x\n",
691 pll->state.hw_state.mg_pll_div0);
692 seq_printf(m, " mg_pll_div1: 0x%08x\n",
693 pll->state.hw_state.mg_pll_div1);
694 seq_printf(m, " mg_pll_lf: 0x%08x\n",
695 pll->state.hw_state.mg_pll_lf);
696 seq_printf(m, " mg_pll_frac_lock: 0x%08x\n",
697 pll->state.hw_state.mg_pll_frac_lock);
698 seq_printf(m, " mg_pll_ssc: 0x%08x\n",
699 pll->state.hw_state.mg_pll_ssc);
700 seq_printf(m, " mg_pll_bias: 0x%08x\n",
701 pll->state.hw_state.mg_pll_bias);
702 seq_printf(m, " mg_pll_tdc_coldst_bias: 0x%08x\n",
703 pll->state.hw_state.mg_pll_tdc_coldst_bias);
704 }
705 drm_modeset_unlock_all(&dev_priv->drm);
706
707 return 0;
708}
709
710static int i915_ddb_info(struct seq_file *m, void *unused)
711{
712 struct drm_i915_private *dev_priv = node_to_i915(m->private);
713 struct skl_ddb_entry *entry;
714 struct intel_crtc *crtc;
715
716 if (DISPLAY_VER(dev_priv) < 9)
717 return -ENODEV;
718
719 drm_modeset_lock_all(&dev_priv->drm);
720
721 seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size");
722
723 for_each_intel_crtc(&dev_priv->drm, crtc) {
724 struct intel_crtc_state *crtc_state =
725 to_intel_crtc_state(crtc->base.state);
726 enum pipe pipe = crtc->pipe;
727 enum plane_id plane_id;
728
729 seq_printf(m, "Pipe %c\n", pipe_name(pipe));
730
731 for_each_plane_id_on_crtc(crtc, plane_id) {
732 entry = &crtc_state->wm.skl.plane_ddb[plane_id];
733 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1,
734 entry->start, entry->end,
735 skl_ddb_entry_size(entry));
736 }
737
738 entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR];
739 seq_printf(m, " %-13s%8u%8u%8u\n", "Cursor", entry->start,
740 entry->end, skl_ddb_entry_size(entry));
741 }
742
743 drm_modeset_unlock_all(&dev_priv->drm);
744
745 return 0;
746}
747
748static bool
749intel_lpsp_power_well_enabled(struct drm_i915_private *i915,
750 enum i915_power_well_id power_well_id)
751{
752 intel_wakeref_t wakeref;
753 bool is_enabled;
754
755 wakeref = intel_runtime_pm_get(&i915->runtime_pm);
756 is_enabled = intel_display_power_well_is_enabled(i915,
757 power_well_id);
758 intel_runtime_pm_put(&i915->runtime_pm, wakeref);
759
760 return is_enabled;
761}
762
763static int i915_lpsp_status(struct seq_file *m, void *unused)
764{
765 struct drm_i915_private *i915 = node_to_i915(m->private);
766 bool lpsp_enabled = false;
767
768 if (DISPLAY_VER(i915) >= 13 || IS_DISPLAY_VER(i915, 9, 10)) {
769 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, SKL_DISP_PW_2);
770 } else if (IS_DISPLAY_VER(i915, 11, 12)) {
771 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, ICL_DISP_PW_3);
772 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
773 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, HSW_DISP_PW_GLOBAL);
774 } else {
775 seq_puts(m, "LPSP: not supported\n");
776 return 0;
777 }
778
779 seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled));
780
781 return 0;
782}
783
784static int i915_dp_mst_info(struct seq_file *m, void *unused)
785{
786 struct drm_i915_private *dev_priv = node_to_i915(m->private);
787 struct intel_encoder *intel_encoder;
788 struct intel_digital_port *dig_port;
789 struct drm_connector *connector;
790 struct drm_connector_list_iter conn_iter;
791
792 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
793 drm_for_each_connector_iter(connector, &conn_iter) {
794 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
795 continue;
796
797 intel_encoder = intel_attached_encoder(to_intel_connector(connector));
798 if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST)
799 continue;
800
801 dig_port = enc_to_dig_port(intel_encoder);
802 if (!intel_dp_mst_source_support(&dig_port->dp))
803 continue;
804
805 seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n",
806 dig_port->base.base.base.id,
807 dig_port->base.base.name);
808 drm_dp_mst_dump_topology(m, &dig_port->dp.mst_mgr);
809 }
810 drm_connector_list_iter_end(&conn_iter);
811
812 return 0;
813}
814
815static ssize_t i915_displayport_test_active_write(struct file *file,
816 const char __user *ubuf,
817 size_t len, loff_t *offp)
818{
819 char *input_buffer;
820 int status = 0;
821 struct drm_device *dev;
822 struct drm_connector *connector;
823 struct drm_connector_list_iter conn_iter;
824 struct intel_dp *intel_dp;
825 int val = 0;
826
827 dev = ((struct seq_file *)file->private_data)->private;
828
829 if (len == 0)
830 return 0;
831
832 input_buffer = memdup_user_nul(ubuf, len);
833 if (IS_ERR(input_buffer))
834 return PTR_ERR(input_buffer);
835
836 drm_dbg(dev, "Copied %d bytes from user\n", (unsigned int)len);
837
838 drm_connector_list_iter_begin(dev, &conn_iter);
839 drm_for_each_connector_iter(connector, &conn_iter) {
840 struct intel_encoder *encoder;
841
842 if (connector->connector_type !=
843 DRM_MODE_CONNECTOR_DisplayPort)
844 continue;
845
846 encoder = to_intel_encoder(connector->encoder);
847 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
848 continue;
849
850 if (encoder && connector->status == connector_status_connected) {
851 intel_dp = enc_to_intel_dp(encoder);
852 status = kstrtoint(input_buffer, 10, &val);
853 if (status < 0)
854 break;
855 drm_dbg(dev, "Got %d for test active\n", val);
856 /* To prevent erroneous activation of the compliance
857 * testing code, only accept an actual value of 1 here
858 */
859 if (val == 1)
860 intel_dp->compliance.test_active = true;
861 else
862 intel_dp->compliance.test_active = false;
863 }
864 }
865 drm_connector_list_iter_end(&conn_iter);
866 kfree(input_buffer);
867 if (status < 0)
868 return status;
869
870 *offp += len;
871 return len;
872}
873
874static int i915_displayport_test_active_show(struct seq_file *m, void *data)
875{
876 struct drm_i915_private *dev_priv = m->private;
877 struct drm_connector *connector;
878 struct drm_connector_list_iter conn_iter;
879 struct intel_dp *intel_dp;
880
881 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
882 drm_for_each_connector_iter(connector, &conn_iter) {
883 struct intel_encoder *encoder;
884
885 if (connector->connector_type !=
886 DRM_MODE_CONNECTOR_DisplayPort)
887 continue;
888
889 encoder = to_intel_encoder(connector->encoder);
890 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
891 continue;
892
893 if (encoder && connector->status == connector_status_connected) {
894 intel_dp = enc_to_intel_dp(encoder);
895 if (intel_dp->compliance.test_active)
896 seq_puts(m, "1");
897 else
898 seq_puts(m, "0");
899 } else
900 seq_puts(m, "0");
901 }
902 drm_connector_list_iter_end(&conn_iter);
903
904 return 0;
905}
906
907static int i915_displayport_test_active_open(struct inode *inode,
908 struct file *file)
909{
910 return single_open(file, i915_displayport_test_active_show,
911 inode->i_private);
912}
913
914static const struct file_operations i915_displayport_test_active_fops = {
915 .owner = THIS_MODULE,
916 .open = i915_displayport_test_active_open,
917 .read = seq_read,
918 .llseek = seq_lseek,
919 .release = single_release,
920 .write = i915_displayport_test_active_write
921};
922
923static int i915_displayport_test_data_show(struct seq_file *m, void *data)
924{
925 struct drm_i915_private *dev_priv = m->private;
926 struct drm_connector *connector;
927 struct drm_connector_list_iter conn_iter;
928 struct intel_dp *intel_dp;
929
930 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
931 drm_for_each_connector_iter(connector, &conn_iter) {
932 struct intel_encoder *encoder;
933
934 if (connector->connector_type !=
935 DRM_MODE_CONNECTOR_DisplayPort)
936 continue;
937
938 encoder = to_intel_encoder(connector->encoder);
939 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
940 continue;
941
942 if (encoder && connector->status == connector_status_connected) {
943 intel_dp = enc_to_intel_dp(encoder);
944 if (intel_dp->compliance.test_type ==
945 DP_TEST_LINK_EDID_READ)
946 seq_printf(m, "%lx",
947 intel_dp->compliance.test_data.edid);
948 else if (intel_dp->compliance.test_type ==
949 DP_TEST_LINK_VIDEO_PATTERN) {
950 seq_printf(m, "hdisplay: %d\n",
951 intel_dp->compliance.test_data.hdisplay);
952 seq_printf(m, "vdisplay: %d\n",
953 intel_dp->compliance.test_data.vdisplay);
954 seq_printf(m, "bpc: %u\n",
955 intel_dp->compliance.test_data.bpc);
956 } else if (intel_dp->compliance.test_type ==
957 DP_TEST_LINK_PHY_TEST_PATTERN) {
958 seq_printf(m, "pattern: %d\n",
959 intel_dp->compliance.test_data.phytest.phy_pattern);
960 seq_printf(m, "Number of lanes: %d\n",
961 intel_dp->compliance.test_data.phytest.num_lanes);
962 seq_printf(m, "Link Rate: %d\n",
963 intel_dp->compliance.test_data.phytest.link_rate);
964 seq_printf(m, "level: %02x\n",
965 intel_dp->train_set[0]);
966 }
967 } else
968 seq_puts(m, "0");
969 }
970 drm_connector_list_iter_end(&conn_iter);
971
972 return 0;
973}
974DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_data);
975
976static int i915_displayport_test_type_show(struct seq_file *m, void *data)
977{
978 struct drm_i915_private *dev_priv = m->private;
979 struct drm_connector *connector;
980 struct drm_connector_list_iter conn_iter;
981 struct intel_dp *intel_dp;
982
983 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
984 drm_for_each_connector_iter(connector, &conn_iter) {
985 struct intel_encoder *encoder;
986
987 if (connector->connector_type !=
988 DRM_MODE_CONNECTOR_DisplayPort)
989 continue;
990
991 encoder = to_intel_encoder(connector->encoder);
992 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
993 continue;
994
995 if (encoder && connector->status == connector_status_connected) {
996 intel_dp = enc_to_intel_dp(encoder);
997 seq_printf(m, "%02lx\n", intel_dp->compliance.test_type);
998 } else
999 seq_puts(m, "0");
1000 }
1001 drm_connector_list_iter_end(&conn_iter);
1002
1003 return 0;
1004}
1005DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_type);
1006
1007static ssize_t
1008i915_fifo_underrun_reset_write(struct file *filp,
1009 const char __user *ubuf,
1010 size_t cnt, loff_t *ppos)
1011{
1012 struct drm_i915_private *dev_priv = filp->private_data;
1013 struct intel_crtc *crtc;
1014 int ret;
1015 bool reset;
1016
1017 ret = kstrtobool_from_user(ubuf, cnt, &reset);
1018 if (ret)
1019 return ret;
1020
1021 if (!reset)
1022 return cnt;
1023
1024 for_each_intel_crtc(&dev_priv->drm, crtc) {
1025 struct drm_crtc_commit *commit;
1026 struct intel_crtc_state *crtc_state;
1027
1028 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
1029 if (ret)
1030 return ret;
1031
1032 crtc_state = to_intel_crtc_state(crtc->base.state);
1033 commit = crtc_state->uapi.commit;
1034 if (commit) {
1035 ret = wait_for_completion_interruptible(&commit->hw_done);
1036 if (!ret)
1037 ret = wait_for_completion_interruptible(&commit->flip_done);
1038 }
1039
1040 if (!ret && crtc_state->hw.active) {
1041 drm_dbg_kms(&dev_priv->drm,
1042 "Re-arming FIFO underruns on pipe %c\n",
1043 pipe_name(crtc->pipe));
1044
1045 intel_crtc_arm_fifo_underrun(crtc, crtc_state);
1046 }
1047
1048 drm_modeset_unlock(&crtc->base.mutex);
1049
1050 if (ret)
1051 return ret;
1052 }
1053
1054 intel_fbc_reset_underrun(dev_priv);
1055
1056 return cnt;
1057}
1058
1059static const struct file_operations i915_fifo_underrun_reset_ops = {
1060 .owner = THIS_MODULE,
1061 .open = simple_open,
1062 .write = i915_fifo_underrun_reset_write,
1063 .llseek = default_llseek,
1064};
1065
1066static const struct drm_info_list intel_display_debugfs_list[] = {
1067 {"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0},
1068 {"i915_sr_status", i915_sr_status, 0},
1069 {"i915_opregion", i915_opregion, 0},
1070 {"i915_vbt", i915_vbt, 0},
1071 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
1072 {"i915_power_domain_info", i915_power_domain_info, 0},
1073 {"i915_display_info", i915_display_info, 0},
1074 {"i915_display_capabilities", i915_display_capabilities, 0},
1075 {"i915_shared_dplls_info", i915_shared_dplls_info, 0},
1076 {"i915_dp_mst_info", i915_dp_mst_info, 0},
1077 {"i915_ddb_info", i915_ddb_info, 0},
1078 {"i915_lpsp_status", i915_lpsp_status, 0},
1079};
1080
1081static const struct {
1082 const char *name;
1083 const struct file_operations *fops;
1084} intel_display_debugfs_files[] = {
1085 {"i915_fifo_underrun_reset", &i915_fifo_underrun_reset_ops},
1086 {"i915_dp_test_data", &i915_displayport_test_data_fops},
1087 {"i915_dp_test_type", &i915_displayport_test_type_fops},
1088 {"i915_dp_test_active", &i915_displayport_test_active_fops},
1089};
1090
1091void intel_display_debugfs_register(struct drm_i915_private *i915)
1092{
1093 struct drm_minor *minor = i915->drm.primary;
1094 int i;
1095
1096 for (i = 0; i < ARRAY_SIZE(intel_display_debugfs_files); i++) {
1097 debugfs_create_file(intel_display_debugfs_files[i].name,
1098 0644,
1099 minor->debugfs_root,
1100 to_i915(minor->dev),
1101 intel_display_debugfs_files[i].fops);
1102 }
1103
1104 drm_debugfs_create_files(intel_display_debugfs_list,
1105 ARRAY_SIZE(intel_display_debugfs_list),
1106 minor->debugfs_root, minor);
1107
1108 intel_cdclk_debugfs_register(i915);
1109 intel_dmc_debugfs_register(i915);
1110 intel_fbc_debugfs_register(i915);
1111 intel_hpd_debugfs_register(i915);
1112 intel_psr_debugfs_register(i915);
1113 intel_wm_debugfs_register(i915);
1114 intel_display_debugfs_params(i915);
1115}
1116
1117static int i915_panel_show(struct seq_file *m, void *data)
1118{
1119 struct intel_connector *connector = m->private;
1120 struct intel_dp *intel_dp = intel_attached_dp(connector);
1121
1122 if (connector->base.status != connector_status_connected)
1123 return -ENODEV;
1124
1125 seq_printf(m, "Panel power up delay: %d\n",
1126 intel_dp->pps.panel_power_up_delay);
1127 seq_printf(m, "Panel power down delay: %d\n",
1128 intel_dp->pps.panel_power_down_delay);
1129 seq_printf(m, "Backlight on delay: %d\n",
1130 intel_dp->pps.backlight_on_delay);
1131 seq_printf(m, "Backlight off delay: %d\n",
1132 intel_dp->pps.backlight_off_delay);
1133
1134 return 0;
1135}
1136DEFINE_SHOW_ATTRIBUTE(i915_panel);
1137
1138static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data)
1139{
1140 struct intel_connector *connector = m->private;
1141 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1142 int ret;
1143
1144 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1145 if (ret)
1146 return ret;
1147
1148 if (!connector->base.encoder ||
1149 connector->base.status != connector_status_connected) {
1150 ret = -ENODEV;
1151 goto out;
1152 }
1153
1154 seq_printf(m, "%s:%d HDCP version: ", connector->base.name,
1155 connector->base.base.id);
1156 intel_hdcp_info(m, connector);
1157
1158out:
1159 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1160
1161 return ret;
1162}
1163DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability);
1164
1165static int i915_lpsp_capability_show(struct seq_file *m, void *data)
1166{
1167 struct intel_connector *connector = m->private;
1168 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1169 struct intel_encoder *encoder = intel_attached_encoder(connector);
1170 int connector_type = connector->base.connector_type;
1171 bool lpsp_capable = false;
1172
1173 if (!encoder)
1174 return -ENODEV;
1175
1176 if (connector->base.status != connector_status_connected)
1177 return -ENODEV;
1178
1179 if (DISPLAY_VER(i915) >= 13)
1180 lpsp_capable = encoder->port <= PORT_B;
1181 else if (DISPLAY_VER(i915) >= 12)
1182 /*
1183 * Actually TGL can drive LPSP on port till DDI_C
1184 * but there is no physical connected DDI_C on TGL sku's,
1185 * even driver is not initilizing DDI_C port for gen12.
1186 */
1187 lpsp_capable = encoder->port <= PORT_B;
1188 else if (DISPLAY_VER(i915) == 11)
1189 lpsp_capable = (connector_type == DRM_MODE_CONNECTOR_DSI ||
1190 connector_type == DRM_MODE_CONNECTOR_eDP);
1191 else if (IS_DISPLAY_VER(i915, 9, 10))
1192 lpsp_capable = (encoder->port == PORT_A &&
1193 (connector_type == DRM_MODE_CONNECTOR_DSI ||
1194 connector_type == DRM_MODE_CONNECTOR_eDP ||
1195 connector_type == DRM_MODE_CONNECTOR_DisplayPort));
1196 else if (IS_HASWELL(i915) || IS_BROADWELL(i915))
1197 lpsp_capable = connector_type == DRM_MODE_CONNECTOR_eDP;
1198
1199 seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable");
1200
1201 return 0;
1202}
1203DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability);
1204
1205static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
1206{
1207 struct intel_connector *connector = m->private;
1208 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1209 struct drm_crtc *crtc;
1210 struct intel_dp *intel_dp;
1211 struct drm_modeset_acquire_ctx ctx;
1212 struct intel_crtc_state *crtc_state = NULL;
1213 int ret = 0;
1214 bool try_again = false;
1215
1216 drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
1217
1218 do {
1219 try_again = false;
1220 ret = drm_modeset_lock(&i915->drm.mode_config.connection_mutex,
1221 &ctx);
1222 if (ret) {
1223 if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) {
1224 try_again = true;
1225 continue;
1226 }
1227 break;
1228 }
1229 crtc = connector->base.state->crtc;
1230 if (connector->base.status != connector_status_connected || !crtc) {
1231 ret = -ENODEV;
1232 break;
1233 }
1234 ret = drm_modeset_lock(&crtc->mutex, &ctx);
1235 if (ret == -EDEADLK) {
1236 ret = drm_modeset_backoff(&ctx);
1237 if (!ret) {
1238 try_again = true;
1239 continue;
1240 }
1241 break;
1242 } else if (ret) {
1243 break;
1244 }
1245 intel_dp = intel_attached_dp(connector);
1246 crtc_state = to_intel_crtc_state(crtc->state);
1247 seq_printf(m, "DSC_Enabled: %s\n",
1248 str_yes_no(crtc_state->dsc.compression_enable));
1249 seq_printf(m, "DSC_Sink_Support: %s\n",
1250 str_yes_no(drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd)));
1251 seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n",
1252 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
1253 DP_DSC_RGB)),
1254 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
1255 DP_DSC_YCbCr420_Native)),
1256 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
1257 DP_DSC_YCbCr444)));
1258 seq_printf(m, "DSC_Sink_BPP_Precision: %d\n",
1259 drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd));
1260 seq_printf(m, "Force_DSC_Enable: %s\n",
1261 str_yes_no(intel_dp->force_dsc_en));
1262 if (!intel_dp_is_edp(intel_dp))
1263 seq_printf(m, "FEC_Sink_Support: %s\n",
1264 str_yes_no(drm_dp_sink_supports_fec(connector->dp.fec_capability)));
1265 } while (try_again);
1266
1267 drm_modeset_drop_locks(&ctx);
1268 drm_modeset_acquire_fini(&ctx);
1269
1270 return ret;
1271}
1272
1273static ssize_t i915_dsc_fec_support_write(struct file *file,
1274 const char __user *ubuf,
1275 size_t len, loff_t *offp)
1276{
1277 struct seq_file *m = file->private_data;
1278 struct intel_connector *connector = m->private;
1279 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1280 struct intel_encoder *encoder = intel_attached_encoder(connector);
1281 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1282 bool dsc_enable = false;
1283 int ret;
1284
1285 if (len == 0)
1286 return 0;
1287
1288 drm_dbg(&i915->drm,
1289 "Copied %zu bytes from user to force DSC\n", len);
1290
1291 ret = kstrtobool_from_user(ubuf, len, &dsc_enable);
1292 if (ret < 0)
1293 return ret;
1294
1295 drm_dbg(&i915->drm, "Got %s for DSC Enable\n",
1296 (dsc_enable) ? "true" : "false");
1297 intel_dp->force_dsc_en = dsc_enable;
1298
1299 *offp += len;
1300 return len;
1301}
1302
1303static int i915_dsc_fec_support_open(struct inode *inode,
1304 struct file *file)
1305{
1306 return single_open(file, i915_dsc_fec_support_show,
1307 inode->i_private);
1308}
1309
1310static const struct file_operations i915_dsc_fec_support_fops = {
1311 .owner = THIS_MODULE,
1312 .open = i915_dsc_fec_support_open,
1313 .read = seq_read,
1314 .llseek = seq_lseek,
1315 .release = single_release,
1316 .write = i915_dsc_fec_support_write
1317};
1318
1319static int i915_dsc_bpc_show(struct seq_file *m, void *data)
1320{
1321 struct intel_connector *connector = m->private;
1322 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1323 struct intel_encoder *encoder = intel_attached_encoder(connector);
1324 struct drm_crtc *crtc;
1325 struct intel_crtc_state *crtc_state;
1326 int ret;
1327
1328 if (!encoder)
1329 return -ENODEV;
1330
1331 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1332 if (ret)
1333 return ret;
1334
1335 crtc = connector->base.state->crtc;
1336 if (connector->base.status != connector_status_connected || !crtc) {
1337 ret = -ENODEV;
1338 goto out;
1339 }
1340
1341 crtc_state = to_intel_crtc_state(crtc->state);
1342 seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component);
1343
1344out: drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1345
1346 return ret;
1347}
1348
1349static ssize_t i915_dsc_bpc_write(struct file *file,
1350 const char __user *ubuf,
1351 size_t len, loff_t *offp)
1352{
1353 struct seq_file *m = file->private_data;
1354 struct intel_connector *connector = m->private;
1355 struct intel_encoder *encoder = intel_attached_encoder(connector);
1356 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1357 int dsc_bpc = 0;
1358 int ret;
1359
1360 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc);
1361 if (ret < 0)
1362 return ret;
1363
1364 intel_dp->force_dsc_bpc = dsc_bpc;
1365 *offp += len;
1366
1367 return len;
1368}
1369
1370static int i915_dsc_bpc_open(struct inode *inode,
1371 struct file *file)
1372{
1373 return single_open(file, i915_dsc_bpc_show, inode->i_private);
1374}
1375
1376static const struct file_operations i915_dsc_bpc_fops = {
1377 .owner = THIS_MODULE,
1378 .open = i915_dsc_bpc_open,
1379 .read = seq_read,
1380 .llseek = seq_lseek,
1381 .release = single_release,
1382 .write = i915_dsc_bpc_write
1383};
1384
1385static int i915_dsc_output_format_show(struct seq_file *m, void *data)
1386{
1387 struct intel_connector *connector = m->private;
1388 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1389 struct intel_encoder *encoder = intel_attached_encoder(connector);
1390 struct drm_crtc *crtc;
1391 struct intel_crtc_state *crtc_state;
1392 int ret;
1393
1394 if (!encoder)
1395 return -ENODEV;
1396
1397 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1398 if (ret)
1399 return ret;
1400
1401 crtc = connector->base.state->crtc;
1402 if (connector->base.status != connector_status_connected || !crtc) {
1403 ret = -ENODEV;
1404 goto out;
1405 }
1406
1407 crtc_state = to_intel_crtc_state(crtc->state);
1408 seq_printf(m, "DSC_Output_Format: %s\n",
1409 intel_output_format_name(crtc_state->output_format));
1410
1411out: drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1412
1413 return ret;
1414}
1415
1416static ssize_t i915_dsc_output_format_write(struct file *file,
1417 const char __user *ubuf,
1418 size_t len, loff_t *offp)
1419{
1420 struct seq_file *m = file->private_data;
1421 struct intel_connector *connector = m->private;
1422 struct intel_encoder *encoder = intel_attached_encoder(connector);
1423 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1424 int dsc_output_format = 0;
1425 int ret;
1426
1427 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format);
1428 if (ret < 0)
1429 return ret;
1430
1431 intel_dp->force_dsc_output_format = dsc_output_format;
1432 *offp += len;
1433
1434 return len;
1435}
1436
1437static int i915_dsc_output_format_open(struct inode *inode,
1438 struct file *file)
1439{
1440 return single_open(file, i915_dsc_output_format_show, inode->i_private);
1441}
1442
1443static const struct file_operations i915_dsc_output_format_fops = {
1444 .owner = THIS_MODULE,
1445 .open = i915_dsc_output_format_open,
1446 .read = seq_read,
1447 .llseek = seq_lseek,
1448 .release = single_release,
1449 .write = i915_dsc_output_format_write
1450};
1451
1452static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data)
1453{
1454 struct intel_connector *connector = m->private;
1455 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1456 struct intel_encoder *encoder = intel_attached_encoder(connector);
1457 struct drm_crtc *crtc;
1458 struct intel_dp *intel_dp;
1459 int ret;
1460
1461 if (!encoder)
1462 return -ENODEV;
1463
1464 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1465 if (ret)
1466 return ret;
1467
1468 crtc = connector->base.state->crtc;
1469 if (connector->base.status != connector_status_connected || !crtc) {
1470 ret = -ENODEV;
1471 goto out;
1472 }
1473
1474 intel_dp = intel_attached_dp(connector);
1475 seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n",
1476 str_yes_no(intel_dp->force_dsc_fractional_bpp_en));
1477
1478out:
1479 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1480
1481 return ret;
1482}
1483
1484static ssize_t i915_dsc_fractional_bpp_write(struct file *file,
1485 const char __user *ubuf,
1486 size_t len, loff_t *offp)
1487{
1488 struct seq_file *m = file->private_data;
1489 struct intel_connector *connector = m->private;
1490 struct intel_encoder *encoder = intel_attached_encoder(connector);
1491 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1492 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1493 bool dsc_fractional_bpp_enable = false;
1494 int ret;
1495
1496 if (len == 0)
1497 return 0;
1498
1499 drm_dbg(&i915->drm,
1500 "Copied %zu bytes from user to force fractional bpp for DSC\n", len);
1501
1502 ret = kstrtobool_from_user(ubuf, len, &dsc_fractional_bpp_enable);
1503 if (ret < 0)
1504 return ret;
1505
1506 drm_dbg(&i915->drm, "Got %s for DSC Fractional BPP Enable\n",
1507 (dsc_fractional_bpp_enable) ? "true" : "false");
1508 intel_dp->force_dsc_fractional_bpp_en = dsc_fractional_bpp_enable;
1509
1510 *offp += len;
1511
1512 return len;
1513}
1514
1515static int i915_dsc_fractional_bpp_open(struct inode *inode,
1516 struct file *file)
1517{
1518 return single_open(file, i915_dsc_fractional_bpp_show, inode->i_private);
1519}
1520
1521static const struct file_operations i915_dsc_fractional_bpp_fops = {
1522 .owner = THIS_MODULE,
1523 .open = i915_dsc_fractional_bpp_open,
1524 .read = seq_read,
1525 .llseek = seq_lseek,
1526 .release = single_release,
1527 .write = i915_dsc_fractional_bpp_write
1528};
1529
1530/*
1531 * Returns the Current CRTC's bpc.
1532 * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc
1533 */
1534static int i915_current_bpc_show(struct seq_file *m, void *data)
1535{
1536 struct intel_crtc *crtc = m->private;
1537 struct intel_crtc_state *crtc_state;
1538 int ret;
1539
1540 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
1541 if (ret)
1542 return ret;
1543
1544 crtc_state = to_intel_crtc_state(crtc->base.state);
1545 seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3);
1546
1547 drm_modeset_unlock(&crtc->base.mutex);
1548
1549 return ret;
1550}
1551DEFINE_SHOW_ATTRIBUTE(i915_current_bpc);
1552
1553/* Pipe may differ from crtc index if pipes are fused off */
1554static int intel_crtc_pipe_show(struct seq_file *m, void *unused)
1555{
1556 struct intel_crtc *crtc = m->private;
1557
1558 seq_printf(m, "%c\n", pipe_name(crtc->pipe));
1559
1560 return 0;
1561}
1562DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe);
1563
1564/**
1565 * intel_connector_debugfs_add - add i915 specific connector debugfs files
1566 * @connector: pointer to a registered intel_connector
1567 *
1568 * Cleanup will be done by drm_connector_unregister() through a call to
1569 * drm_debugfs_connector_remove().
1570 */
1571void intel_connector_debugfs_add(struct intel_connector *connector)
1572{
1573 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1574 struct dentry *root = connector->base.debugfs_entry;
1575 int connector_type = connector->base.connector_type;
1576
1577 /* The connector must have been registered beforehands. */
1578 if (!root)
1579 return;
1580
1581 intel_drrs_connector_debugfs_add(connector);
1582 intel_psr_connector_debugfs_add(connector);
1583
1584 if (connector_type == DRM_MODE_CONNECTOR_eDP)
1585 debugfs_create_file("i915_panel_timings", 0444, root,
1586 connector, &i915_panel_fops);
1587
1588 if (connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1589 connector_type == DRM_MODE_CONNECTOR_HDMIA ||
1590 connector_type == DRM_MODE_CONNECTOR_HDMIB) {
1591 debugfs_create_file("i915_hdcp_sink_capability", 0444, root,
1592 connector, &i915_hdcp_sink_capability_fops);
1593 }
1594
1595 if (DISPLAY_VER(i915) >= 11 &&
1596 ((connector_type == DRM_MODE_CONNECTOR_DisplayPort && !connector->mst_port) ||
1597 connector_type == DRM_MODE_CONNECTOR_eDP)) {
1598 debugfs_create_file("i915_dsc_fec_support", 0644, root,
1599 connector, &i915_dsc_fec_support_fops);
1600
1601 debugfs_create_file("i915_dsc_bpc", 0644, root,
1602 connector, &i915_dsc_bpc_fops);
1603
1604 debugfs_create_file("i915_dsc_output_format", 0644, root,
1605 connector, &i915_dsc_output_format_fops);
1606
1607 debugfs_create_file("i915_dsc_fractional_bpp", 0644, root,
1608 connector, &i915_dsc_fractional_bpp_fops);
1609 }
1610
1611 if (connector_type == DRM_MODE_CONNECTOR_DSI ||
1612 connector_type == DRM_MODE_CONNECTOR_eDP ||
1613 connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1614 connector_type == DRM_MODE_CONNECTOR_HDMIA ||
1615 connector_type == DRM_MODE_CONNECTOR_HDMIB)
1616 debugfs_create_file("i915_lpsp_capability", 0444, root,
1617 connector, &i915_lpsp_capability_fops);
1618}
1619
1620/**
1621 * intel_crtc_debugfs_add - add i915 specific crtc debugfs files
1622 * @crtc: pointer to a drm_crtc
1623 *
1624 * Failure to add debugfs entries should generally be ignored.
1625 */
1626void intel_crtc_debugfs_add(struct intel_crtc *crtc)
1627{
1628 struct dentry *root = crtc->base.debugfs_entry;
1629
1630 if (!root)
1631 return;
1632
1633 crtc_updates_add(crtc);
1634 intel_drrs_crtc_debugfs_add(crtc);
1635 intel_fbc_crtc_debugfs_add(crtc);
1636 hsw_ips_crtc_debugfs_add(crtc);
1637
1638 debugfs_create_file("i915_current_bpc", 0444, root, crtc,
1639 &i915_current_bpc_fops);
1640 debugfs_create_file("i915_pipe", 0444, root, crtc,
1641 &intel_crtc_pipe_fops);
1642}