1/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR Linux-OpenIB) */
  2/*
  3 * Copyright (c) 2016 Hisilicon Limited.
  4 *
  5 * This software is available to you under a choice of one of two
  6 * licenses.  You may choose to be licensed under the terms of the GNU
  7 * General Public License (GPL) Version 2, available from the file
  8 * COPYING in the main directory of this source tree, or the
  9 * OpenIB.org BSD license below:
 10 *
 11 *     Redistribution and use in source and binary forms, with or
 12 *     without modification, are permitted provided that the following
 13 *     conditions are met:
 14 *
 15 *      - Redistributions of source code must retain the above
 16 *        copyright notice, this list of conditions and the following
 17 *        disclaimer.
 18 *
 19 *      - Redistributions in binary form must reproduce the above
 20 *        copyright notice, this list of conditions and the following
 21 *        disclaimer in the documentation and/or other materials
 22 *        provided with the distribution.
 23 *
 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 31 * SOFTWARE.
 32 */
 33
 34#ifndef HNS_ABI_USER_H
 35#define HNS_ABI_USER_H
 36
 37#include <linux/types.h>
 38
 39struct hns_roce_ib_create_cq {
 40	__aligned_u64 buf_addr;
 41	__aligned_u64 db_addr;
 42	__u32 cqe_size;
 43	__u32 reserved;
 44};
 45
 46enum hns_roce_cq_cap_flags {
 47	HNS_ROCE_CQ_FLAG_RECORD_DB = 1 << 0,
 48};
 49
 50struct hns_roce_ib_create_cq_resp {
 51	__aligned_u64 cqn; /* Only 32 bits used, 64 for compat */
 52	__aligned_u64 cap_flags;
 53};
 54
 55enum hns_roce_srq_cap_flags {
 56	HNS_ROCE_SRQ_CAP_RECORD_DB = 1 << 0,
 57};
 58
 59enum hns_roce_srq_cap_flags_resp {
 60	HNS_ROCE_RSP_SRQ_CAP_RECORD_DB = 1 << 0,
 61};
 62
 63struct hns_roce_ib_create_srq {
 64	__aligned_u64 buf_addr;
 65	__aligned_u64 db_addr;
 66	__aligned_u64 que_addr;
 67	__u32 req_cap_flags; /* Use enum hns_roce_srq_cap_flags */
 68	__u32 reserved;
 69};
 70
 71struct hns_roce_ib_create_srq_resp {
 72	__u32	srqn;
 73	__u32	cap_flags; /* Use enum hns_roce_srq_cap_flags */
 74};
 75
 76struct hns_roce_ib_create_qp {
 77	__aligned_u64 buf_addr;
 78	__aligned_u64 db_addr;
 79	__u8    log_sq_bb_count;
 80	__u8    log_sq_stride;
 81	__u8    sq_no_prefetch;
 82	__u8    reserved[5];
 83	__aligned_u64 sdb_addr;
 84};
 85
 86enum hns_roce_qp_cap_flags {
 87	HNS_ROCE_QP_CAP_RQ_RECORD_DB = 1 << 0,
 88	HNS_ROCE_QP_CAP_SQ_RECORD_DB = 1 << 1,
 89	HNS_ROCE_QP_CAP_OWNER_DB = 1 << 2,
 90	HNS_ROCE_QP_CAP_DIRECT_WQE = 1 << 5,
 91};
 92
 93struct hns_roce_ib_create_qp_resp {
 94	__aligned_u64 cap_flags;
 95	__aligned_u64 dwqe_mmap_key;
 96};
 97
 98enum {
 99	HNS_ROCE_EXSGE_FLAGS = 1 << 0,
100	HNS_ROCE_RQ_INLINE_FLAGS = 1 << 1,
101	HNS_ROCE_CQE_INLINE_FLAGS = 1 << 2,
102};
103
104enum {
105	HNS_ROCE_RSP_EXSGE_FLAGS = 1 << 0,
106	HNS_ROCE_RSP_RQ_INLINE_FLAGS = 1 << 1,
107	HNS_ROCE_RSP_CQE_INLINE_FLAGS = 1 << 2,
108};
109
110struct hns_roce_ib_alloc_ucontext_resp {
111	__u32	qp_tab_size;
112	__u32	cqe_size;
113	__u32	srq_tab_size;
114	__u32	reserved;
115	__u32	config;
116	__u32	max_inline_data;
117};
118
119struct hns_roce_ib_alloc_ucontext {
120	__u32 config;
121	__u32 reserved;
122};
123
124struct hns_roce_ib_alloc_pd_resp {
125	__u32 pdn;
126};
127
128struct hns_roce_ib_create_ah_resp {
129	__u8 dmac[6];
130	__u8 reserved[2];
131};
132
133#endif /* HNS_ABI_USER_H */