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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Bluetooth Software UART Qualcomm protocol
4 *
5 * HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management
6 * protocol extension to H4.
7 *
8 * Copyright (C) 2007 Texas Instruments, Inc.
9 * Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved.
10 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
11 *
12 * Acknowledgements:
13 * This file is based on hci_ll.c, which was...
14 * Written by Ohad Ben-Cohen <ohad@bencohen.org>
15 * which was in turn based on hci_h4.c, which was written
16 * by Maxim Krasnyansky and Marcel Holtmann.
17 */
18
19#include <linux/kernel.h>
20#include <linux/clk.h>
21#include <linux/completion.h>
22#include <linux/debugfs.h>
23#include <linux/delay.h>
24#include <linux/devcoredump.h>
25#include <linux/device.h>
26#include <linux/gpio/consumer.h>
27#include <linux/mod_devicetable.h>
28#include <linux/module.h>
29#include <linux/of.h>
30#include <linux/acpi.h>
31#include <linux/platform_device.h>
32#include <linux/regulator/consumer.h>
33#include <linux/serdev.h>
34#include <linux/mutex.h>
35#include <asm/unaligned.h>
36
37#include <net/bluetooth/bluetooth.h>
38#include <net/bluetooth/hci_core.h>
39
40#include "hci_uart.h"
41#include "btqca.h"
42
43/* HCI_IBS protocol messages */
44#define HCI_IBS_SLEEP_IND 0xFE
45#define HCI_IBS_WAKE_IND 0xFD
46#define HCI_IBS_WAKE_ACK 0xFC
47#define HCI_MAX_IBS_SIZE 10
48
49#define IBS_WAKE_RETRANS_TIMEOUT_MS 100
50#define IBS_BTSOC_TX_IDLE_TIMEOUT_MS 200
51#define IBS_HOST_TX_IDLE_TIMEOUT_MS 2000
52#define CMD_TRANS_TIMEOUT_MS 100
53#define MEMDUMP_TIMEOUT_MS 8000
54#define IBS_DISABLE_SSR_TIMEOUT_MS \
55 (MEMDUMP_TIMEOUT_MS + FW_DOWNLOAD_TIMEOUT_MS)
56#define FW_DOWNLOAD_TIMEOUT_MS 3000
57
58/* susclk rate */
59#define SUSCLK_RATE_32KHZ 32768
60
61/* Controller debug log header */
62#define QCA_DEBUG_HANDLE 0x2EDC
63
64/* max retry count when init fails */
65#define MAX_INIT_RETRIES 3
66
67/* Controller dump header */
68#define QCA_SSR_DUMP_HANDLE 0x0108
69#define QCA_DUMP_PACKET_SIZE 255
70#define QCA_LAST_SEQUENCE_NUM 0xFFFF
71#define QCA_CRASHBYTE_PACKET_LEN 1096
72#define QCA_MEMDUMP_BYTE 0xFB
73
74enum qca_flags {
75 QCA_IBS_DISABLED,
76 QCA_DROP_VENDOR_EVENT,
77 QCA_SUSPENDING,
78 QCA_MEMDUMP_COLLECTION,
79 QCA_HW_ERROR_EVENT,
80 QCA_SSR_TRIGGERED,
81 QCA_BT_OFF,
82 QCA_ROM_FW,
83 QCA_DEBUGFS_CREATED,
84};
85
86enum qca_capabilities {
87 QCA_CAP_WIDEBAND_SPEECH = BIT(0),
88 QCA_CAP_VALID_LE_STATES = BIT(1),
89};
90
91/* HCI_IBS transmit side sleep protocol states */
92enum tx_ibs_states {
93 HCI_IBS_TX_ASLEEP,
94 HCI_IBS_TX_WAKING,
95 HCI_IBS_TX_AWAKE,
96};
97
98/* HCI_IBS receive side sleep protocol states */
99enum rx_states {
100 HCI_IBS_RX_ASLEEP,
101 HCI_IBS_RX_AWAKE,
102};
103
104/* HCI_IBS transmit and receive side clock state vote */
105enum hci_ibs_clock_state_vote {
106 HCI_IBS_VOTE_STATS_UPDATE,
107 HCI_IBS_TX_VOTE_CLOCK_ON,
108 HCI_IBS_TX_VOTE_CLOCK_OFF,
109 HCI_IBS_RX_VOTE_CLOCK_ON,
110 HCI_IBS_RX_VOTE_CLOCK_OFF,
111};
112
113/* Controller memory dump states */
114enum qca_memdump_states {
115 QCA_MEMDUMP_IDLE,
116 QCA_MEMDUMP_COLLECTING,
117 QCA_MEMDUMP_COLLECTED,
118 QCA_MEMDUMP_TIMEOUT,
119};
120
121struct qca_memdump_info {
122 u32 current_seq_no;
123 u32 received_dump;
124 u32 ram_dump_size;
125};
126
127struct qca_memdump_event_hdr {
128 __u8 evt;
129 __u8 plen;
130 __u16 opcode;
131 __le16 seq_no;
132 __u8 reserved;
133} __packed;
134
135
136struct qca_dump_size {
137 __le32 dump_size;
138} __packed;
139
140struct qca_data {
141 struct hci_uart *hu;
142 struct sk_buff *rx_skb;
143 struct sk_buff_head txq;
144 struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */
145 struct sk_buff_head rx_memdump_q; /* Memdump wait queue */
146 spinlock_t hci_ibs_lock; /* HCI_IBS state lock */
147 u8 tx_ibs_state; /* HCI_IBS transmit side power state*/
148 u8 rx_ibs_state; /* HCI_IBS receive side power state */
149 bool tx_vote; /* Clock must be on for TX */
150 bool rx_vote; /* Clock must be on for RX */
151 struct timer_list tx_idle_timer;
152 u32 tx_idle_delay;
153 struct timer_list wake_retrans_timer;
154 u32 wake_retrans;
155 struct workqueue_struct *workqueue;
156 struct work_struct ws_awake_rx;
157 struct work_struct ws_awake_device;
158 struct work_struct ws_rx_vote_off;
159 struct work_struct ws_tx_vote_off;
160 struct work_struct ctrl_memdump_evt;
161 struct delayed_work ctrl_memdump_timeout;
162 struct qca_memdump_info *qca_memdump;
163 unsigned long flags;
164 struct completion drop_ev_comp;
165 wait_queue_head_t suspend_wait_q;
166 enum qca_memdump_states memdump_state;
167 struct mutex hci_memdump_lock;
168
169 u16 fw_version;
170 u16 controller_id;
171 /* For debugging purpose */
172 u64 ibs_sent_wacks;
173 u64 ibs_sent_slps;
174 u64 ibs_sent_wakes;
175 u64 ibs_recv_wacks;
176 u64 ibs_recv_slps;
177 u64 ibs_recv_wakes;
178 u64 vote_last_jif;
179 u32 vote_on_ms;
180 u32 vote_off_ms;
181 u64 tx_votes_on;
182 u64 rx_votes_on;
183 u64 tx_votes_off;
184 u64 rx_votes_off;
185 u64 votes_on;
186 u64 votes_off;
187};
188
189enum qca_speed_type {
190 QCA_INIT_SPEED = 1,
191 QCA_OPER_SPEED
192};
193
194/*
195 * Voltage regulator information required for configuring the
196 * QCA Bluetooth chipset
197 */
198struct qca_vreg {
199 const char *name;
200 unsigned int load_uA;
201};
202
203struct qca_device_data {
204 enum qca_btsoc_type soc_type;
205 struct qca_vreg *vregs;
206 size_t num_vregs;
207 uint32_t capabilities;
208};
209
210/*
211 * Platform data for the QCA Bluetooth power driver.
212 */
213struct qca_power {
214 struct device *dev;
215 struct regulator_bulk_data *vreg_bulk;
216 int num_vregs;
217 bool vregs_on;
218};
219
220struct qca_serdev {
221 struct hci_uart serdev_hu;
222 struct gpio_desc *bt_en;
223 struct gpio_desc *sw_ctrl;
224 struct clk *susclk;
225 enum qca_btsoc_type btsoc_type;
226 struct qca_power *bt_power;
227 u32 init_speed;
228 u32 oper_speed;
229 const char *firmware_name;
230};
231
232static int qca_regulator_enable(struct qca_serdev *qcadev);
233static void qca_regulator_disable(struct qca_serdev *qcadev);
234static void qca_power_shutdown(struct hci_uart *hu);
235static int qca_power_off(struct hci_dev *hdev);
236static void qca_controller_memdump(struct work_struct *work);
237static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb);
238
239static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu)
240{
241 enum qca_btsoc_type soc_type;
242
243 if (hu->serdev) {
244 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
245
246 soc_type = qsd->btsoc_type;
247 } else {
248 soc_type = QCA_ROME;
249 }
250
251 return soc_type;
252}
253
254static const char *qca_get_firmware_name(struct hci_uart *hu)
255{
256 if (hu->serdev) {
257 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
258
259 return qsd->firmware_name;
260 } else {
261 return NULL;
262 }
263}
264
265static void __serial_clock_on(struct tty_struct *tty)
266{
267 /* TODO: Some chipset requires to enable UART clock on client
268 * side to save power consumption or manual work is required.
269 * Please put your code to control UART clock here if needed
270 */
271}
272
273static void __serial_clock_off(struct tty_struct *tty)
274{
275 /* TODO: Some chipset requires to disable UART clock on client
276 * side to save power consumption or manual work is required.
277 * Please put your code to control UART clock off here if needed
278 */
279}
280
281/* serial_clock_vote needs to be called with the ibs lock held */
282static void serial_clock_vote(unsigned long vote, struct hci_uart *hu)
283{
284 struct qca_data *qca = hu->priv;
285 unsigned int diff;
286
287 bool old_vote = (qca->tx_vote | qca->rx_vote);
288 bool new_vote;
289
290 switch (vote) {
291 case HCI_IBS_VOTE_STATS_UPDATE:
292 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif);
293
294 if (old_vote)
295 qca->vote_off_ms += diff;
296 else
297 qca->vote_on_ms += diff;
298 return;
299
300 case HCI_IBS_TX_VOTE_CLOCK_ON:
301 qca->tx_vote = true;
302 qca->tx_votes_on++;
303 break;
304
305 case HCI_IBS_RX_VOTE_CLOCK_ON:
306 qca->rx_vote = true;
307 qca->rx_votes_on++;
308 break;
309
310 case HCI_IBS_TX_VOTE_CLOCK_OFF:
311 qca->tx_vote = false;
312 qca->tx_votes_off++;
313 break;
314
315 case HCI_IBS_RX_VOTE_CLOCK_OFF:
316 qca->rx_vote = false;
317 qca->rx_votes_off++;
318 break;
319
320 default:
321 BT_ERR("Voting irregularity");
322 return;
323 }
324
325 new_vote = qca->rx_vote | qca->tx_vote;
326
327 if (new_vote != old_vote) {
328 if (new_vote)
329 __serial_clock_on(hu->tty);
330 else
331 __serial_clock_off(hu->tty);
332
333 BT_DBG("Vote serial clock %s(%s)", new_vote ? "true" : "false",
334 vote ? "true" : "false");
335
336 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif);
337
338 if (new_vote) {
339 qca->votes_on++;
340 qca->vote_off_ms += diff;
341 } else {
342 qca->votes_off++;
343 qca->vote_on_ms += diff;
344 }
345 qca->vote_last_jif = jiffies;
346 }
347}
348
349/* Builds and sends an HCI_IBS command packet.
350 * These are very simple packets with only 1 cmd byte.
351 */
352static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu)
353{
354 int err = 0;
355 struct sk_buff *skb = NULL;
356 struct qca_data *qca = hu->priv;
357
358 BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd);
359
360 skb = bt_skb_alloc(1, GFP_ATOMIC);
361 if (!skb) {
362 BT_ERR("Failed to allocate memory for HCI_IBS packet");
363 return -ENOMEM;
364 }
365
366 /* Assign HCI_IBS type */
367 skb_put_u8(skb, cmd);
368
369 skb_queue_tail(&qca->txq, skb);
370
371 return err;
372}
373
374static void qca_wq_awake_device(struct work_struct *work)
375{
376 struct qca_data *qca = container_of(work, struct qca_data,
377 ws_awake_device);
378 struct hci_uart *hu = qca->hu;
379 unsigned long retrans_delay;
380 unsigned long flags;
381
382 BT_DBG("hu %p wq awake device", hu);
383
384 /* Vote for serial clock */
385 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu);
386
387 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
388
389 /* Send wake indication to device */
390 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0)
391 BT_ERR("Failed to send WAKE to device");
392
393 qca->ibs_sent_wakes++;
394
395 /* Start retransmit timer */
396 retrans_delay = msecs_to_jiffies(qca->wake_retrans);
397 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
398
399 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
400
401 /* Actually send the packets */
402 hci_uart_tx_wakeup(hu);
403}
404
405static void qca_wq_awake_rx(struct work_struct *work)
406{
407 struct qca_data *qca = container_of(work, struct qca_data,
408 ws_awake_rx);
409 struct hci_uart *hu = qca->hu;
410 unsigned long flags;
411
412 BT_DBG("hu %p wq awake rx", hu);
413
414 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu);
415
416 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
417 qca->rx_ibs_state = HCI_IBS_RX_AWAKE;
418
419 /* Always acknowledge device wake up,
420 * sending IBS message doesn't count as TX ON.
421 */
422 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0)
423 BT_ERR("Failed to acknowledge device wake up");
424
425 qca->ibs_sent_wacks++;
426
427 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
428
429 /* Actually send the packets */
430 hci_uart_tx_wakeup(hu);
431}
432
433static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work)
434{
435 struct qca_data *qca = container_of(work, struct qca_data,
436 ws_rx_vote_off);
437 struct hci_uart *hu = qca->hu;
438
439 BT_DBG("hu %p rx clock vote off", hu);
440
441 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu);
442}
443
444static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work)
445{
446 struct qca_data *qca = container_of(work, struct qca_data,
447 ws_tx_vote_off);
448 struct hci_uart *hu = qca->hu;
449
450 BT_DBG("hu %p tx clock vote off", hu);
451
452 /* Run HCI tx handling unlocked */
453 hci_uart_tx_wakeup(hu);
454
455 /* Now that message queued to tty driver, vote for tty clocks off.
456 * It is up to the tty driver to pend the clocks off until tx done.
457 */
458 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
459}
460
461static void hci_ibs_tx_idle_timeout(struct timer_list *t)
462{
463 struct qca_data *qca = from_timer(qca, t, tx_idle_timer);
464 struct hci_uart *hu = qca->hu;
465 unsigned long flags;
466
467 BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state);
468
469 spin_lock_irqsave_nested(&qca->hci_ibs_lock,
470 flags, SINGLE_DEPTH_NESTING);
471
472 switch (qca->tx_ibs_state) {
473 case HCI_IBS_TX_AWAKE:
474 /* TX_IDLE, go to SLEEP */
475 if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) {
476 BT_ERR("Failed to send SLEEP to device");
477 break;
478 }
479 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
480 qca->ibs_sent_slps++;
481 queue_work(qca->workqueue, &qca->ws_tx_vote_off);
482 break;
483
484 case HCI_IBS_TX_ASLEEP:
485 case HCI_IBS_TX_WAKING:
486 default:
487 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
488 break;
489 }
490
491 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
492}
493
494static void hci_ibs_wake_retrans_timeout(struct timer_list *t)
495{
496 struct qca_data *qca = from_timer(qca, t, wake_retrans_timer);
497 struct hci_uart *hu = qca->hu;
498 unsigned long flags, retrans_delay;
499 bool retransmit = false;
500
501 BT_DBG("hu %p wake retransmit timeout in %d state",
502 hu, qca->tx_ibs_state);
503
504 spin_lock_irqsave_nested(&qca->hci_ibs_lock,
505 flags, SINGLE_DEPTH_NESTING);
506
507 /* Don't retransmit the HCI_IBS_WAKE_IND when suspending. */
508 if (test_bit(QCA_SUSPENDING, &qca->flags)) {
509 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
510 return;
511 }
512
513 switch (qca->tx_ibs_state) {
514 case HCI_IBS_TX_WAKING:
515 /* No WAKE_ACK, retransmit WAKE */
516 retransmit = true;
517 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) {
518 BT_ERR("Failed to acknowledge device wake up");
519 break;
520 }
521 qca->ibs_sent_wakes++;
522 retrans_delay = msecs_to_jiffies(qca->wake_retrans);
523 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
524 break;
525
526 case HCI_IBS_TX_ASLEEP:
527 case HCI_IBS_TX_AWAKE:
528 default:
529 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
530 break;
531 }
532
533 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
534
535 if (retransmit)
536 hci_uart_tx_wakeup(hu);
537}
538
539
540static void qca_controller_memdump_timeout(struct work_struct *work)
541{
542 struct qca_data *qca = container_of(work, struct qca_data,
543 ctrl_memdump_timeout.work);
544 struct hci_uart *hu = qca->hu;
545
546 mutex_lock(&qca->hci_memdump_lock);
547 if (test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) {
548 qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
549 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
550 /* Inject hw error event to reset the device
551 * and driver.
552 */
553 hci_reset_dev(hu->hdev);
554 }
555 }
556
557 mutex_unlock(&qca->hci_memdump_lock);
558}
559
560
561/* Initialize protocol */
562static int qca_open(struct hci_uart *hu)
563{
564 struct qca_serdev *qcadev;
565 struct qca_data *qca;
566
567 BT_DBG("hu %p qca_open", hu);
568
569 if (!hci_uart_has_flow_control(hu))
570 return -EOPNOTSUPP;
571
572 qca = kzalloc(sizeof(struct qca_data), GFP_KERNEL);
573 if (!qca)
574 return -ENOMEM;
575
576 skb_queue_head_init(&qca->txq);
577 skb_queue_head_init(&qca->tx_wait_q);
578 skb_queue_head_init(&qca->rx_memdump_q);
579 spin_lock_init(&qca->hci_ibs_lock);
580 mutex_init(&qca->hci_memdump_lock);
581 qca->workqueue = alloc_ordered_workqueue("qca_wq", 0);
582 if (!qca->workqueue) {
583 BT_ERR("QCA Workqueue not initialized properly");
584 kfree(qca);
585 return -ENOMEM;
586 }
587
588 INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx);
589 INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device);
590 INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off);
591 INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off);
592 INIT_WORK(&qca->ctrl_memdump_evt, qca_controller_memdump);
593 INIT_DELAYED_WORK(&qca->ctrl_memdump_timeout,
594 qca_controller_memdump_timeout);
595 init_waitqueue_head(&qca->suspend_wait_q);
596
597 qca->hu = hu;
598 init_completion(&qca->drop_ev_comp);
599
600 /* Assume we start with both sides asleep -- extra wakes OK */
601 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
602 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
603
604 qca->vote_last_jif = jiffies;
605
606 hu->priv = qca;
607
608 if (hu->serdev) {
609 qcadev = serdev_device_get_drvdata(hu->serdev);
610
611 switch (qcadev->btsoc_type) {
612 case QCA_WCN3988:
613 case QCA_WCN3990:
614 case QCA_WCN3991:
615 case QCA_WCN3998:
616 case QCA_WCN6750:
617 hu->init_speed = qcadev->init_speed;
618 break;
619
620 default:
621 break;
622 }
623
624 if (qcadev->oper_speed)
625 hu->oper_speed = qcadev->oper_speed;
626 }
627
628 timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0);
629 qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS;
630
631 timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
632 qca->tx_idle_delay = IBS_HOST_TX_IDLE_TIMEOUT_MS;
633
634 BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
635 qca->tx_idle_delay, qca->wake_retrans);
636
637 return 0;
638}
639
640static void qca_debugfs_init(struct hci_dev *hdev)
641{
642 struct hci_uart *hu = hci_get_drvdata(hdev);
643 struct qca_data *qca = hu->priv;
644 struct dentry *ibs_dir;
645 umode_t mode;
646
647 if (!hdev->debugfs)
648 return;
649
650 if (test_and_set_bit(QCA_DEBUGFS_CREATED, &qca->flags))
651 return;
652
653 ibs_dir = debugfs_create_dir("ibs", hdev->debugfs);
654
655 /* read only */
656 mode = 0444;
657 debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state);
658 debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state);
659 debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir,
660 &qca->ibs_sent_slps);
661 debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir,
662 &qca->ibs_sent_wakes);
663 debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir,
664 &qca->ibs_sent_wacks);
665 debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir,
666 &qca->ibs_recv_slps);
667 debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir,
668 &qca->ibs_recv_wakes);
669 debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir,
670 &qca->ibs_recv_wacks);
671 debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote);
672 debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on);
673 debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off);
674 debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote);
675 debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on);
676 debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off);
677 debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on);
678 debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off);
679 debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms);
680 debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms);
681
682 /* read/write */
683 mode = 0644;
684 debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans);
685 debugfs_create_u32("tx_idle_delay", mode, ibs_dir,
686 &qca->tx_idle_delay);
687}
688
689/* Flush protocol data */
690static int qca_flush(struct hci_uart *hu)
691{
692 struct qca_data *qca = hu->priv;
693
694 BT_DBG("hu %p qca flush", hu);
695
696 skb_queue_purge(&qca->tx_wait_q);
697 skb_queue_purge(&qca->txq);
698
699 return 0;
700}
701
702/* Close protocol */
703static int qca_close(struct hci_uart *hu)
704{
705 struct qca_data *qca = hu->priv;
706
707 BT_DBG("hu %p qca close", hu);
708
709 serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu);
710
711 skb_queue_purge(&qca->tx_wait_q);
712 skb_queue_purge(&qca->txq);
713 skb_queue_purge(&qca->rx_memdump_q);
714 /*
715 * Shut the timers down so they can't be rearmed when
716 * destroy_workqueue() drains pending work which in turn might try
717 * to arm a timer. After shutdown rearm attempts are silently
718 * ignored by the timer core code.
719 */
720 timer_shutdown_sync(&qca->tx_idle_timer);
721 timer_shutdown_sync(&qca->wake_retrans_timer);
722 destroy_workqueue(qca->workqueue);
723 qca->hu = NULL;
724
725 kfree_skb(qca->rx_skb);
726
727 hu->priv = NULL;
728
729 kfree(qca);
730
731 return 0;
732}
733
734/* Called upon a wake-up-indication from the device.
735 */
736static void device_want_to_wakeup(struct hci_uart *hu)
737{
738 unsigned long flags;
739 struct qca_data *qca = hu->priv;
740
741 BT_DBG("hu %p want to wake up", hu);
742
743 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
744
745 qca->ibs_recv_wakes++;
746
747 /* Don't wake the rx up when suspending. */
748 if (test_bit(QCA_SUSPENDING, &qca->flags)) {
749 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
750 return;
751 }
752
753 switch (qca->rx_ibs_state) {
754 case HCI_IBS_RX_ASLEEP:
755 /* Make sure clock is on - we may have turned clock off since
756 * receiving the wake up indicator awake rx clock.
757 */
758 queue_work(qca->workqueue, &qca->ws_awake_rx);
759 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
760 return;
761
762 case HCI_IBS_RX_AWAKE:
763 /* Always acknowledge device wake up,
764 * sending IBS message doesn't count as TX ON.
765 */
766 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) {
767 BT_ERR("Failed to acknowledge device wake up");
768 break;
769 }
770 qca->ibs_sent_wacks++;
771 break;
772
773 default:
774 /* Any other state is illegal */
775 BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d",
776 qca->rx_ibs_state);
777 break;
778 }
779
780 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
781
782 /* Actually send the packets */
783 hci_uart_tx_wakeup(hu);
784}
785
786/* Called upon a sleep-indication from the device.
787 */
788static void device_want_to_sleep(struct hci_uart *hu)
789{
790 unsigned long flags;
791 struct qca_data *qca = hu->priv;
792
793 BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state);
794
795 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
796
797 qca->ibs_recv_slps++;
798
799 switch (qca->rx_ibs_state) {
800 case HCI_IBS_RX_AWAKE:
801 /* Update state */
802 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
803 /* Vote off rx clock under workqueue */
804 queue_work(qca->workqueue, &qca->ws_rx_vote_off);
805 break;
806
807 case HCI_IBS_RX_ASLEEP:
808 break;
809
810 default:
811 /* Any other state is illegal */
812 BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d",
813 qca->rx_ibs_state);
814 break;
815 }
816
817 wake_up_interruptible(&qca->suspend_wait_q);
818
819 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
820}
821
822/* Called upon wake-up-acknowledgement from the device
823 */
824static void device_woke_up(struct hci_uart *hu)
825{
826 unsigned long flags, idle_delay;
827 struct qca_data *qca = hu->priv;
828 struct sk_buff *skb = NULL;
829
830 BT_DBG("hu %p woke up", hu);
831
832 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
833
834 qca->ibs_recv_wacks++;
835
836 /* Don't react to the wake-up-acknowledgment when suspending. */
837 if (test_bit(QCA_SUSPENDING, &qca->flags)) {
838 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
839 return;
840 }
841
842 switch (qca->tx_ibs_state) {
843 case HCI_IBS_TX_AWAKE:
844 /* Expect one if we send 2 WAKEs */
845 BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d",
846 qca->tx_ibs_state);
847 break;
848
849 case HCI_IBS_TX_WAKING:
850 /* Send pending packets */
851 while ((skb = skb_dequeue(&qca->tx_wait_q)))
852 skb_queue_tail(&qca->txq, skb);
853
854 /* Switch timers and change state to HCI_IBS_TX_AWAKE */
855 del_timer(&qca->wake_retrans_timer);
856 idle_delay = msecs_to_jiffies(qca->tx_idle_delay);
857 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay);
858 qca->tx_ibs_state = HCI_IBS_TX_AWAKE;
859 break;
860
861 case HCI_IBS_TX_ASLEEP:
862 default:
863 BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d",
864 qca->tx_ibs_state);
865 break;
866 }
867
868 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
869
870 /* Actually send the packets */
871 hci_uart_tx_wakeup(hu);
872}
873
874/* Enqueue frame for transmittion (padding, crc, etc) may be called from
875 * two simultaneous tasklets.
876 */
877static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb)
878{
879 unsigned long flags = 0, idle_delay;
880 struct qca_data *qca = hu->priv;
881
882 BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb,
883 qca->tx_ibs_state);
884
885 if (test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
886 /* As SSR is in progress, ignore the packets */
887 bt_dev_dbg(hu->hdev, "SSR is in progress");
888 kfree_skb(skb);
889 return 0;
890 }
891
892 /* Prepend skb with frame type */
893 memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
894
895 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
896
897 /* Don't go to sleep in middle of patch download or
898 * Out-Of-Band(GPIOs control) sleep is selected.
899 * Don't wake the device up when suspending.
900 */
901 if (test_bit(QCA_IBS_DISABLED, &qca->flags) ||
902 test_bit(QCA_SUSPENDING, &qca->flags)) {
903 skb_queue_tail(&qca->txq, skb);
904 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
905 return 0;
906 }
907
908 /* Act according to current state */
909 switch (qca->tx_ibs_state) {
910 case HCI_IBS_TX_AWAKE:
911 BT_DBG("Device awake, sending normally");
912 skb_queue_tail(&qca->txq, skb);
913 idle_delay = msecs_to_jiffies(qca->tx_idle_delay);
914 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay);
915 break;
916
917 case HCI_IBS_TX_ASLEEP:
918 BT_DBG("Device asleep, waking up and queueing packet");
919 /* Save packet for later */
920 skb_queue_tail(&qca->tx_wait_q, skb);
921
922 qca->tx_ibs_state = HCI_IBS_TX_WAKING;
923 /* Schedule a work queue to wake up device */
924 queue_work(qca->workqueue, &qca->ws_awake_device);
925 break;
926
927 case HCI_IBS_TX_WAKING:
928 BT_DBG("Device waking up, queueing packet");
929 /* Transient state; just keep packet for later */
930 skb_queue_tail(&qca->tx_wait_q, skb);
931 break;
932
933 default:
934 BT_ERR("Illegal tx state: %d (losing packet)",
935 qca->tx_ibs_state);
936 dev_kfree_skb_irq(skb);
937 break;
938 }
939
940 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
941
942 return 0;
943}
944
945static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb)
946{
947 struct hci_uart *hu = hci_get_drvdata(hdev);
948
949 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND);
950
951 device_want_to_sleep(hu);
952
953 kfree_skb(skb);
954 return 0;
955}
956
957static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb)
958{
959 struct hci_uart *hu = hci_get_drvdata(hdev);
960
961 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND);
962
963 device_want_to_wakeup(hu);
964
965 kfree_skb(skb);
966 return 0;
967}
968
969static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb)
970{
971 struct hci_uart *hu = hci_get_drvdata(hdev);
972
973 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK);
974
975 device_woke_up(hu);
976
977 kfree_skb(skb);
978 return 0;
979}
980
981static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb)
982{
983 /* We receive debug logs from chip as an ACL packets.
984 * Instead of sending the data to ACL to decode the
985 * received data, we are pushing them to the above layers
986 * as a diagnostic packet.
987 */
988 if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE)
989 return hci_recv_diag(hdev, skb);
990
991 return hci_recv_frame(hdev, skb);
992}
993
994static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb)
995{
996 struct hci_uart *hu = hci_get_drvdata(hdev);
997 struct qca_data *qca = hu->priv;
998 char buf[80];
999
1000 snprintf(buf, sizeof(buf), "Controller Name: 0x%x\n",
1001 qca->controller_id);
1002 skb_put_data(skb, buf, strlen(buf));
1003
1004 snprintf(buf, sizeof(buf), "Firmware Version: 0x%x\n",
1005 qca->fw_version);
1006 skb_put_data(skb, buf, strlen(buf));
1007
1008 snprintf(buf, sizeof(buf), "Vendor:Qualcomm\n");
1009 skb_put_data(skb, buf, strlen(buf));
1010
1011 snprintf(buf, sizeof(buf), "Driver: %s\n",
1012 hu->serdev->dev.driver->name);
1013 skb_put_data(skb, buf, strlen(buf));
1014}
1015
1016static void qca_controller_memdump(struct work_struct *work)
1017{
1018 struct qca_data *qca = container_of(work, struct qca_data,
1019 ctrl_memdump_evt);
1020 struct hci_uart *hu = qca->hu;
1021 struct sk_buff *skb;
1022 struct qca_memdump_event_hdr *cmd_hdr;
1023 struct qca_memdump_info *qca_memdump = qca->qca_memdump;
1024 struct qca_dump_size *dump;
1025 u16 seq_no;
1026 u32 rx_size;
1027 int ret = 0;
1028 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1029
1030 while ((skb = skb_dequeue(&qca->rx_memdump_q))) {
1031
1032 mutex_lock(&qca->hci_memdump_lock);
1033 /* Skip processing the received packets if timeout detected
1034 * or memdump collection completed.
1035 */
1036 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT ||
1037 qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
1038 mutex_unlock(&qca->hci_memdump_lock);
1039 return;
1040 }
1041
1042 if (!qca_memdump) {
1043 qca_memdump = kzalloc(sizeof(struct qca_memdump_info),
1044 GFP_ATOMIC);
1045 if (!qca_memdump) {
1046 mutex_unlock(&qca->hci_memdump_lock);
1047 return;
1048 }
1049
1050 qca->qca_memdump = qca_memdump;
1051 }
1052
1053 qca->memdump_state = QCA_MEMDUMP_COLLECTING;
1054 cmd_hdr = (void *) skb->data;
1055 seq_no = __le16_to_cpu(cmd_hdr->seq_no);
1056 skb_pull(skb, sizeof(struct qca_memdump_event_hdr));
1057
1058 if (!seq_no) {
1059
1060 /* This is the first frame of memdump packet from
1061 * the controller, Disable IBS to recevie dump
1062 * with out any interruption, ideally time required for
1063 * the controller to send the dump is 8 seconds. let us
1064 * start timer to handle this asynchronous activity.
1065 */
1066 set_bit(QCA_IBS_DISABLED, &qca->flags);
1067 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1068 dump = (void *) skb->data;
1069 qca_memdump->ram_dump_size = __le32_to_cpu(dump->dump_size);
1070 if (!(qca_memdump->ram_dump_size)) {
1071 bt_dev_err(hu->hdev, "Rx invalid memdump size");
1072 kfree(qca_memdump);
1073 kfree_skb(skb);
1074 mutex_unlock(&qca->hci_memdump_lock);
1075 return;
1076 }
1077
1078 queue_delayed_work(qca->workqueue,
1079 &qca->ctrl_memdump_timeout,
1080 msecs_to_jiffies(MEMDUMP_TIMEOUT_MS));
1081 skb_pull(skb, sizeof(qca_memdump->ram_dump_size));
1082 qca_memdump->current_seq_no = 0;
1083 qca_memdump->received_dump = 0;
1084 ret = hci_devcd_init(hu->hdev, qca_memdump->ram_dump_size);
1085 bt_dev_info(hu->hdev, "hci_devcd_init Return:%d",
1086 ret);
1087 if (ret < 0) {
1088 kfree(qca->qca_memdump);
1089 qca->qca_memdump = NULL;
1090 qca->memdump_state = QCA_MEMDUMP_COLLECTED;
1091 cancel_delayed_work(&qca->ctrl_memdump_timeout);
1092 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1093 mutex_unlock(&qca->hci_memdump_lock);
1094 return;
1095 }
1096
1097 bt_dev_info(hu->hdev, "QCA collecting dump of size:%u",
1098 qca_memdump->ram_dump_size);
1099
1100 }
1101
1102 /* If sequence no 0 is missed then there is no point in
1103 * accepting the other sequences.
1104 */
1105 if (!test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) {
1106 bt_dev_err(hu->hdev, "QCA: Discarding other packets");
1107 kfree(qca_memdump);
1108 kfree_skb(skb);
1109 mutex_unlock(&qca->hci_memdump_lock);
1110 return;
1111 }
1112 /* There could be chance of missing some packets from
1113 * the controller. In such cases let us store the dummy
1114 * packets in the buffer.
1115 */
1116 /* For QCA6390, controller does not lost packets but
1117 * sequence number field of packet sometimes has error
1118 * bits, so skip this checking for missing packet.
1119 */
1120 while ((seq_no > qca_memdump->current_seq_no + 1) &&
1121 (soc_type != QCA_QCA6390) &&
1122 seq_no != QCA_LAST_SEQUENCE_NUM) {
1123 bt_dev_err(hu->hdev, "QCA controller missed packet:%d",
1124 qca_memdump->current_seq_no);
1125 rx_size = qca_memdump->received_dump;
1126 rx_size += QCA_DUMP_PACKET_SIZE;
1127 if (rx_size > qca_memdump->ram_dump_size) {
1128 bt_dev_err(hu->hdev,
1129 "QCA memdump received %d, no space for missed packet",
1130 qca_memdump->received_dump);
1131 break;
1132 }
1133 hci_devcd_append_pattern(hu->hdev, 0x00,
1134 QCA_DUMP_PACKET_SIZE);
1135 qca_memdump->received_dump += QCA_DUMP_PACKET_SIZE;
1136 qca_memdump->current_seq_no++;
1137 }
1138
1139 rx_size = qca_memdump->received_dump + skb->len;
1140 if (rx_size <= qca_memdump->ram_dump_size) {
1141 if ((seq_no != QCA_LAST_SEQUENCE_NUM) &&
1142 (seq_no != qca_memdump->current_seq_no)) {
1143 bt_dev_err(hu->hdev,
1144 "QCA memdump unexpected packet %d",
1145 seq_no);
1146 }
1147 bt_dev_dbg(hu->hdev,
1148 "QCA memdump packet %d with length %d",
1149 seq_no, skb->len);
1150 hci_devcd_append(hu->hdev, skb);
1151 qca_memdump->current_seq_no += 1;
1152 qca_memdump->received_dump = rx_size;
1153 } else {
1154 bt_dev_err(hu->hdev,
1155 "QCA memdump received no space for packet %d",
1156 qca_memdump->current_seq_no);
1157 }
1158
1159 if (seq_no == QCA_LAST_SEQUENCE_NUM) {
1160 bt_dev_info(hu->hdev,
1161 "QCA memdump Done, received %d, total %d",
1162 qca_memdump->received_dump,
1163 qca_memdump->ram_dump_size);
1164 hci_devcd_complete(hu->hdev);
1165 cancel_delayed_work(&qca->ctrl_memdump_timeout);
1166 kfree(qca->qca_memdump);
1167 qca->qca_memdump = NULL;
1168 qca->memdump_state = QCA_MEMDUMP_COLLECTED;
1169 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1170 }
1171
1172 mutex_unlock(&qca->hci_memdump_lock);
1173 }
1174
1175}
1176
1177static int qca_controller_memdump_event(struct hci_dev *hdev,
1178 struct sk_buff *skb)
1179{
1180 struct hci_uart *hu = hci_get_drvdata(hdev);
1181 struct qca_data *qca = hu->priv;
1182
1183 set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1184 skb_queue_tail(&qca->rx_memdump_q, skb);
1185 queue_work(qca->workqueue, &qca->ctrl_memdump_evt);
1186
1187 return 0;
1188}
1189
1190static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb)
1191{
1192 struct hci_uart *hu = hci_get_drvdata(hdev);
1193 struct qca_data *qca = hu->priv;
1194
1195 if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) {
1196 struct hci_event_hdr *hdr = (void *)skb->data;
1197
1198 /* For the WCN3990 the vendor command for a baudrate change
1199 * isn't sent as synchronous HCI command, because the
1200 * controller sends the corresponding vendor event with the
1201 * new baudrate. The event is received and properly decoded
1202 * after changing the baudrate of the host port. It needs to
1203 * be dropped, otherwise it can be misinterpreted as
1204 * response to a later firmware download command (also a
1205 * vendor command).
1206 */
1207
1208 if (hdr->evt == HCI_EV_VENDOR)
1209 complete(&qca->drop_ev_comp);
1210
1211 kfree_skb(skb);
1212
1213 return 0;
1214 }
1215 /* We receive chip memory dump as an event packet, With a dedicated
1216 * handler followed by a hardware error event. When this event is
1217 * received we store dump into a file before closing hci. This
1218 * dump will help in triaging the issues.
1219 */
1220 if ((skb->data[0] == HCI_VENDOR_PKT) &&
1221 (get_unaligned_be16(skb->data + 2) == QCA_SSR_DUMP_HANDLE))
1222 return qca_controller_memdump_event(hdev, skb);
1223
1224 return hci_recv_frame(hdev, skb);
1225}
1226
1227#define QCA_IBS_SLEEP_IND_EVENT \
1228 .type = HCI_IBS_SLEEP_IND, \
1229 .hlen = 0, \
1230 .loff = 0, \
1231 .lsize = 0, \
1232 .maxlen = HCI_MAX_IBS_SIZE
1233
1234#define QCA_IBS_WAKE_IND_EVENT \
1235 .type = HCI_IBS_WAKE_IND, \
1236 .hlen = 0, \
1237 .loff = 0, \
1238 .lsize = 0, \
1239 .maxlen = HCI_MAX_IBS_SIZE
1240
1241#define QCA_IBS_WAKE_ACK_EVENT \
1242 .type = HCI_IBS_WAKE_ACK, \
1243 .hlen = 0, \
1244 .loff = 0, \
1245 .lsize = 0, \
1246 .maxlen = HCI_MAX_IBS_SIZE
1247
1248static const struct h4_recv_pkt qca_recv_pkts[] = {
1249 { H4_RECV_ACL, .recv = qca_recv_acl_data },
1250 { H4_RECV_SCO, .recv = hci_recv_frame },
1251 { H4_RECV_EVENT, .recv = qca_recv_event },
1252 { QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind },
1253 { QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack },
1254 { QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind },
1255};
1256
1257static int qca_recv(struct hci_uart *hu, const void *data, int count)
1258{
1259 struct qca_data *qca = hu->priv;
1260
1261 if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
1262 return -EUNATCH;
1263
1264 qca->rx_skb = h4_recv_buf(hu->hdev, qca->rx_skb, data, count,
1265 qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts));
1266 if (IS_ERR(qca->rx_skb)) {
1267 int err = PTR_ERR(qca->rx_skb);
1268 bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
1269 qca->rx_skb = NULL;
1270 return err;
1271 }
1272
1273 return count;
1274}
1275
1276static struct sk_buff *qca_dequeue(struct hci_uart *hu)
1277{
1278 struct qca_data *qca = hu->priv;
1279
1280 return skb_dequeue(&qca->txq);
1281}
1282
1283static uint8_t qca_get_baudrate_value(int speed)
1284{
1285 switch (speed) {
1286 case 9600:
1287 return QCA_BAUDRATE_9600;
1288 case 19200:
1289 return QCA_BAUDRATE_19200;
1290 case 38400:
1291 return QCA_BAUDRATE_38400;
1292 case 57600:
1293 return QCA_BAUDRATE_57600;
1294 case 115200:
1295 return QCA_BAUDRATE_115200;
1296 case 230400:
1297 return QCA_BAUDRATE_230400;
1298 case 460800:
1299 return QCA_BAUDRATE_460800;
1300 case 500000:
1301 return QCA_BAUDRATE_500000;
1302 case 921600:
1303 return QCA_BAUDRATE_921600;
1304 case 1000000:
1305 return QCA_BAUDRATE_1000000;
1306 case 2000000:
1307 return QCA_BAUDRATE_2000000;
1308 case 3000000:
1309 return QCA_BAUDRATE_3000000;
1310 case 3200000:
1311 return QCA_BAUDRATE_3200000;
1312 case 3500000:
1313 return QCA_BAUDRATE_3500000;
1314 default:
1315 return QCA_BAUDRATE_115200;
1316 }
1317}
1318
1319static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate)
1320{
1321 struct hci_uart *hu = hci_get_drvdata(hdev);
1322 struct qca_data *qca = hu->priv;
1323 struct sk_buff *skb;
1324 u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 };
1325
1326 if (baudrate > QCA_BAUDRATE_3200000)
1327 return -EINVAL;
1328
1329 cmd[4] = baudrate;
1330
1331 skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL);
1332 if (!skb) {
1333 bt_dev_err(hdev, "Failed to allocate baudrate packet");
1334 return -ENOMEM;
1335 }
1336
1337 /* Assign commands to change baudrate and packet type. */
1338 skb_put_data(skb, cmd, sizeof(cmd));
1339 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
1340
1341 skb_queue_tail(&qca->txq, skb);
1342 hci_uart_tx_wakeup(hu);
1343
1344 /* Wait for the baudrate change request to be sent */
1345
1346 while (!skb_queue_empty(&qca->txq))
1347 usleep_range(100, 200);
1348
1349 if (hu->serdev)
1350 serdev_device_wait_until_sent(hu->serdev,
1351 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
1352
1353 /* Give the controller time to process the request */
1354 switch (qca_soc_type(hu)) {
1355 case QCA_WCN3988:
1356 case QCA_WCN3990:
1357 case QCA_WCN3991:
1358 case QCA_WCN3998:
1359 case QCA_WCN6750:
1360 case QCA_WCN6855:
1361 case QCA_WCN7850:
1362 usleep_range(1000, 10000);
1363 break;
1364
1365 default:
1366 msleep(300);
1367 }
1368
1369 return 0;
1370}
1371
1372static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
1373{
1374 if (hu->serdev)
1375 serdev_device_set_baudrate(hu->serdev, speed);
1376 else
1377 hci_uart_set_baudrate(hu, speed);
1378}
1379
1380static int qca_send_power_pulse(struct hci_uart *hu, bool on)
1381{
1382 int ret;
1383 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
1384 u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE;
1385
1386 /* These power pulses are single byte command which are sent
1387 * at required baudrate to wcn3990. On wcn3990, we have an external
1388 * circuit at Tx pin which decodes the pulse sent at specific baudrate.
1389 * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT
1390 * and also we use the same power inputs to turn on and off for
1391 * Wi-Fi/BT. Powering up the power sources will not enable BT, until
1392 * we send a power on pulse at 115200 bps. This algorithm will help to
1393 * save power. Disabling hardware flow control is mandatory while
1394 * sending power pulses to SoC.
1395 */
1396 bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd);
1397
1398 serdev_device_write_flush(hu->serdev);
1399 hci_uart_set_flow_control(hu, true);
1400 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
1401 if (ret < 0) {
1402 bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd);
1403 return ret;
1404 }
1405
1406 serdev_device_wait_until_sent(hu->serdev, timeout);
1407 hci_uart_set_flow_control(hu, false);
1408
1409 /* Give to controller time to boot/shutdown */
1410 if (on)
1411 msleep(100);
1412 else
1413 usleep_range(1000, 10000);
1414
1415 return 0;
1416}
1417
1418static unsigned int qca_get_speed(struct hci_uart *hu,
1419 enum qca_speed_type speed_type)
1420{
1421 unsigned int speed = 0;
1422
1423 if (speed_type == QCA_INIT_SPEED) {
1424 if (hu->init_speed)
1425 speed = hu->init_speed;
1426 else if (hu->proto->init_speed)
1427 speed = hu->proto->init_speed;
1428 } else {
1429 if (hu->oper_speed)
1430 speed = hu->oper_speed;
1431 else if (hu->proto->oper_speed)
1432 speed = hu->proto->oper_speed;
1433 }
1434
1435 return speed;
1436}
1437
1438static int qca_check_speeds(struct hci_uart *hu)
1439{
1440 switch (qca_soc_type(hu)) {
1441 case QCA_WCN3988:
1442 case QCA_WCN3990:
1443 case QCA_WCN3991:
1444 case QCA_WCN3998:
1445 case QCA_WCN6750:
1446 case QCA_WCN6855:
1447 case QCA_WCN7850:
1448 if (!qca_get_speed(hu, QCA_INIT_SPEED) &&
1449 !qca_get_speed(hu, QCA_OPER_SPEED))
1450 return -EINVAL;
1451 break;
1452
1453 default:
1454 if (!qca_get_speed(hu, QCA_INIT_SPEED) ||
1455 !qca_get_speed(hu, QCA_OPER_SPEED))
1456 return -EINVAL;
1457 }
1458
1459 return 0;
1460}
1461
1462static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type)
1463{
1464 unsigned int speed, qca_baudrate;
1465 struct qca_data *qca = hu->priv;
1466 int ret = 0;
1467
1468 if (speed_type == QCA_INIT_SPEED) {
1469 speed = qca_get_speed(hu, QCA_INIT_SPEED);
1470 if (speed)
1471 host_set_baudrate(hu, speed);
1472 } else {
1473 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1474
1475 speed = qca_get_speed(hu, QCA_OPER_SPEED);
1476 if (!speed)
1477 return 0;
1478
1479 /* Disable flow control for wcn3990 to deassert RTS while
1480 * changing the baudrate of chip and host.
1481 */
1482 switch (soc_type) {
1483 case QCA_WCN3988:
1484 case QCA_WCN3990:
1485 case QCA_WCN3991:
1486 case QCA_WCN3998:
1487 case QCA_WCN6750:
1488 case QCA_WCN6855:
1489 case QCA_WCN7850:
1490 hci_uart_set_flow_control(hu, true);
1491 break;
1492
1493 default:
1494 break;
1495 }
1496
1497 switch (soc_type) {
1498 case QCA_WCN3990:
1499 reinit_completion(&qca->drop_ev_comp);
1500 set_bit(QCA_DROP_VENDOR_EVENT, &qca->flags);
1501 break;
1502
1503 default:
1504 break;
1505 }
1506
1507 qca_baudrate = qca_get_baudrate_value(speed);
1508 bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed);
1509 ret = qca_set_baudrate(hu->hdev, qca_baudrate);
1510 if (ret)
1511 goto error;
1512
1513 host_set_baudrate(hu, speed);
1514
1515error:
1516 switch (soc_type) {
1517 case QCA_WCN3988:
1518 case QCA_WCN3990:
1519 case QCA_WCN3991:
1520 case QCA_WCN3998:
1521 case QCA_WCN6750:
1522 case QCA_WCN6855:
1523 case QCA_WCN7850:
1524 hci_uart_set_flow_control(hu, false);
1525 break;
1526
1527 default:
1528 break;
1529 }
1530
1531 switch (soc_type) {
1532 case QCA_WCN3990:
1533 /* Wait for the controller to send the vendor event
1534 * for the baudrate change command.
1535 */
1536 if (!wait_for_completion_timeout(&qca->drop_ev_comp,
1537 msecs_to_jiffies(100))) {
1538 bt_dev_err(hu->hdev,
1539 "Failed to change controller baudrate\n");
1540 ret = -ETIMEDOUT;
1541 }
1542
1543 clear_bit(QCA_DROP_VENDOR_EVENT, &qca->flags);
1544 break;
1545
1546 default:
1547 break;
1548 }
1549 }
1550
1551 return ret;
1552}
1553
1554static int qca_send_crashbuffer(struct hci_uart *hu)
1555{
1556 struct qca_data *qca = hu->priv;
1557 struct sk_buff *skb;
1558
1559 skb = bt_skb_alloc(QCA_CRASHBYTE_PACKET_LEN, GFP_KERNEL);
1560 if (!skb) {
1561 bt_dev_err(hu->hdev, "Failed to allocate memory for skb packet");
1562 return -ENOMEM;
1563 }
1564
1565 /* We forcefully crash the controller, by sending 0xfb byte for
1566 * 1024 times. We also might have chance of losing data, To be
1567 * on safer side we send 1096 bytes to the SoC.
1568 */
1569 memset(skb_put(skb, QCA_CRASHBYTE_PACKET_LEN), QCA_MEMDUMP_BYTE,
1570 QCA_CRASHBYTE_PACKET_LEN);
1571 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
1572 bt_dev_info(hu->hdev, "crash the soc to collect controller dump");
1573 skb_queue_tail(&qca->txq, skb);
1574 hci_uart_tx_wakeup(hu);
1575
1576 return 0;
1577}
1578
1579static void qca_wait_for_dump_collection(struct hci_dev *hdev)
1580{
1581 struct hci_uart *hu = hci_get_drvdata(hdev);
1582 struct qca_data *qca = hu->priv;
1583
1584 wait_on_bit_timeout(&qca->flags, QCA_MEMDUMP_COLLECTION,
1585 TASK_UNINTERRUPTIBLE, MEMDUMP_TIMEOUT_MS);
1586
1587 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1588}
1589
1590static void qca_hw_error(struct hci_dev *hdev, u8 code)
1591{
1592 struct hci_uart *hu = hci_get_drvdata(hdev);
1593 struct qca_data *qca = hu->priv;
1594
1595 set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1596 set_bit(QCA_HW_ERROR_EVENT, &qca->flags);
1597 bt_dev_info(hdev, "mem_dump_status: %d", qca->memdump_state);
1598
1599 if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
1600 /* If hardware error event received for other than QCA
1601 * soc memory dump event, then we need to crash the SOC
1602 * and wait here for 8 seconds to get the dump packets.
1603 * This will block main thread to be on hold until we
1604 * collect dump.
1605 */
1606 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1607 qca_send_crashbuffer(hu);
1608 qca_wait_for_dump_collection(hdev);
1609 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
1610 /* Let us wait here until memory dump collected or
1611 * memory dump timer expired.
1612 */
1613 bt_dev_info(hdev, "waiting for dump to complete");
1614 qca_wait_for_dump_collection(hdev);
1615 }
1616
1617 mutex_lock(&qca->hci_memdump_lock);
1618 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
1619 bt_dev_err(hu->hdev, "clearing allocated memory due to memdump timeout");
1620 hci_devcd_abort(hu->hdev);
1621 if (qca->qca_memdump) {
1622 kfree(qca->qca_memdump);
1623 qca->qca_memdump = NULL;
1624 }
1625 qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
1626 cancel_delayed_work(&qca->ctrl_memdump_timeout);
1627 }
1628 mutex_unlock(&qca->hci_memdump_lock);
1629
1630 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT ||
1631 qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
1632 cancel_work_sync(&qca->ctrl_memdump_evt);
1633 skb_queue_purge(&qca->rx_memdump_q);
1634 }
1635
1636 clear_bit(QCA_HW_ERROR_EVENT, &qca->flags);
1637}
1638
1639static void qca_cmd_timeout(struct hci_dev *hdev)
1640{
1641 struct hci_uart *hu = hci_get_drvdata(hdev);
1642 struct qca_data *qca = hu->priv;
1643
1644 set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1645 if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
1646 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1647 qca_send_crashbuffer(hu);
1648 qca_wait_for_dump_collection(hdev);
1649 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
1650 /* Let us wait here until memory dump collected or
1651 * memory dump timer expired.
1652 */
1653 bt_dev_info(hdev, "waiting for dump to complete");
1654 qca_wait_for_dump_collection(hdev);
1655 }
1656
1657 mutex_lock(&qca->hci_memdump_lock);
1658 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
1659 qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
1660 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
1661 /* Inject hw error event to reset the device
1662 * and driver.
1663 */
1664 hci_reset_dev(hu->hdev);
1665 }
1666 }
1667 mutex_unlock(&qca->hci_memdump_lock);
1668}
1669
1670static bool qca_wakeup(struct hci_dev *hdev)
1671{
1672 struct hci_uart *hu = hci_get_drvdata(hdev);
1673 bool wakeup;
1674
1675 /* BT SoC attached through the serial bus is handled by the serdev driver.
1676 * So we need to use the device handle of the serdev driver to get the
1677 * status of device may wakeup.
1678 */
1679 wakeup = device_may_wakeup(&hu->serdev->ctrl->dev);
1680 bt_dev_dbg(hu->hdev, "wakeup status : %d", wakeup);
1681
1682 return wakeup;
1683}
1684
1685static int qca_regulator_init(struct hci_uart *hu)
1686{
1687 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1688 struct qca_serdev *qcadev;
1689 int ret;
1690 bool sw_ctrl_state;
1691
1692 /* Check for vregs status, may be hci down has turned
1693 * off the voltage regulator.
1694 */
1695 qcadev = serdev_device_get_drvdata(hu->serdev);
1696 if (!qcadev->bt_power->vregs_on) {
1697 serdev_device_close(hu->serdev);
1698 ret = qca_regulator_enable(qcadev);
1699 if (ret)
1700 return ret;
1701
1702 ret = serdev_device_open(hu->serdev);
1703 if (ret) {
1704 bt_dev_err(hu->hdev, "failed to open port");
1705 return ret;
1706 }
1707 }
1708
1709 switch (soc_type) {
1710 case QCA_WCN3988:
1711 case QCA_WCN3990:
1712 case QCA_WCN3991:
1713 case QCA_WCN3998:
1714 /* Forcefully enable wcn399x to enter in to boot mode. */
1715 host_set_baudrate(hu, 2400);
1716 ret = qca_send_power_pulse(hu, false);
1717 if (ret)
1718 return ret;
1719 break;
1720
1721 default:
1722 break;
1723 }
1724
1725 /* For wcn6750 need to enable gpio bt_en */
1726 if (qcadev->bt_en) {
1727 gpiod_set_value_cansleep(qcadev->bt_en, 0);
1728 msleep(50);
1729 gpiod_set_value_cansleep(qcadev->bt_en, 1);
1730 msleep(50);
1731 if (qcadev->sw_ctrl) {
1732 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl);
1733 bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state);
1734 }
1735 }
1736
1737 qca_set_speed(hu, QCA_INIT_SPEED);
1738
1739 switch (soc_type) {
1740 case QCA_WCN3988:
1741 case QCA_WCN3990:
1742 case QCA_WCN3991:
1743 case QCA_WCN3998:
1744 ret = qca_send_power_pulse(hu, true);
1745 if (ret)
1746 return ret;
1747 break;
1748
1749 default:
1750 break;
1751 }
1752
1753 /* Now the device is in ready state to communicate with host.
1754 * To sync host with device we need to reopen port.
1755 * Without this, we will have RTS and CTS synchronization
1756 * issues.
1757 */
1758 serdev_device_close(hu->serdev);
1759 ret = serdev_device_open(hu->serdev);
1760 if (ret) {
1761 bt_dev_err(hu->hdev, "failed to open port");
1762 return ret;
1763 }
1764
1765 hci_uart_set_flow_control(hu, false);
1766
1767 return 0;
1768}
1769
1770static int qca_power_on(struct hci_dev *hdev)
1771{
1772 struct hci_uart *hu = hci_get_drvdata(hdev);
1773 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1774 struct qca_serdev *qcadev;
1775 struct qca_data *qca = hu->priv;
1776 int ret = 0;
1777
1778 /* Non-serdev device usually is powered by external power
1779 * and don't need additional action in driver for power on
1780 */
1781 if (!hu->serdev)
1782 return 0;
1783
1784 switch (soc_type) {
1785 case QCA_WCN3988:
1786 case QCA_WCN3990:
1787 case QCA_WCN3991:
1788 case QCA_WCN3998:
1789 case QCA_WCN6750:
1790 case QCA_WCN6855:
1791 case QCA_WCN7850:
1792 ret = qca_regulator_init(hu);
1793 break;
1794
1795 default:
1796 qcadev = serdev_device_get_drvdata(hu->serdev);
1797 if (qcadev->bt_en) {
1798 gpiod_set_value_cansleep(qcadev->bt_en, 1);
1799 /* Controller needs time to bootup. */
1800 msleep(150);
1801 }
1802 }
1803
1804 clear_bit(QCA_BT_OFF, &qca->flags);
1805 return ret;
1806}
1807
1808static void hci_coredump_qca(struct hci_dev *hdev)
1809{
1810 int err;
1811 static const u8 param[] = { 0x26 };
1812
1813 err = __hci_cmd_send(hdev, 0xfc0c, 1, param);
1814 if (err < 0)
1815 bt_dev_err(hdev, "%s: trigger crash failed (%d)", __func__, err);
1816}
1817
1818static int qca_get_data_path_id(struct hci_dev *hdev, __u8 *data_path_id)
1819{
1820 /* QCA uses 1 as non-HCI data path id for HFP */
1821 *data_path_id = 1;
1822 return 0;
1823}
1824
1825static int qca_configure_hfp_offload(struct hci_dev *hdev)
1826{
1827 bt_dev_info(hdev, "HFP non-HCI data transport is supported");
1828 hdev->get_data_path_id = qca_get_data_path_id;
1829 /* Do not need to send HCI_Configure_Data_Path to configure non-HCI
1830 * data transport path for QCA controllers, so set below field as NULL.
1831 */
1832 hdev->get_codec_config_data = NULL;
1833 return 0;
1834}
1835
1836static int qca_setup(struct hci_uart *hu)
1837{
1838 struct hci_dev *hdev = hu->hdev;
1839 struct qca_data *qca = hu->priv;
1840 unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200;
1841 unsigned int retries = 0;
1842 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1843 const char *firmware_name = qca_get_firmware_name(hu);
1844 int ret;
1845 struct qca_btsoc_version ver;
1846 const char *soc_name;
1847
1848 ret = qca_check_speeds(hu);
1849 if (ret)
1850 return ret;
1851
1852 clear_bit(QCA_ROM_FW, &qca->flags);
1853 /* Patch downloading has to be done without IBS mode */
1854 set_bit(QCA_IBS_DISABLED, &qca->flags);
1855
1856 /* Enable controller to do both LE scan and BR/EDR inquiry
1857 * simultaneously.
1858 */
1859 set_bit(HCI_QUIRK_SIMULTANEOUS_DISCOVERY, &hdev->quirks);
1860
1861 switch (soc_type) {
1862 case QCA_QCA2066:
1863 soc_name = "qca2066";
1864 break;
1865
1866 case QCA_WCN3988:
1867 case QCA_WCN3990:
1868 case QCA_WCN3991:
1869 case QCA_WCN3998:
1870 soc_name = "wcn399x";
1871 break;
1872
1873 case QCA_WCN6750:
1874 soc_name = "wcn6750";
1875 break;
1876
1877 case QCA_WCN6855:
1878 soc_name = "wcn6855";
1879 break;
1880
1881 case QCA_WCN7850:
1882 soc_name = "wcn7850";
1883 break;
1884
1885 default:
1886 soc_name = "ROME/QCA6390";
1887 }
1888 bt_dev_info(hdev, "setting up %s", soc_name);
1889
1890 qca->memdump_state = QCA_MEMDUMP_IDLE;
1891
1892retry:
1893 ret = qca_power_on(hdev);
1894 if (ret)
1895 goto out;
1896
1897 clear_bit(QCA_SSR_TRIGGERED, &qca->flags);
1898
1899 switch (soc_type) {
1900 case QCA_WCN3988:
1901 case QCA_WCN3990:
1902 case QCA_WCN3991:
1903 case QCA_WCN3998:
1904 case QCA_WCN6750:
1905 case QCA_WCN6855:
1906 case QCA_WCN7850:
1907
1908 /* Set BDA quirk bit for reading BDA value from fwnode property
1909 * only if that property exist in DT.
1910 */
1911 if (fwnode_property_present(dev_fwnode(hdev->dev.parent), "local-bd-address")) {
1912 set_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks);
1913 bt_dev_info(hdev, "setting quirk bit to read BDA from fwnode later");
1914 } else {
1915 bt_dev_dbg(hdev, "local-bd-address` is not present in the devicetree so not setting quirk bit for BDA");
1916 }
1917
1918 hci_set_aosp_capable(hdev);
1919
1920 ret = qca_read_soc_version(hdev, &ver, soc_type);
1921 if (ret)
1922 goto out;
1923 break;
1924
1925 default:
1926 qca_set_speed(hu, QCA_INIT_SPEED);
1927 }
1928
1929 /* Setup user speed if needed */
1930 speed = qca_get_speed(hu, QCA_OPER_SPEED);
1931 if (speed) {
1932 ret = qca_set_speed(hu, QCA_OPER_SPEED);
1933 if (ret)
1934 goto out;
1935
1936 qca_baudrate = qca_get_baudrate_value(speed);
1937 }
1938
1939 switch (soc_type) {
1940 case QCA_WCN3988:
1941 case QCA_WCN3990:
1942 case QCA_WCN3991:
1943 case QCA_WCN3998:
1944 case QCA_WCN6750:
1945 case QCA_WCN6855:
1946 case QCA_WCN7850:
1947 break;
1948
1949 default:
1950 /* Get QCA version information */
1951 ret = qca_read_soc_version(hdev, &ver, soc_type);
1952 if (ret)
1953 goto out;
1954 }
1955
1956 /* Setup patch / NVM configurations */
1957 ret = qca_uart_setup(hdev, qca_baudrate, soc_type, ver,
1958 firmware_name);
1959 if (!ret) {
1960 clear_bit(QCA_IBS_DISABLED, &qca->flags);
1961 qca_debugfs_init(hdev);
1962 hu->hdev->hw_error = qca_hw_error;
1963 hu->hdev->cmd_timeout = qca_cmd_timeout;
1964 if (device_can_wakeup(hu->serdev->ctrl->dev.parent))
1965 hu->hdev->wakeup = qca_wakeup;
1966 } else if (ret == -ENOENT) {
1967 /* No patch/nvm-config found, run with original fw/config */
1968 set_bit(QCA_ROM_FW, &qca->flags);
1969 ret = 0;
1970 } else if (ret == -EAGAIN) {
1971 /*
1972 * Userspace firmware loader will return -EAGAIN in case no
1973 * patch/nvm-config is found, so run with original fw/config.
1974 */
1975 set_bit(QCA_ROM_FW, &qca->flags);
1976 ret = 0;
1977 }
1978
1979out:
1980 if (ret && retries < MAX_INIT_RETRIES) {
1981 bt_dev_warn(hdev, "Retry BT power ON:%d", retries);
1982 qca_power_shutdown(hu);
1983 if (hu->serdev) {
1984 serdev_device_close(hu->serdev);
1985 ret = serdev_device_open(hu->serdev);
1986 if (ret) {
1987 bt_dev_err(hdev, "failed to open port");
1988 return ret;
1989 }
1990 }
1991 retries++;
1992 goto retry;
1993 }
1994
1995 /* Setup bdaddr */
1996 if (soc_type == QCA_ROME)
1997 hu->hdev->set_bdaddr = qca_set_bdaddr_rome;
1998 else
1999 hu->hdev->set_bdaddr = qca_set_bdaddr;
2000
2001 if (soc_type == QCA_QCA2066)
2002 qca_configure_hfp_offload(hdev);
2003
2004 qca->fw_version = le16_to_cpu(ver.patch_ver);
2005 qca->controller_id = le16_to_cpu(ver.rom_ver);
2006 hci_devcd_register(hdev, hci_coredump_qca, qca_dmp_hdr, NULL);
2007
2008 return ret;
2009}
2010
2011static const struct hci_uart_proto qca_proto = {
2012 .id = HCI_UART_QCA,
2013 .name = "QCA",
2014 .manufacturer = 29,
2015 .init_speed = 115200,
2016 .oper_speed = 3000000,
2017 .open = qca_open,
2018 .close = qca_close,
2019 .flush = qca_flush,
2020 .setup = qca_setup,
2021 .recv = qca_recv,
2022 .enqueue = qca_enqueue,
2023 .dequeue = qca_dequeue,
2024};
2025
2026static const struct qca_device_data qca_soc_data_wcn3988 __maybe_unused = {
2027 .soc_type = QCA_WCN3988,
2028 .vregs = (struct qca_vreg []) {
2029 { "vddio", 15000 },
2030 { "vddxo", 80000 },
2031 { "vddrf", 300000 },
2032 { "vddch0", 450000 },
2033 },
2034 .num_vregs = 4,
2035};
2036
2037static const struct qca_device_data qca_soc_data_wcn3990 __maybe_unused = {
2038 .soc_type = QCA_WCN3990,
2039 .vregs = (struct qca_vreg []) {
2040 { "vddio", 15000 },
2041 { "vddxo", 80000 },
2042 { "vddrf", 300000 },
2043 { "vddch0", 450000 },
2044 },
2045 .num_vregs = 4,
2046};
2047
2048static const struct qca_device_data qca_soc_data_wcn3991 __maybe_unused = {
2049 .soc_type = QCA_WCN3991,
2050 .vregs = (struct qca_vreg []) {
2051 { "vddio", 15000 },
2052 { "vddxo", 80000 },
2053 { "vddrf", 300000 },
2054 { "vddch0", 450000 },
2055 },
2056 .num_vregs = 4,
2057 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2058};
2059
2060static const struct qca_device_data qca_soc_data_wcn3998 __maybe_unused = {
2061 .soc_type = QCA_WCN3998,
2062 .vregs = (struct qca_vreg []) {
2063 { "vddio", 10000 },
2064 { "vddxo", 80000 },
2065 { "vddrf", 300000 },
2066 { "vddch0", 450000 },
2067 },
2068 .num_vregs = 4,
2069};
2070
2071static const struct qca_device_data qca_soc_data_qca2066 __maybe_unused = {
2072 .soc_type = QCA_QCA2066,
2073 .num_vregs = 0,
2074 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2075};
2076
2077static const struct qca_device_data qca_soc_data_qca6390 __maybe_unused = {
2078 .soc_type = QCA_QCA6390,
2079 .num_vregs = 0,
2080};
2081
2082static const struct qca_device_data qca_soc_data_wcn6750 __maybe_unused = {
2083 .soc_type = QCA_WCN6750,
2084 .vregs = (struct qca_vreg []) {
2085 { "vddio", 5000 },
2086 { "vddaon", 26000 },
2087 { "vddbtcxmx", 126000 },
2088 { "vddrfacmn", 12500 },
2089 { "vddrfa0p8", 102000 },
2090 { "vddrfa1p7", 302000 },
2091 { "vddrfa1p2", 257000 },
2092 { "vddrfa2p2", 1700000 },
2093 { "vddasd", 200 },
2094 },
2095 .num_vregs = 9,
2096 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2097};
2098
2099static const struct qca_device_data qca_soc_data_wcn6855 __maybe_unused = {
2100 .soc_type = QCA_WCN6855,
2101 .vregs = (struct qca_vreg []) {
2102 { "vddio", 5000 },
2103 { "vddbtcxmx", 126000 },
2104 { "vddrfacmn", 12500 },
2105 { "vddrfa0p8", 102000 },
2106 { "vddrfa1p7", 302000 },
2107 { "vddrfa1p2", 257000 },
2108 },
2109 .num_vregs = 6,
2110 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2111};
2112
2113static const struct qca_device_data qca_soc_data_wcn7850 __maybe_unused = {
2114 .soc_type = QCA_WCN7850,
2115 .vregs = (struct qca_vreg []) {
2116 { "vddio", 5000 },
2117 { "vddaon", 26000 },
2118 { "vdddig", 126000 },
2119 { "vddrfa0p8", 102000 },
2120 { "vddrfa1p2", 257000 },
2121 { "vddrfa1p9", 302000 },
2122 },
2123 .num_vregs = 6,
2124 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2125};
2126
2127static void qca_power_shutdown(struct hci_uart *hu)
2128{
2129 struct qca_serdev *qcadev;
2130 struct qca_data *qca = hu->priv;
2131 unsigned long flags;
2132 enum qca_btsoc_type soc_type = qca_soc_type(hu);
2133 bool sw_ctrl_state;
2134
2135 /* From this point we go into power off state. But serial port is
2136 * still open, stop queueing the IBS data and flush all the buffered
2137 * data in skb's.
2138 */
2139 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
2140 set_bit(QCA_IBS_DISABLED, &qca->flags);
2141 qca_flush(hu);
2142 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
2143
2144 /* Non-serdev device usually is powered by external power
2145 * and don't need additional action in driver for power down
2146 */
2147 if (!hu->serdev)
2148 return;
2149
2150 qcadev = serdev_device_get_drvdata(hu->serdev);
2151
2152 switch (soc_type) {
2153 case QCA_WCN3988:
2154 case QCA_WCN3990:
2155 case QCA_WCN3991:
2156 case QCA_WCN3998:
2157 host_set_baudrate(hu, 2400);
2158 qca_send_power_pulse(hu, false);
2159 qca_regulator_disable(qcadev);
2160 break;
2161
2162 case QCA_WCN6750:
2163 case QCA_WCN6855:
2164 gpiod_set_value_cansleep(qcadev->bt_en, 0);
2165 msleep(100);
2166 qca_regulator_disable(qcadev);
2167 if (qcadev->sw_ctrl) {
2168 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl);
2169 bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state);
2170 }
2171 break;
2172
2173 default:
2174 gpiod_set_value_cansleep(qcadev->bt_en, 0);
2175 }
2176
2177 set_bit(QCA_BT_OFF, &qca->flags);
2178}
2179
2180static int qca_power_off(struct hci_dev *hdev)
2181{
2182 struct hci_uart *hu = hci_get_drvdata(hdev);
2183 struct qca_data *qca = hu->priv;
2184 enum qca_btsoc_type soc_type = qca_soc_type(hu);
2185
2186 hu->hdev->hw_error = NULL;
2187 hu->hdev->cmd_timeout = NULL;
2188
2189 del_timer_sync(&qca->wake_retrans_timer);
2190 del_timer_sync(&qca->tx_idle_timer);
2191
2192 /* Stop sending shutdown command if soc crashes. */
2193 if (soc_type != QCA_ROME
2194 && qca->memdump_state == QCA_MEMDUMP_IDLE) {
2195 qca_send_pre_shutdown_cmd(hdev);
2196 usleep_range(8000, 10000);
2197 }
2198
2199 qca_power_shutdown(hu);
2200 return 0;
2201}
2202
2203static int qca_regulator_enable(struct qca_serdev *qcadev)
2204{
2205 struct qca_power *power = qcadev->bt_power;
2206 int ret;
2207
2208 /* Already enabled */
2209 if (power->vregs_on)
2210 return 0;
2211
2212 BT_DBG("enabling %d regulators)", power->num_vregs);
2213
2214 ret = regulator_bulk_enable(power->num_vregs, power->vreg_bulk);
2215 if (ret)
2216 return ret;
2217
2218 power->vregs_on = true;
2219
2220 ret = clk_prepare_enable(qcadev->susclk);
2221 if (ret)
2222 qca_regulator_disable(qcadev);
2223
2224 return ret;
2225}
2226
2227static void qca_regulator_disable(struct qca_serdev *qcadev)
2228{
2229 struct qca_power *power;
2230
2231 if (!qcadev)
2232 return;
2233
2234 power = qcadev->bt_power;
2235
2236 /* Already disabled? */
2237 if (!power->vregs_on)
2238 return;
2239
2240 regulator_bulk_disable(power->num_vregs, power->vreg_bulk);
2241 power->vregs_on = false;
2242
2243 clk_disable_unprepare(qcadev->susclk);
2244}
2245
2246static int qca_init_regulators(struct qca_power *qca,
2247 const struct qca_vreg *vregs, size_t num_vregs)
2248{
2249 struct regulator_bulk_data *bulk;
2250 int ret;
2251 int i;
2252
2253 bulk = devm_kcalloc(qca->dev, num_vregs, sizeof(*bulk), GFP_KERNEL);
2254 if (!bulk)
2255 return -ENOMEM;
2256
2257 for (i = 0; i < num_vregs; i++)
2258 bulk[i].supply = vregs[i].name;
2259
2260 ret = devm_regulator_bulk_get(qca->dev, num_vregs, bulk);
2261 if (ret < 0)
2262 return ret;
2263
2264 for (i = 0; i < num_vregs; i++) {
2265 ret = regulator_set_load(bulk[i].consumer, vregs[i].load_uA);
2266 if (ret)
2267 return ret;
2268 }
2269
2270 qca->vreg_bulk = bulk;
2271 qca->num_vregs = num_vregs;
2272
2273 return 0;
2274}
2275
2276static int qca_serdev_probe(struct serdev_device *serdev)
2277{
2278 struct qca_serdev *qcadev;
2279 struct hci_dev *hdev;
2280 const struct qca_device_data *data;
2281 int err;
2282 bool power_ctrl_enabled = true;
2283
2284 qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL);
2285 if (!qcadev)
2286 return -ENOMEM;
2287
2288 qcadev->serdev_hu.serdev = serdev;
2289 data = device_get_match_data(&serdev->dev);
2290 serdev_device_set_drvdata(serdev, qcadev);
2291 device_property_read_string(&serdev->dev, "firmware-name",
2292 &qcadev->firmware_name);
2293 device_property_read_u32(&serdev->dev, "max-speed",
2294 &qcadev->oper_speed);
2295 if (!qcadev->oper_speed)
2296 BT_DBG("UART will pick default operating speed");
2297
2298 if (data)
2299 qcadev->btsoc_type = data->soc_type;
2300 else
2301 qcadev->btsoc_type = QCA_ROME;
2302
2303 switch (qcadev->btsoc_type) {
2304 case QCA_WCN3988:
2305 case QCA_WCN3990:
2306 case QCA_WCN3991:
2307 case QCA_WCN3998:
2308 case QCA_WCN6750:
2309 case QCA_WCN6855:
2310 case QCA_WCN7850:
2311 qcadev->bt_power = devm_kzalloc(&serdev->dev,
2312 sizeof(struct qca_power),
2313 GFP_KERNEL);
2314 if (!qcadev->bt_power)
2315 return -ENOMEM;
2316
2317 qcadev->bt_power->dev = &serdev->dev;
2318 err = qca_init_regulators(qcadev->bt_power, data->vregs,
2319 data->num_vregs);
2320 if (err) {
2321 BT_ERR("Failed to init regulators:%d", err);
2322 return err;
2323 }
2324
2325 qcadev->bt_power->vregs_on = false;
2326
2327 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable",
2328 GPIOD_OUT_LOW);
2329 if (IS_ERR_OR_NULL(qcadev->bt_en) &&
2330 (data->soc_type == QCA_WCN6750 ||
2331 data->soc_type == QCA_WCN6855)) {
2332 dev_err(&serdev->dev, "failed to acquire BT_EN gpio\n");
2333 power_ctrl_enabled = false;
2334 }
2335
2336 qcadev->sw_ctrl = devm_gpiod_get_optional(&serdev->dev, "swctrl",
2337 GPIOD_IN);
2338 if (IS_ERR_OR_NULL(qcadev->sw_ctrl) &&
2339 (data->soc_type == QCA_WCN6750 ||
2340 data->soc_type == QCA_WCN6855 ||
2341 data->soc_type == QCA_WCN7850))
2342 dev_warn(&serdev->dev, "failed to acquire SW_CTRL gpio\n");
2343
2344 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL);
2345 if (IS_ERR(qcadev->susclk)) {
2346 dev_err(&serdev->dev, "failed to acquire clk\n");
2347 return PTR_ERR(qcadev->susclk);
2348 }
2349
2350 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
2351 if (err) {
2352 BT_ERR("wcn3990 serdev registration failed");
2353 return err;
2354 }
2355 break;
2356
2357 default:
2358 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable",
2359 GPIOD_OUT_LOW);
2360 if (IS_ERR_OR_NULL(qcadev->bt_en)) {
2361 dev_warn(&serdev->dev, "failed to acquire enable gpio\n");
2362 power_ctrl_enabled = false;
2363 }
2364
2365 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL);
2366 if (IS_ERR(qcadev->susclk)) {
2367 dev_warn(&serdev->dev, "failed to acquire clk\n");
2368 return PTR_ERR(qcadev->susclk);
2369 }
2370 err = clk_set_rate(qcadev->susclk, SUSCLK_RATE_32KHZ);
2371 if (err)
2372 return err;
2373
2374 err = clk_prepare_enable(qcadev->susclk);
2375 if (err)
2376 return err;
2377
2378 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
2379 if (err) {
2380 BT_ERR("Rome serdev registration failed");
2381 clk_disable_unprepare(qcadev->susclk);
2382 return err;
2383 }
2384 }
2385
2386 hdev = qcadev->serdev_hu.hdev;
2387
2388 if (power_ctrl_enabled) {
2389 set_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks);
2390 hdev->shutdown = qca_power_off;
2391 }
2392
2393 if (data) {
2394 /* Wideband speech support must be set per driver since it can't
2395 * be queried via hci. Same with the valid le states quirk.
2396 */
2397 if (data->capabilities & QCA_CAP_WIDEBAND_SPEECH)
2398 set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED,
2399 &hdev->quirks);
2400
2401 if (data->capabilities & QCA_CAP_VALID_LE_STATES)
2402 set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks);
2403 }
2404
2405 return 0;
2406}
2407
2408static void qca_serdev_remove(struct serdev_device *serdev)
2409{
2410 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2411 struct qca_power *power = qcadev->bt_power;
2412
2413 switch (qcadev->btsoc_type) {
2414 case QCA_WCN3988:
2415 case QCA_WCN3990:
2416 case QCA_WCN3991:
2417 case QCA_WCN3998:
2418 case QCA_WCN6750:
2419 case QCA_WCN6855:
2420 case QCA_WCN7850:
2421 if (power->vregs_on) {
2422 qca_power_shutdown(&qcadev->serdev_hu);
2423 break;
2424 }
2425 fallthrough;
2426
2427 default:
2428 if (qcadev->susclk)
2429 clk_disable_unprepare(qcadev->susclk);
2430 }
2431
2432 hci_uart_unregister_device(&qcadev->serdev_hu);
2433}
2434
2435static void qca_serdev_shutdown(struct device *dev)
2436{
2437 int ret;
2438 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
2439 struct serdev_device *serdev = to_serdev_device(dev);
2440 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2441 struct hci_uart *hu = &qcadev->serdev_hu;
2442 struct hci_dev *hdev = hu->hdev;
2443 struct qca_data *qca = hu->priv;
2444 const u8 ibs_wake_cmd[] = { 0xFD };
2445 const u8 edl_reset_soc_cmd[] = { 0x01, 0x00, 0xFC, 0x01, 0x05 };
2446
2447 if (qcadev->btsoc_type == QCA_QCA6390) {
2448 if (test_bit(QCA_BT_OFF, &qca->flags) ||
2449 !test_bit(HCI_RUNNING, &hdev->flags))
2450 return;
2451
2452 serdev_device_write_flush(serdev);
2453 ret = serdev_device_write_buf(serdev, ibs_wake_cmd,
2454 sizeof(ibs_wake_cmd));
2455 if (ret < 0) {
2456 BT_ERR("QCA send IBS_WAKE_IND error: %d", ret);
2457 return;
2458 }
2459 serdev_device_wait_until_sent(serdev, timeout);
2460 usleep_range(8000, 10000);
2461
2462 serdev_device_write_flush(serdev);
2463 ret = serdev_device_write_buf(serdev, edl_reset_soc_cmd,
2464 sizeof(edl_reset_soc_cmd));
2465 if (ret < 0) {
2466 BT_ERR("QCA send EDL_RESET_REQ error: %d", ret);
2467 return;
2468 }
2469 serdev_device_wait_until_sent(serdev, timeout);
2470 usleep_range(8000, 10000);
2471 }
2472}
2473
2474static int __maybe_unused qca_suspend(struct device *dev)
2475{
2476 struct serdev_device *serdev = to_serdev_device(dev);
2477 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2478 struct hci_uart *hu = &qcadev->serdev_hu;
2479 struct qca_data *qca = hu->priv;
2480 unsigned long flags;
2481 bool tx_pending = false;
2482 int ret = 0;
2483 u8 cmd;
2484 u32 wait_timeout = 0;
2485
2486 set_bit(QCA_SUSPENDING, &qca->flags);
2487
2488 /* if BT SoC is running with default firmware then it does not
2489 * support in-band sleep
2490 */
2491 if (test_bit(QCA_ROM_FW, &qca->flags))
2492 return 0;
2493
2494 /* During SSR after memory dump collection, controller will be
2495 * powered off and then powered on.If controller is powered off
2496 * during SSR then we should wait until SSR is completed.
2497 */
2498 if (test_bit(QCA_BT_OFF, &qca->flags) &&
2499 !test_bit(QCA_SSR_TRIGGERED, &qca->flags))
2500 return 0;
2501
2502 if (test_bit(QCA_IBS_DISABLED, &qca->flags) ||
2503 test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
2504 wait_timeout = test_bit(QCA_SSR_TRIGGERED, &qca->flags) ?
2505 IBS_DISABLE_SSR_TIMEOUT_MS :
2506 FW_DOWNLOAD_TIMEOUT_MS;
2507
2508 /* QCA_IBS_DISABLED flag is set to true, During FW download
2509 * and during memory dump collection. It is reset to false,
2510 * After FW download complete.
2511 */
2512 wait_on_bit_timeout(&qca->flags, QCA_IBS_DISABLED,
2513 TASK_UNINTERRUPTIBLE, msecs_to_jiffies(wait_timeout));
2514
2515 if (test_bit(QCA_IBS_DISABLED, &qca->flags)) {
2516 bt_dev_err(hu->hdev, "SSR or FW download time out");
2517 ret = -ETIMEDOUT;
2518 goto error;
2519 }
2520 }
2521
2522 cancel_work_sync(&qca->ws_awake_device);
2523 cancel_work_sync(&qca->ws_awake_rx);
2524
2525 spin_lock_irqsave_nested(&qca->hci_ibs_lock,
2526 flags, SINGLE_DEPTH_NESTING);
2527
2528 switch (qca->tx_ibs_state) {
2529 case HCI_IBS_TX_WAKING:
2530 del_timer(&qca->wake_retrans_timer);
2531 fallthrough;
2532 case HCI_IBS_TX_AWAKE:
2533 del_timer(&qca->tx_idle_timer);
2534
2535 serdev_device_write_flush(hu->serdev);
2536 cmd = HCI_IBS_SLEEP_IND;
2537 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
2538
2539 if (ret < 0) {
2540 BT_ERR("Failed to send SLEEP to device");
2541 break;
2542 }
2543
2544 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
2545 qca->ibs_sent_slps++;
2546 tx_pending = true;
2547 break;
2548
2549 case HCI_IBS_TX_ASLEEP:
2550 break;
2551
2552 default:
2553 BT_ERR("Spurious tx state %d", qca->tx_ibs_state);
2554 ret = -EINVAL;
2555 break;
2556 }
2557
2558 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
2559
2560 if (ret < 0)
2561 goto error;
2562
2563 if (tx_pending) {
2564 serdev_device_wait_until_sent(hu->serdev,
2565 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
2566 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
2567 }
2568
2569 /* Wait for HCI_IBS_SLEEP_IND sent by device to indicate its Tx is going
2570 * to sleep, so that the packet does not wake the system later.
2571 */
2572 ret = wait_event_interruptible_timeout(qca->suspend_wait_q,
2573 qca->rx_ibs_state == HCI_IBS_RX_ASLEEP,
2574 msecs_to_jiffies(IBS_BTSOC_TX_IDLE_TIMEOUT_MS));
2575 if (ret == 0) {
2576 ret = -ETIMEDOUT;
2577 goto error;
2578 }
2579
2580 return 0;
2581
2582error:
2583 clear_bit(QCA_SUSPENDING, &qca->flags);
2584
2585 return ret;
2586}
2587
2588static int __maybe_unused qca_resume(struct device *dev)
2589{
2590 struct serdev_device *serdev = to_serdev_device(dev);
2591 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2592 struct hci_uart *hu = &qcadev->serdev_hu;
2593 struct qca_data *qca = hu->priv;
2594
2595 clear_bit(QCA_SUSPENDING, &qca->flags);
2596
2597 return 0;
2598}
2599
2600static SIMPLE_DEV_PM_OPS(qca_pm_ops, qca_suspend, qca_resume);
2601
2602#ifdef CONFIG_OF
2603static const struct of_device_id qca_bluetooth_of_match[] = {
2604 { .compatible = "qcom,qca2066-bt", .data = &qca_soc_data_qca2066},
2605 { .compatible = "qcom,qca6174-bt" },
2606 { .compatible = "qcom,qca6390-bt", .data = &qca_soc_data_qca6390},
2607 { .compatible = "qcom,qca9377-bt" },
2608 { .compatible = "qcom,wcn3988-bt", .data = &qca_soc_data_wcn3988},
2609 { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990},
2610 { .compatible = "qcom,wcn3991-bt", .data = &qca_soc_data_wcn3991},
2611 { .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998},
2612 { .compatible = "qcom,wcn6750-bt", .data = &qca_soc_data_wcn6750},
2613 { .compatible = "qcom,wcn6855-bt", .data = &qca_soc_data_wcn6855},
2614 { .compatible = "qcom,wcn7850-bt", .data = &qca_soc_data_wcn7850},
2615 { /* sentinel */ }
2616};
2617MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match);
2618#endif
2619
2620#ifdef CONFIG_ACPI
2621static const struct acpi_device_id qca_bluetooth_acpi_match[] = {
2622 { "QCOM2066", (kernel_ulong_t)&qca_soc_data_qca2066 },
2623 { "QCOM6390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2624 { "DLA16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2625 { "DLB16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2626 { "DLB26390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2627 { },
2628};
2629MODULE_DEVICE_TABLE(acpi, qca_bluetooth_acpi_match);
2630#endif
2631
2632#ifdef CONFIG_DEV_COREDUMP
2633static void hciqca_coredump(struct device *dev)
2634{
2635 struct serdev_device *serdev = to_serdev_device(dev);
2636 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2637 struct hci_uart *hu = &qcadev->serdev_hu;
2638 struct hci_dev *hdev = hu->hdev;
2639
2640 if (hdev->dump.coredump)
2641 hdev->dump.coredump(hdev);
2642}
2643#endif
2644
2645static struct serdev_device_driver qca_serdev_driver = {
2646 .probe = qca_serdev_probe,
2647 .remove = qca_serdev_remove,
2648 .driver = {
2649 .name = "hci_uart_qca",
2650 .of_match_table = of_match_ptr(qca_bluetooth_of_match),
2651 .acpi_match_table = ACPI_PTR(qca_bluetooth_acpi_match),
2652 .shutdown = qca_serdev_shutdown,
2653 .pm = &qca_pm_ops,
2654#ifdef CONFIG_DEV_COREDUMP
2655 .coredump = hciqca_coredump,
2656#endif
2657 },
2658};
2659
2660int __init qca_init(void)
2661{
2662 serdev_device_driver_register(&qca_serdev_driver);
2663
2664 return hci_uart_register_proto(&qca_proto);
2665}
2666
2667int __exit qca_deinit(void)
2668{
2669 serdev_device_driver_unregister(&qca_serdev_driver);
2670
2671 return hci_uart_unregister_proto(&qca_proto);
2672}