1/*
  2 * linux/include/arm/hardware/it8152.h
  3 *
  4 * Copyright Compulab Ltd., 2006,2007
  5 * Mike Rapoport <mike@compulab.co.il>
  6 *
  7 * ITE 8152 companion chip register definitions
  8 */
  9
 10#ifndef __ASM_HARDWARE_IT8152_H
 11#define __ASM_HARDWARE_IT8152_H
 12extern unsigned long it8152_base_address;
 13
 14#define IT8152_IO_BASE			(it8152_base_address + 0x03e00000)
 15#define IT8152_CFGREG_BASE		(it8152_base_address + 0x03f00000)
 16
 17#define __REG_IT8152(x)			(it8152_base_address + (x))
 18
 19#define IT8152_PCI_CFG_ADDR		__REG_IT8152(0x3f00800)
 20#define IT8152_PCI_CFG_DATA		__REG_IT8152(0x3f00804)
 21
 22#define IT8152_INTC_LDCNIRR		__REG_IT8152(0x3f00300)
 23#define IT8152_INTC_LDPNIRR		__REG_IT8152(0x3f00304)
 24#define IT8152_INTC_LDCNIMR		__REG_IT8152(0x3f00308)
 25#define IT8152_INTC_LDPNIMR		__REG_IT8152(0x3f0030C)
 26#define IT8152_INTC_LDNITR		__REG_IT8152(0x3f00310)
 27#define IT8152_INTC_LDNIAR		__REG_IT8152(0x3f00314)
 28#define IT8152_INTC_LPCNIRR		__REG_IT8152(0x3f00320)
 29#define IT8152_INTC_LPPNIRR		__REG_IT8152(0x3f00324)
 30#define IT8152_INTC_LPCNIMR		__REG_IT8152(0x3f00328)
 31#define IT8152_INTC_LPPNIMR		__REG_IT8152(0x3f0032C)
 32#define IT8152_INTC_LPNITR		__REG_IT8152(0x3f00330)
 33#define IT8152_INTC_LPNIAR		__REG_IT8152(0x3f00334)
 34#define IT8152_INTC_PDCNIRR		__REG_IT8152(0x3f00340)
 35#define IT8152_INTC_PDPNIRR		__REG_IT8152(0x3f00344)
 36#define IT8152_INTC_PDCNIMR		__REG_IT8152(0x3f00348)
 37#define IT8152_INTC_PDPNIMR		__REG_IT8152(0x3f0034C)
 38#define IT8152_INTC_PDNITR		__REG_IT8152(0x3f00350)
 39#define IT8152_INTC_PDNIAR		__REG_IT8152(0x3f00354)
 40#define IT8152_INTC_INTC_TYPER		__REG_IT8152(0x3f003FC)
 41
 42#define IT8152_GPIO_GPDR		__REG_IT8152(0x3f00500)
 43
 44/*
 45  Interrupt controller per register summary:
 46  ---------------------------------------
 47  LCDNIRR:
 48  IT8152_LD_IRQ(8) PCICLK stop
 49  IT8152_LD_IRQ(7) MCLK ready
 50  IT8152_LD_IRQ(6) s/w
 51  IT8152_LD_IRQ(5) UART
 52  IT8152_LD_IRQ(4) GPIO
 53  IT8152_LD_IRQ(3) TIMER 4
 54  IT8152_LD_IRQ(2) TIMER 3
 55  IT8152_LD_IRQ(1) TIMER 2
 56  IT8152_LD_IRQ(0) TIMER 1
 57
 58  LPCNIRR:
 59  IT8152_LP_IRQ(x) serial IRQ x
 60
 61  PCIDNIRR:
 62  IT8152_PD_IRQ(14) PCISERR
 63  IT8152_PD_IRQ(13) CPU/PCI bridge target abort (h2pTADR)
 64  IT8152_PD_IRQ(12) CPU/PCI bridge master abort (h2pMADR)
 65  IT8152_PD_IRQ(11) PCI INTD
 66  IT8152_PD_IRQ(10) PCI INTC
 67  IT8152_PD_IRQ(9)  PCI INTB
 68  IT8152_PD_IRQ(8)  PCI INTA
 69  IT8152_PD_IRQ(7)  serial INTD
 70  IT8152_PD_IRQ(6)  serial INTC
 71  IT8152_PD_IRQ(5)  serial INTB
 72  IT8152_PD_IRQ(4)  serial INTA
 73  IT8152_PD_IRQ(3)  serial IRQ IOCHK (IOCHKR)
 74  IT8152_PD_IRQ(2)  chaining DMA (CDMAR)
 75  IT8152_PD_IRQ(1)  USB (USBR)
 76  IT8152_PD_IRQ(0)  Audio controller (ACR)
 77 */
 78#define IT8152_IRQ(x)   (IRQ_BOARD_START + (x))
 79#define IT8152_LAST_IRQ	(IRQ_BOARD_START + 40)
 80
 81/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
 82#define IT8152_LD_IRQ_COUNT     9
 83#define IT8152_LP_IRQ_COUNT     16
 84#define IT8152_PD_IRQ_COUNT     15
 85
 86/* Priorities: */
 87#define IT8152_PD_IRQ(i)        IT8152_IRQ(i)
 88#define IT8152_LP_IRQ(i)        (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT)
 89#define IT8152_LD_IRQ(i)        (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT)
 90
 91/* frequently used interrupts */
 92#define IT8152_PCISERR		IT8152_PD_IRQ(14)
 93#define IT8152_H2PTADR		IT8152_PD_IRQ(13)
 94#define IT8152_H2PMAR		IT8152_PD_IRQ(12)
 95#define IT8152_PCI_INTD		IT8152_PD_IRQ(11)
 96#define IT8152_PCI_INTC		IT8152_PD_IRQ(10)
 97#define IT8152_PCI_INTB		IT8152_PD_IRQ(9)
 98#define IT8152_PCI_INTA		IT8152_PD_IRQ(8)
 99#define IT8152_CDMA_INT		IT8152_PD_IRQ(2)
100#define IT8152_USB_INT		IT8152_PD_IRQ(1)
101#define IT8152_AUDIO_INT	IT8152_PD_IRQ(0)
102
103struct pci_dev;
104struct pci_sys_data;
105
106extern void it8152_irq_demux(unsigned int irq, struct irq_desc *desc);
107extern void it8152_init_irq(void);
108extern int it8152_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
109extern int it8152_pci_setup(int nr, struct pci_sys_data *sys);
110extern struct pci_bus *it8152_pci_scan_bus(int nr, struct pci_sys_data *sys);
111
112#endif /* __ASM_HARDWARE_IT8152_H */