1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * eeprom specific definitions for mac80211 Prism54 drivers
  4 *
  5 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
  6 * Copyright (c) 2007-2009, Christian Lamparter <chunkeey@web.de>
  7 *
  8 * Based on:
  9 * - the islsm (softmac prism54) driver, which is:
 10 *   Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
 11 *
 12 * - LMAC API interface header file for STLC4560 (lmac_longbow.h)
 13 *   Copyright (C) 2007 Conexant Systems, Inc.
 14 *
 15 * - islmvc driver
 16 *   Copyright (C) 2001 Intersil Americas Inc.
 17 */
 18
 19#ifndef EEPROM_H
 20#define EEPROM_H
 21
 22/* PDA defines are Copyright (C) 2005 Nokia Corporation (taken from islsm_pda.h) */
 23
 24struct pda_entry {
 25	__le16 len;	/* includes both code and data */
 26	__le16 code;
 27	u8 data[];
 28} __packed;
 29
 30struct eeprom_pda_wrap {
 31	__le32 magic;
 32	__le16 pad;
 33	__le16 len;
 34	__le32 arm_opcode;
 35	u8 data[];
 36} __packed;
 37
 38struct p54_iq_autocal_entry {
 39	__le16 iq_param[4];
 40} __packed;
 41
 42struct pda_iq_autocal_entry {
 43	__le16 freq;
 44	struct p54_iq_autocal_entry params;
 45} __packed;
 46
 47struct pda_channel_output_limit {
 48	__le16 freq;
 49	u8 val_bpsk;
 50	u8 val_qpsk;
 51	u8 val_16qam;
 52	u8 val_64qam;
 53	u8 rate_set_mask;
 54	u8 rate_set_size;
 55} __packed;
 56
 57struct pda_channel_output_limit_point_longbow {
 58	__le16 val_bpsk;
 59	__le16 val_qpsk;
 60	__le16 val_16qam;
 61	__le16 val_64qam;
 62} __packed;
 63
 64struct pda_channel_output_limit_longbow {
 65	__le16 freq;
 66	struct pda_channel_output_limit_point_longbow point[3];
 67} __packed;
 68
 69struct pda_pa_curve_data_sample_rev0 {
 70	u8 rf_power;
 71	u8 pa_detector;
 72	u8 pcv;
 73} __packed;
 74
 75struct pda_pa_curve_data_sample_rev1 {
 76	u8 rf_power;
 77	u8 pa_detector;
 78	u8 data_barker;
 79	u8 data_bpsk;
 80	u8 data_qpsk;
 81	u8 data_16qam;
 82	u8 data_64qam;
 83} __packed;
 84
 85struct pda_pa_curve_data {
 86	u8 cal_method_rev;
 87	u8 channels;
 88	u8 points_per_channel;
 89	u8 padding;
 90	u8 data[];
 91} __packed;
 92
 93struct pda_rssi_cal_ext_entry {
 94	__le16 freq;
 95	__le16 mul;
 96	__le16 add;
 97} __packed;
 98
 99struct pda_rssi_cal_entry {
100	__le16 mul;
101	__le16 add;
102} __packed;
103
104struct pda_country {
105	u8 regdomain;
106	u8 alpha2[2];
107	u8 flags;
108} __packed;
109
110struct pda_antenna_gain {
111	DECLARE_FLEX_ARRAY(struct {
112		u8 gain_5GHz;	/* 0.25 dBi units */
113		u8 gain_2GHz;	/* 0.25 dBi units */
114	} __packed, antenna);
115} __packed;
116
117struct pda_custom_wrapper {
118	__le16 entries;
119	__le16 entry_size;
120	__le16 offset;
121	__le16 len;
122	u8 data[];
123} __packed;
124
125/*
126 * this defines the PDR codes used to build PDAs as defined in document
127 * number 553155. The current implementation mirrors version 1.1 of the
128 * document and lists only PDRs supported by the ARM platform.
129 */
130
131/* common and choice range (0x0000 - 0x0fff) */
132#define PDR_END					0x0000
133#define PDR_MANUFACTURING_PART_NUMBER		0x0001
134#define PDR_PDA_VERSION				0x0002
135#define PDR_NIC_SERIAL_NUMBER			0x0003
136#define PDR_NIC_RAM_SIZE			0x0005
137#define PDR_RFMODEM_SUP_RANGE			0x0006
138#define PDR_PRISM_MAC_SUP_RANGE			0x0007
139#define PDR_NIC_ID				0x0008
140
141#define PDR_MAC_ADDRESS				0x0101
142#define PDR_REGULATORY_DOMAIN_LIST		0x0103 /* obsolete */
143#define PDR_ALLOWED_CHAN_SET			0x0104
144#define PDR_DEFAULT_CHAN			0x0105
145#define PDR_TEMPERATURE_TYPE			0x0107
146
147#define PDR_IFR_SETTING				0x0200
148#define PDR_RFR_SETTING				0x0201
149#define PDR_3861_BASELINE_REG_SETTINGS		0x0202
150#define PDR_3861_SHADOW_REG_SETTINGS		0x0203
151#define PDR_3861_IFRF_REG_SETTINGS		0x0204
152
153#define PDR_3861_CHAN_CALIB_SET_POINTS		0x0300
154#define PDR_3861_CHAN_CALIB_INTEGRATOR		0x0301
155
156#define PDR_3842_PRISM_II_NIC_CONFIG		0x0400
157#define PDR_PRISM_USB_ID			0x0401
158#define PDR_PRISM_PCI_ID			0x0402
159#define PDR_PRISM_PCI_IF_CONFIG			0x0403
160#define PDR_PRISM_PCI_PM_CONFIG			0x0404
161
162#define PDR_3861_MF_TEST_CHAN_SET_POINTS	0x0900
163#define PDR_3861_MF_TEST_CHAN_INTEGRATORS	0x0901
164
165/* ARM range (0x1000 - 0x1fff) */
166#define PDR_COUNTRY_INFORMATION			0x1000 /* obsolete */
167#define PDR_INTERFACE_LIST			0x1001
168#define PDR_HARDWARE_PLATFORM_COMPONENT_ID	0x1002
169#define PDR_OEM_NAME				0x1003
170#define PDR_PRODUCT_NAME			0x1004
171#define PDR_UTF8_OEM_NAME			0x1005
172#define PDR_UTF8_PRODUCT_NAME			0x1006
173#define PDR_COUNTRY_LIST			0x1007
174#define PDR_DEFAULT_COUNTRY			0x1008
175
176#define PDR_ANTENNA_GAIN			0x1100
177
178#define PDR_PRISM_INDIGO_PA_CALIBRATION_DATA	0x1901
179#define PDR_RSSI_LINEAR_APPROXIMATION		0x1902
180#define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS	0x1903
181#define PDR_PRISM_PA_CAL_CURVE_DATA		0x1904
182#define PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND	0x1905
183#define PDR_PRISM_ZIF_TX_IQ_CALIBRATION		0x1906
184#define PDR_REGULATORY_POWER_LIMITS		0x1907
185#define PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED	0x1908
186#define PDR_RADIATED_TRANSMISSION_CORRECTION	0x1909
187#define PDR_PRISM_TX_IQ_CALIBRATION		0x190a
188
189/* reserved range (0x2000 - 0x7fff) */
190
191/* customer range (0x8000 - 0xffff) */
192#define PDR_BASEBAND_REGISTERS				0x8000
193#define PDR_PER_CHANNEL_BASEBAND_REGISTERS		0x8001
194
195/* used by our modificated eeprom image */
196#define PDR_RSSI_LINEAR_APPROXIMATION_CUSTOM		0xDEAD
197#define PDR_RSSI_LINEAR_APPROXIMATION_CUSTOMV2		0xCAFF
198#define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS_CUSTOM	0xBEEF
199#define PDR_PRISM_PA_CAL_CURVE_DATA_CUSTOM		0xB05D
200
201/* Interface Definitions */
202#define PDR_INTERFACE_ROLE_SERVER	0x0000
203#define PDR_INTERFACE_ROLE_CLIENT	0x0001
204
205/* PDR definitions for default country & country list */
206#define PDR_COUNTRY_CERT_CODE		0x80
207#define PDR_COUNTRY_CERT_CODE_REAL	0x00
208#define PDR_COUNTRY_CERT_CODE_PSEUDO	0x80
209#define PDR_COUNTRY_CERT_BAND		0x40
210#define PDR_COUNTRY_CERT_BAND_2GHZ	0x00
211#define PDR_COUNTRY_CERT_BAND_5GHZ	0x40
212#define PDR_COUNTRY_CERT_IODOOR		0x30
213#define PDR_COUNTRY_CERT_IODOOR_BOTH	0x00
214#define PDR_COUNTRY_CERT_IODOOR_INDOOR	0x20
215#define PDR_COUNTRY_CERT_IODOOR_OUTDOOR	0x30
216#define PDR_COUNTRY_CERT_INDEX		0x0f
217
218/* Specific LMAC FW/HW variant definitions */
219#define PDR_SYNTH_FRONTEND_MASK		0x0007
220#define PDR_SYNTH_FRONTEND_DUETTE3	0x0001
221#define PDR_SYNTH_FRONTEND_DUETTE2	0x0002
222#define PDR_SYNTH_FRONTEND_FRISBEE	0x0003
223#define PDR_SYNTH_FRONTEND_XBOW		0x0004
224#define PDR_SYNTH_FRONTEND_LONGBOW	0x0005
225#define PDR_SYNTH_IQ_CAL_MASK		0x0018
226#define PDR_SYNTH_IQ_CAL_PA_DETECTOR	0x0000
227#define PDR_SYNTH_IQ_CAL_DISABLED	0x0008
228#define PDR_SYNTH_IQ_CAL_ZIF		0x0010
229#define PDR_SYNTH_FAA_SWITCH_MASK	0x0020
230#define PDR_SYNTH_FAA_SWITCH_ENABLED	0x0020
231#define PDR_SYNTH_24_GHZ_MASK		0x0040
232#define PDR_SYNTH_24_GHZ_DISABLED	0x0040
233#define PDR_SYNTH_5_GHZ_MASK		0x0080
234#define PDR_SYNTH_5_GHZ_DISABLED	0x0080
235#define PDR_SYNTH_RX_DIV_MASK		0x0100
236#define PDR_SYNTH_RX_DIV_SUPPORTED	0x0100
237#define PDR_SYNTH_TX_DIV_MASK		0x0200
238#define PDR_SYNTH_TX_DIV_SUPPORTED	0x0200
239#define PDR_SYNTH_ASM_MASK		0x0400
240#define PDR_SYNTH_ASM_XSWON		0x0400
241
242#endif /* EEPROM_H */