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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright(C) 2015 Linaro Limited. All rights reserved.
4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
5 */
6
7#include <linux/coresight.h>
8#include <linux/coresight-pmu.h>
9#include <linux/cpumask.h>
10#include <linux/device.h>
11#include <linux/list.h>
12#include <linux/mm.h>
13#include <linux/init.h>
14#include <linux/perf_event.h>
15#include <linux/percpu-defs.h>
16#include <linux/slab.h>
17#include <linux/stringhash.h>
18#include <linux/types.h>
19#include <linux/workqueue.h>
20
21#include "coresight-config.h"
22#include "coresight-etm-perf.h"
23#include "coresight-priv.h"
24#include "coresight-syscfg.h"
25
26static struct pmu etm_pmu;
27static bool etm_perf_up;
28
29/*
30 * An ETM context for a running event includes the perf aux handle
31 * and aux_data. For ETM, the aux_data (etm_event_data), consists of
32 * the trace path and the sink configuration. The event data is accessible
33 * via perf_get_aux(handle). However, a sink could "end" a perf output
34 * handle via the IRQ handler. And if the "sink" encounters a failure
35 * to "begin" another session (e.g due to lack of space in the buffer),
36 * the handle will be cleared. Thus, the event_data may not be accessible
37 * from the handle when we get to the etm_event_stop(), which is required
38 * for stopping the trace path. The event_data is guaranteed to stay alive
39 * until "free_aux()", which cannot happen as long as the event is active on
40 * the ETM. Thus the event_data for the session must be part of the ETM context
41 * to make sure we can disable the trace path.
42 */
43struct etm_ctxt {
44 struct perf_output_handle handle;
45 struct etm_event_data *event_data;
46};
47
48static DEFINE_PER_CPU(struct etm_ctxt, etm_ctxt);
49static DEFINE_PER_CPU(struct coresight_device *, csdev_src);
50
51/*
52 * The PMU formats were orignally for ETMv3.5/PTM's ETMCR 'config';
53 * now take them as general formats and apply on all ETMs.
54 */
55PMU_FORMAT_ATTR(branch_broadcast, "config:"__stringify(ETM_OPT_BRANCH_BROADCAST));
56PMU_FORMAT_ATTR(cycacc, "config:" __stringify(ETM_OPT_CYCACC));
57/* contextid1 enables tracing CONTEXTIDR_EL1 for ETMv4 */
58PMU_FORMAT_ATTR(contextid1, "config:" __stringify(ETM_OPT_CTXTID));
59/* contextid2 enables tracing CONTEXTIDR_EL2 for ETMv4 */
60PMU_FORMAT_ATTR(contextid2, "config:" __stringify(ETM_OPT_CTXTID2));
61PMU_FORMAT_ATTR(timestamp, "config:" __stringify(ETM_OPT_TS));
62PMU_FORMAT_ATTR(retstack, "config:" __stringify(ETM_OPT_RETSTK));
63/* preset - if sink ID is used as a configuration selector */
64PMU_FORMAT_ATTR(preset, "config:0-3");
65/* Sink ID - same for all ETMs */
66PMU_FORMAT_ATTR(sinkid, "config2:0-31");
67/* config ID - set if a system configuration is selected */
68PMU_FORMAT_ATTR(configid, "config2:32-63");
69
70
71/*
72 * contextid always traces the "PID". The PID is in CONTEXTIDR_EL1
73 * when the kernel is running at EL1; when the kernel is at EL2,
74 * the PID is in CONTEXTIDR_EL2.
75 */
76static ssize_t format_attr_contextid_show(struct device *dev,
77 struct device_attribute *attr,
78 char *page)
79{
80 int pid_fmt = ETM_OPT_CTXTID;
81
82#if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM4X)
83 pid_fmt = is_kernel_in_hyp_mode() ? ETM_OPT_CTXTID2 : ETM_OPT_CTXTID;
84#endif
85 return sprintf(page, "config:%d\n", pid_fmt);
86}
87
88static struct device_attribute format_attr_contextid =
89 __ATTR(contextid, 0444, format_attr_contextid_show, NULL);
90
91static struct attribute *etm_config_formats_attr[] = {
92 &format_attr_cycacc.attr,
93 &format_attr_contextid.attr,
94 &format_attr_contextid1.attr,
95 &format_attr_contextid2.attr,
96 &format_attr_timestamp.attr,
97 &format_attr_retstack.attr,
98 &format_attr_sinkid.attr,
99 &format_attr_preset.attr,
100 &format_attr_configid.attr,
101 &format_attr_branch_broadcast.attr,
102 NULL,
103};
104
105static const struct attribute_group etm_pmu_format_group = {
106 .name = "format",
107 .attrs = etm_config_formats_attr,
108};
109
110static struct attribute *etm_config_sinks_attr[] = {
111 NULL,
112};
113
114static const struct attribute_group etm_pmu_sinks_group = {
115 .name = "sinks",
116 .attrs = etm_config_sinks_attr,
117};
118
119static struct attribute *etm_config_events_attr[] = {
120 NULL,
121};
122
123static const struct attribute_group etm_pmu_events_group = {
124 .name = "events",
125 .attrs = etm_config_events_attr,
126};
127
128static const struct attribute_group *etm_pmu_attr_groups[] = {
129 &etm_pmu_format_group,
130 &etm_pmu_sinks_group,
131 &etm_pmu_events_group,
132 NULL,
133};
134
135static inline struct list_head **
136etm_event_cpu_path_ptr(struct etm_event_data *data, int cpu)
137{
138 return per_cpu_ptr(data->path, cpu);
139}
140
141static inline struct list_head *
142etm_event_cpu_path(struct etm_event_data *data, int cpu)
143{
144 return *etm_event_cpu_path_ptr(data, cpu);
145}
146
147static void etm_event_read(struct perf_event *event) {}
148
149static int etm_addr_filters_alloc(struct perf_event *event)
150{
151 struct etm_filters *filters;
152 int node = event->cpu == -1 ? -1 : cpu_to_node(event->cpu);
153
154 filters = kzalloc_node(sizeof(struct etm_filters), GFP_KERNEL, node);
155 if (!filters)
156 return -ENOMEM;
157
158 if (event->parent)
159 memcpy(filters, event->parent->hw.addr_filters,
160 sizeof(*filters));
161
162 event->hw.addr_filters = filters;
163
164 return 0;
165}
166
167static void etm_event_destroy(struct perf_event *event)
168{
169 kfree(event->hw.addr_filters);
170 event->hw.addr_filters = NULL;
171}
172
173static int etm_event_init(struct perf_event *event)
174{
175 int ret = 0;
176
177 if (event->attr.type != etm_pmu.type) {
178 ret = -ENOENT;
179 goto out;
180 }
181
182 ret = etm_addr_filters_alloc(event);
183 if (ret)
184 goto out;
185
186 event->destroy = etm_event_destroy;
187out:
188 return ret;
189}
190
191static void free_sink_buffer(struct etm_event_data *event_data)
192{
193 int cpu;
194 cpumask_t *mask = &event_data->mask;
195 struct coresight_device *sink;
196
197 if (!event_data->snk_config)
198 return;
199
200 if (WARN_ON(cpumask_empty(mask)))
201 return;
202
203 cpu = cpumask_first(mask);
204 sink = coresight_get_sink(etm_event_cpu_path(event_data, cpu));
205 sink_ops(sink)->free_buffer(event_data->snk_config);
206}
207
208static void free_event_data(struct work_struct *work)
209{
210 int cpu;
211 cpumask_t *mask;
212 struct etm_event_data *event_data;
213
214 event_data = container_of(work, struct etm_event_data, work);
215 mask = &event_data->mask;
216
217 /* Free the sink buffers, if there are any */
218 free_sink_buffer(event_data);
219
220 /* clear any configuration we were using */
221 if (event_data->cfg_hash)
222 cscfg_deactivate_config(event_data->cfg_hash);
223
224 for_each_cpu(cpu, mask) {
225 struct list_head **ppath;
226
227 ppath = etm_event_cpu_path_ptr(event_data, cpu);
228 if (!(IS_ERR_OR_NULL(*ppath)))
229 coresight_release_path(*ppath);
230 *ppath = NULL;
231 }
232
233 free_percpu(event_data->path);
234 kfree(event_data);
235}
236
237static void *alloc_event_data(int cpu)
238{
239 cpumask_t *mask;
240 struct etm_event_data *event_data;
241
242 /* First get memory for the session's data */
243 event_data = kzalloc(sizeof(struct etm_event_data), GFP_KERNEL);
244 if (!event_data)
245 return NULL;
246
247
248 mask = &event_data->mask;
249 if (cpu != -1)
250 cpumask_set_cpu(cpu, mask);
251 else
252 cpumask_copy(mask, cpu_present_mask);
253
254 /*
255 * Each CPU has a single path between source and destination. As such
256 * allocate an array using CPU numbers as indexes. That way a path
257 * for any CPU can easily be accessed at any given time. We proceed
258 * the same way for sessions involving a single CPU. The cost of
259 * unused memory when dealing with single CPU trace scenarios is small
260 * compared to the cost of searching through an optimized array.
261 */
262 event_data->path = alloc_percpu(struct list_head *);
263
264 if (!event_data->path) {
265 kfree(event_data);
266 return NULL;
267 }
268
269 return event_data;
270}
271
272static void etm_free_aux(void *data)
273{
274 struct etm_event_data *event_data = data;
275
276 schedule_work(&event_data->work);
277}
278
279/*
280 * Check if two given sinks are compatible with each other,
281 * so that they can use the same sink buffers, when an event
282 * moves around.
283 */
284static bool sinks_compatible(struct coresight_device *a,
285 struct coresight_device *b)
286{
287 if (!a || !b)
288 return false;
289 /*
290 * If the sinks are of the same subtype and driven
291 * by the same driver, we can use the same buffer
292 * on these sinks.
293 */
294 return (a->subtype.sink_subtype == b->subtype.sink_subtype) &&
295 (sink_ops(a) == sink_ops(b));
296}
297
298static void *etm_setup_aux(struct perf_event *event, void **pages,
299 int nr_pages, bool overwrite)
300{
301 u32 id, cfg_hash;
302 int cpu = event->cpu;
303 cpumask_t *mask;
304 struct coresight_device *sink = NULL;
305 struct coresight_device *user_sink = NULL, *last_sink = NULL;
306 struct etm_event_data *event_data = NULL;
307
308 event_data = alloc_event_data(cpu);
309 if (!event_data)
310 return NULL;
311 INIT_WORK(&event_data->work, free_event_data);
312
313 /* First get the selected sink from user space. */
314 if (event->attr.config2 & GENMASK_ULL(31, 0)) {
315 id = (u32)event->attr.config2;
316 sink = user_sink = coresight_get_sink_by_id(id);
317 }
318
319 /* check if user wants a coresight configuration selected */
320 cfg_hash = (u32)((event->attr.config2 & GENMASK_ULL(63, 32)) >> 32);
321 if (cfg_hash) {
322 if (cscfg_activate_config(cfg_hash))
323 goto err;
324 event_data->cfg_hash = cfg_hash;
325 }
326
327 mask = &event_data->mask;
328
329 /*
330 * Setup the path for each CPU in a trace session. We try to build
331 * trace path for each CPU in the mask. If we don't find an ETM
332 * for the CPU or fail to build a path, we clear the CPU from the
333 * mask and continue with the rest. If ever we try to trace on those
334 * CPUs, we can handle it and fail the session.
335 */
336 for_each_cpu(cpu, mask) {
337 struct list_head *path;
338 struct coresight_device *csdev;
339
340 csdev = per_cpu(csdev_src, cpu);
341 /*
342 * If there is no ETM associated with this CPU clear it from
343 * the mask and continue with the rest. If ever we try to trace
344 * on this CPU, we handle it accordingly.
345 */
346 if (!csdev) {
347 cpumask_clear_cpu(cpu, mask);
348 continue;
349 }
350
351 /*
352 * No sink provided - look for a default sink for all the ETMs,
353 * where this event can be scheduled.
354 * We allocate the sink specific buffers only once for this
355 * event. If the ETMs have different default sink devices, we
356 * can only use a single "type" of sink as the event can carry
357 * only one sink specific buffer. Thus we have to make sure
358 * that the sinks are of the same type and driven by the same
359 * driver, as the one we allocate the buffer for. As such
360 * we choose the first sink and check if the remaining ETMs
361 * have a compatible default sink. We don't trace on a CPU
362 * if the sink is not compatible.
363 */
364 if (!user_sink) {
365 /* Find the default sink for this ETM */
366 sink = coresight_find_default_sink(csdev);
367 if (!sink) {
368 cpumask_clear_cpu(cpu, mask);
369 continue;
370 }
371
372 /* Check if this sink compatible with the last sink */
373 if (last_sink && !sinks_compatible(last_sink, sink)) {
374 cpumask_clear_cpu(cpu, mask);
375 continue;
376 }
377 last_sink = sink;
378 }
379
380 /*
381 * Building a path doesn't enable it, it simply builds a
382 * list of devices from source to sink that can be
383 * referenced later when the path is actually needed.
384 */
385 path = coresight_build_path(csdev, sink);
386 if (IS_ERR(path)) {
387 cpumask_clear_cpu(cpu, mask);
388 continue;
389 }
390
391 *etm_event_cpu_path_ptr(event_data, cpu) = path;
392 }
393
394 /* no sink found for any CPU - cannot trace */
395 if (!sink)
396 goto err;
397
398 /* If we don't have any CPUs ready for tracing, abort */
399 cpu = cpumask_first(mask);
400 if (cpu >= nr_cpu_ids)
401 goto err;
402
403 if (!sink_ops(sink)->alloc_buffer || !sink_ops(sink)->free_buffer)
404 goto err;
405
406 /*
407 * Allocate the sink buffer for this session. All the sinks
408 * where this event can be scheduled are ensured to be of the
409 * same type. Thus the same sink configuration is used by the
410 * sinks.
411 */
412 event_data->snk_config =
413 sink_ops(sink)->alloc_buffer(sink, event, pages,
414 nr_pages, overwrite);
415 if (!event_data->snk_config)
416 goto err;
417
418out:
419 return event_data;
420
421err:
422 etm_free_aux(event_data);
423 event_data = NULL;
424 goto out;
425}
426
427static void etm_event_start(struct perf_event *event, int flags)
428{
429 int cpu = smp_processor_id();
430 struct etm_event_data *event_data;
431 struct etm_ctxt *ctxt = this_cpu_ptr(&etm_ctxt);
432 struct perf_output_handle *handle = &ctxt->handle;
433 struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
434 struct list_head *path;
435
436 if (!csdev)
437 goto fail;
438
439 /* Have we messed up our tracking ? */
440 if (WARN_ON(ctxt->event_data))
441 goto fail;
442
443 /*
444 * Deal with the ring buffer API and get a handle on the
445 * session's information.
446 */
447 event_data = perf_aux_output_begin(handle, event);
448 if (!event_data)
449 goto fail;
450
451 /*
452 * Check if this ETM is allowed to trace, as decided
453 * at etm_setup_aux(). This could be due to an unreachable
454 * sink from this ETM. We can't do much in this case if
455 * the sink was specified or hinted to the driver. For
456 * now, simply don't record anything on this ETM.
457 *
458 * As such we pretend that everything is fine, and let
459 * it continue without actually tracing. The event could
460 * continue tracing when it moves to a CPU where it is
461 * reachable to a sink.
462 */
463 if (!cpumask_test_cpu(cpu, &event_data->mask))
464 goto out;
465
466 path = etm_event_cpu_path(event_data, cpu);
467 /* We need a sink, no need to continue without one */
468 sink = coresight_get_sink(path);
469 if (WARN_ON_ONCE(!sink))
470 goto fail_end_stop;
471
472 /* Nothing will happen without a path */
473 if (coresight_enable_path(path, CS_MODE_PERF, handle))
474 goto fail_end_stop;
475
476 /* Finally enable the tracer */
477 if (source_ops(csdev)->enable(csdev, event, CS_MODE_PERF))
478 goto fail_disable_path;
479
480out:
481 /* Tell the perf core the event is alive */
482 event->hw.state = 0;
483 /* Save the event_data for this ETM */
484 ctxt->event_data = event_data;
485 return;
486
487fail_disable_path:
488 coresight_disable_path(path);
489fail_end_stop:
490 /*
491 * Check if the handle is still associated with the event,
492 * to handle cases where if the sink failed to start the
493 * trace and TRUNCATED the handle already.
494 */
495 if (READ_ONCE(handle->event)) {
496 perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
497 perf_aux_output_end(handle, 0);
498 }
499fail:
500 event->hw.state = PERF_HES_STOPPED;
501 return;
502}
503
504static void etm_event_stop(struct perf_event *event, int mode)
505{
506 int cpu = smp_processor_id();
507 unsigned long size;
508 struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
509 struct etm_ctxt *ctxt = this_cpu_ptr(&etm_ctxt);
510 struct perf_output_handle *handle = &ctxt->handle;
511 struct etm_event_data *event_data;
512 struct list_head *path;
513
514 /*
515 * If we still have access to the event_data via handle,
516 * confirm that we haven't messed up the tracking.
517 */
518 if (handle->event &&
519 WARN_ON(perf_get_aux(handle) != ctxt->event_data))
520 return;
521
522 event_data = ctxt->event_data;
523 /* Clear the event_data as this ETM is stopping the trace. */
524 ctxt->event_data = NULL;
525
526 if (event->hw.state == PERF_HES_STOPPED)
527 return;
528
529 /* We must have a valid event_data for a running event */
530 if (WARN_ON(!event_data))
531 return;
532
533 /*
534 * Check if this ETM was allowed to trace, as decided at
535 * etm_setup_aux(). If it wasn't allowed to trace, then
536 * nothing needs to be torn down other than outputting a
537 * zero sized record.
538 */
539 if (handle->event && (mode & PERF_EF_UPDATE) &&
540 !cpumask_test_cpu(cpu, &event_data->mask)) {
541 event->hw.state = PERF_HES_STOPPED;
542 perf_aux_output_end(handle, 0);
543 return;
544 }
545
546 if (!csdev)
547 return;
548
549 path = etm_event_cpu_path(event_data, cpu);
550 if (!path)
551 return;
552
553 sink = coresight_get_sink(path);
554 if (!sink)
555 return;
556
557 /* stop tracer */
558 source_ops(csdev)->disable(csdev, event);
559
560 /* tell the core */
561 event->hw.state = PERF_HES_STOPPED;
562
563 /*
564 * If the handle is not bound to an event anymore
565 * (e.g, the sink driver was unable to restart the
566 * handle due to lack of buffer space), we don't
567 * have to do anything here.
568 */
569 if (handle->event && (mode & PERF_EF_UPDATE)) {
570 if (WARN_ON_ONCE(handle->event != event))
571 return;
572
573 /* update trace information */
574 if (!sink_ops(sink)->update_buffer)
575 return;
576
577 size = sink_ops(sink)->update_buffer(sink, handle,
578 event_data->snk_config);
579 /*
580 * Make sure the handle is still valid as the
581 * sink could have closed it from an IRQ.
582 * The sink driver must handle the race with
583 * update_buffer() and IRQ. Thus either we
584 * should get a valid handle and valid size
585 * (which may be 0).
586 *
587 * But we should never get a non-zero size with
588 * an invalid handle.
589 */
590 if (READ_ONCE(handle->event))
591 perf_aux_output_end(handle, size);
592 else
593 WARN_ON(size);
594 }
595
596 /* Disabling the path make its elements available to other sessions */
597 coresight_disable_path(path);
598}
599
600static int etm_event_add(struct perf_event *event, int mode)
601{
602 int ret = 0;
603 struct hw_perf_event *hwc = &event->hw;
604
605 if (mode & PERF_EF_START) {
606 etm_event_start(event, 0);
607 if (hwc->state & PERF_HES_STOPPED)
608 ret = -EINVAL;
609 } else {
610 hwc->state = PERF_HES_STOPPED;
611 }
612
613 return ret;
614}
615
616static void etm_event_del(struct perf_event *event, int mode)
617{
618 etm_event_stop(event, PERF_EF_UPDATE);
619}
620
621static int etm_addr_filters_validate(struct list_head *filters)
622{
623 bool range = false, address = false;
624 int index = 0;
625 struct perf_addr_filter *filter;
626
627 list_for_each_entry(filter, filters, entry) {
628 /*
629 * No need to go further if there's no more
630 * room for filters.
631 */
632 if (++index > ETM_ADDR_CMP_MAX)
633 return -EOPNOTSUPP;
634
635 /* filter::size==0 means single address trigger */
636 if (filter->size) {
637 /*
638 * The existing code relies on START/STOP filters
639 * being address filters.
640 */
641 if (filter->action == PERF_ADDR_FILTER_ACTION_START ||
642 filter->action == PERF_ADDR_FILTER_ACTION_STOP)
643 return -EOPNOTSUPP;
644
645 range = true;
646 } else
647 address = true;
648
649 /*
650 * At this time we don't allow range and start/stop filtering
651 * to cohabitate, they have to be mutually exclusive.
652 */
653 if (range && address)
654 return -EOPNOTSUPP;
655 }
656
657 return 0;
658}
659
660static void etm_addr_filters_sync(struct perf_event *event)
661{
662 struct perf_addr_filters_head *head = perf_event_addr_filters(event);
663 unsigned long start, stop;
664 struct perf_addr_filter_range *fr = event->addr_filter_ranges;
665 struct etm_filters *filters = event->hw.addr_filters;
666 struct etm_filter *etm_filter;
667 struct perf_addr_filter *filter;
668 int i = 0;
669
670 list_for_each_entry(filter, &head->list, entry) {
671 start = fr[i].start;
672 stop = start + fr[i].size;
673 etm_filter = &filters->etm_filter[i];
674
675 switch (filter->action) {
676 case PERF_ADDR_FILTER_ACTION_FILTER:
677 etm_filter->start_addr = start;
678 etm_filter->stop_addr = stop;
679 etm_filter->type = ETM_ADDR_TYPE_RANGE;
680 break;
681 case PERF_ADDR_FILTER_ACTION_START:
682 etm_filter->start_addr = start;
683 etm_filter->type = ETM_ADDR_TYPE_START;
684 break;
685 case PERF_ADDR_FILTER_ACTION_STOP:
686 etm_filter->stop_addr = stop;
687 etm_filter->type = ETM_ADDR_TYPE_STOP;
688 break;
689 }
690 i++;
691 }
692
693 filters->nr_filters = i;
694}
695
696int etm_perf_symlink(struct coresight_device *csdev, bool link)
697{
698 char entry[sizeof("cpu9999999")];
699 int ret = 0, cpu = source_ops(csdev)->cpu_id(csdev);
700 struct device *pmu_dev = etm_pmu.dev;
701 struct device *cs_dev = &csdev->dev;
702
703 sprintf(entry, "cpu%d", cpu);
704
705 if (!etm_perf_up)
706 return -EPROBE_DEFER;
707
708 if (link) {
709 ret = sysfs_create_link(&pmu_dev->kobj, &cs_dev->kobj, entry);
710 if (ret)
711 return ret;
712 per_cpu(csdev_src, cpu) = csdev;
713 } else {
714 sysfs_remove_link(&pmu_dev->kobj, entry);
715 per_cpu(csdev_src, cpu) = NULL;
716 }
717
718 return 0;
719}
720EXPORT_SYMBOL_GPL(etm_perf_symlink);
721
722static ssize_t etm_perf_sink_name_show(struct device *dev,
723 struct device_attribute *dattr,
724 char *buf)
725{
726 struct dev_ext_attribute *ea;
727
728 ea = container_of(dattr, struct dev_ext_attribute, attr);
729 return scnprintf(buf, PAGE_SIZE, "0x%lx\n", (unsigned long)(ea->var));
730}
731
732static struct dev_ext_attribute *
733etm_perf_add_symlink_group(struct device *dev, const char *name, const char *group_name)
734{
735 struct dev_ext_attribute *ea;
736 unsigned long hash;
737 int ret;
738 struct device *pmu_dev = etm_pmu.dev;
739
740 if (!etm_perf_up)
741 return ERR_PTR(-EPROBE_DEFER);
742
743 ea = devm_kzalloc(dev, sizeof(*ea), GFP_KERNEL);
744 if (!ea)
745 return ERR_PTR(-ENOMEM);
746
747 /*
748 * If this function is called adding a sink then the hash is used for
749 * sink selection - see function coresight_get_sink_by_id().
750 * If adding a configuration then the hash is used for selection in
751 * cscfg_activate_config()
752 */
753 hash = hashlen_hash(hashlen_string(NULL, name));
754
755 sysfs_attr_init(&ea->attr.attr);
756 ea->attr.attr.name = devm_kstrdup(dev, name, GFP_KERNEL);
757 if (!ea->attr.attr.name)
758 return ERR_PTR(-ENOMEM);
759
760 ea->attr.attr.mode = 0444;
761 ea->var = (unsigned long *)hash;
762
763 ret = sysfs_add_file_to_group(&pmu_dev->kobj,
764 &ea->attr.attr, group_name);
765
766 return ret ? ERR_PTR(ret) : ea;
767}
768
769int etm_perf_add_symlink_sink(struct coresight_device *csdev)
770{
771 const char *name;
772 struct device *dev = &csdev->dev;
773 int err = 0;
774
775 if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
776 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
777 return -EINVAL;
778
779 if (csdev->ea != NULL)
780 return -EINVAL;
781
782 name = dev_name(dev);
783 csdev->ea = etm_perf_add_symlink_group(dev, name, "sinks");
784 if (IS_ERR(csdev->ea)) {
785 err = PTR_ERR(csdev->ea);
786 csdev->ea = NULL;
787 } else
788 csdev->ea->attr.show = etm_perf_sink_name_show;
789
790 return err;
791}
792
793static void etm_perf_del_symlink_group(struct dev_ext_attribute *ea, const char *group_name)
794{
795 struct device *pmu_dev = etm_pmu.dev;
796
797 sysfs_remove_file_from_group(&pmu_dev->kobj,
798 &ea->attr.attr, group_name);
799}
800
801void etm_perf_del_symlink_sink(struct coresight_device *csdev)
802{
803 if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
804 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
805 return;
806
807 if (!csdev->ea)
808 return;
809
810 etm_perf_del_symlink_group(csdev->ea, "sinks");
811 csdev->ea = NULL;
812}
813
814static ssize_t etm_perf_cscfg_event_show(struct device *dev,
815 struct device_attribute *dattr,
816 char *buf)
817{
818 struct dev_ext_attribute *ea;
819
820 ea = container_of(dattr, struct dev_ext_attribute, attr);
821 return scnprintf(buf, PAGE_SIZE, "configid=0x%lx\n", (unsigned long)(ea->var));
822}
823
824int etm_perf_add_symlink_cscfg(struct device *dev, struct cscfg_config_desc *config_desc)
825{
826 int err = 0;
827
828 if (config_desc->event_ea != NULL)
829 return 0;
830
831 config_desc->event_ea = etm_perf_add_symlink_group(dev, config_desc->name, "events");
832
833 /* set the show function to the custom cscfg event */
834 if (!IS_ERR(config_desc->event_ea))
835 config_desc->event_ea->attr.show = etm_perf_cscfg_event_show;
836 else {
837 err = PTR_ERR(config_desc->event_ea);
838 config_desc->event_ea = NULL;
839 }
840
841 return err;
842}
843
844void etm_perf_del_symlink_cscfg(struct cscfg_config_desc *config_desc)
845{
846 if (!config_desc->event_ea)
847 return;
848
849 etm_perf_del_symlink_group(config_desc->event_ea, "events");
850 config_desc->event_ea = NULL;
851}
852
853int __init etm_perf_init(void)
854{
855 int ret;
856
857 etm_pmu.capabilities = (PERF_PMU_CAP_EXCLUSIVE |
858 PERF_PMU_CAP_ITRACE);
859
860 etm_pmu.attr_groups = etm_pmu_attr_groups;
861 etm_pmu.task_ctx_nr = perf_sw_context;
862 etm_pmu.read = etm_event_read;
863 etm_pmu.event_init = etm_event_init;
864 etm_pmu.setup_aux = etm_setup_aux;
865 etm_pmu.free_aux = etm_free_aux;
866 etm_pmu.start = etm_event_start;
867 etm_pmu.stop = etm_event_stop;
868 etm_pmu.add = etm_event_add;
869 etm_pmu.del = etm_event_del;
870 etm_pmu.addr_filters_sync = etm_addr_filters_sync;
871 etm_pmu.addr_filters_validate = etm_addr_filters_validate;
872 etm_pmu.nr_addr_filters = ETM_ADDR_CMP_MAX;
873
874 ret = perf_pmu_register(&etm_pmu, CORESIGHT_ETM_PMU_NAME, -1);
875 if (ret == 0)
876 etm_perf_up = true;
877
878 return ret;
879}
880
881void etm_perf_exit(void)
882{
883 perf_pmu_unregister(&etm_pmu);
884}