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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * corsair-psu.c - Linux driver for Corsair power supplies with HID sensors interface
4 * Copyright (C) 2020 Wilken Gottwalt <wilken.gottwalt@posteo.net>
5 */
6
7#include <linux/completion.h>
8#include <linux/debugfs.h>
9#include <linux/errno.h>
10#include <linux/hid.h>
11#include <linux/hwmon.h>
12#include <linux/hwmon-sysfs.h>
13#include <linux/jiffies.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/mutex.h>
17#include <linux/slab.h>
18#include <linux/types.h>
19
20/*
21 * Corsair protocol for PSUs
22 *
23 * message size = 64 bytes (request and response, little endian)
24 * request:
25 * [length][command][param0][param1][paramX]...
26 * reply:
27 * [echo of length][echo of command][data0][data1][dataX]...
28 *
29 * - commands are byte sized opcodes
30 * - length is the sum of all bytes of the commands/params
31 * - the micro-controller of most of these PSUs support concatenation in the request and reply,
32 * but it is better to not rely on this (it is also hard to parse)
33 * - the driver uses raw events to be accessible from userspace (though this is not really
34 * supported, it is just there for convenience, may be removed in the future)
35 * - a reply always start with the length and command in the same order the request used it
36 * - length of the reply data is specific to the command used
37 * - some of the commands work on a rail and can be switched to a specific rail (0 = 12v,
38 * 1 = 5v, 2 = 3.3v)
39 * - the format of the init command 0xFE is swapped length/command bytes
40 * - parameter bytes amount and values are specific to the command (rail setting is the only
41 * for now that uses non-zero values)
42 * - there are much more commands, especially for configuring the device, but they are not
43 * supported because a wrong command/length can lockup the micro-controller
44 * - the driver supports debugfs for values not fitting into the hwmon class
45 * - not every device class (HXi, RMi or AXi) supports all commands
46 * - it is a pure sensors reading driver (will not support configuring)
47 */
48
49#define DRIVER_NAME "corsair-psu"
50
51#define REPLY_SIZE 16 /* max length of a reply to a single command */
52#define CMD_BUFFER_SIZE 64
53#define CMD_TIMEOUT_MS 250
54#define SECONDS_PER_HOUR (60 * 60)
55#define SECONDS_PER_DAY (SECONDS_PER_HOUR * 24)
56#define RAIL_COUNT 3 /* 3v3 + 5v + 12v */
57#define TEMP_COUNT 2
58#define OCP_MULTI_RAIL 0x02
59
60#define PSU_CMD_SELECT_RAIL 0x00 /* expects length 2 */
61#define PSU_CMD_RAIL_VOLTS_HCRIT 0x40 /* the rest of the commands expect length 3 */
62#define PSU_CMD_RAIL_VOLTS_LCRIT 0x44
63#define PSU_CMD_RAIL_AMPS_HCRIT 0x46
64#define PSU_CMD_TEMP_HCRIT 0x4F
65#define PSU_CMD_IN_VOLTS 0x88
66#define PSU_CMD_IN_AMPS 0x89
67#define PSU_CMD_RAIL_VOLTS 0x8B
68#define PSU_CMD_RAIL_AMPS 0x8C
69#define PSU_CMD_TEMP0 0x8D
70#define PSU_CMD_TEMP1 0x8E
71#define PSU_CMD_FAN 0x90
72#define PSU_CMD_RAIL_WATTS 0x96
73#define PSU_CMD_VEND_STR 0x99
74#define PSU_CMD_PROD_STR 0x9A
75#define PSU_CMD_TOTAL_UPTIME 0xD1
76#define PSU_CMD_UPTIME 0xD2
77#define PSU_CMD_OCPMODE 0xD8
78#define PSU_CMD_TOTAL_WATTS 0xEE
79#define PSU_CMD_INIT 0xFE
80
81#define L_IN_VOLTS "v_in"
82#define L_OUT_VOLTS_12V "v_out +12v"
83#define L_OUT_VOLTS_5V "v_out +5v"
84#define L_OUT_VOLTS_3_3V "v_out +3.3v"
85#define L_IN_AMPS "curr in"
86#define L_AMPS_12V "curr +12v"
87#define L_AMPS_5V "curr +5v"
88#define L_AMPS_3_3V "curr +3.3v"
89#define L_FAN "psu fan"
90#define L_TEMP0 "vrm temp"
91#define L_TEMP1 "case temp"
92#define L_WATTS "power total"
93#define L_WATTS_12V "power +12v"
94#define L_WATTS_5V "power +5v"
95#define L_WATTS_3_3V "power +3.3v"
96
97static const char *const label_watts[] = {
98 L_WATTS,
99 L_WATTS_12V,
100 L_WATTS_5V,
101 L_WATTS_3_3V
102};
103
104static const char *const label_volts[] = {
105 L_IN_VOLTS,
106 L_OUT_VOLTS_12V,
107 L_OUT_VOLTS_5V,
108 L_OUT_VOLTS_3_3V
109};
110
111static const char *const label_amps[] = {
112 L_IN_AMPS,
113 L_AMPS_12V,
114 L_AMPS_5V,
115 L_AMPS_3_3V
116};
117
118struct corsairpsu_data {
119 struct hid_device *hdev;
120 struct device *hwmon_dev;
121 struct dentry *debugfs;
122 struct completion wait_completion;
123 struct mutex lock; /* for locking access to cmd_buffer */
124 u8 *cmd_buffer;
125 char vendor[REPLY_SIZE];
126 char product[REPLY_SIZE];
127 long temp_crit[TEMP_COUNT];
128 long in_crit[RAIL_COUNT];
129 long in_lcrit[RAIL_COUNT];
130 long curr_crit[RAIL_COUNT];
131 u8 temp_crit_support;
132 u8 in_crit_support;
133 u8 in_lcrit_support;
134 u8 curr_crit_support;
135 bool in_curr_cmd_support; /* not all commands are supported on every PSU */
136};
137
138/* some values are SMBus LINEAR11 data which need a conversion */
139static int corsairpsu_linear11_to_int(const u16 val, const int scale)
140{
141 const int exp = ((s16)val) >> 11;
142 const int mant = (((s16)(val & 0x7ff)) << 5) >> 5;
143 const int result = mant * scale;
144
145 return (exp >= 0) ? (result << exp) : (result >> -exp);
146}
147
148static int corsairpsu_usb_cmd(struct corsairpsu_data *priv, u8 p0, u8 p1, u8 p2, void *data)
149{
150 unsigned long time;
151 int ret;
152
153 memset(priv->cmd_buffer, 0, CMD_BUFFER_SIZE);
154 priv->cmd_buffer[0] = p0;
155 priv->cmd_buffer[1] = p1;
156 priv->cmd_buffer[2] = p2;
157
158 reinit_completion(&priv->wait_completion);
159
160 ret = hid_hw_output_report(priv->hdev, priv->cmd_buffer, CMD_BUFFER_SIZE);
161 if (ret < 0)
162 return ret;
163
164 time = wait_for_completion_timeout(&priv->wait_completion,
165 msecs_to_jiffies(CMD_TIMEOUT_MS));
166 if (!time)
167 return -ETIMEDOUT;
168
169 /*
170 * at the start of the reply is an echo of the send command/length in the same order it
171 * was send, not every command is supported on every device class, if a command is not
172 * supported, the length value in the reply is okay, but the command value is set to 0
173 */
174 if (p0 != priv->cmd_buffer[0] || p1 != priv->cmd_buffer[1])
175 return -EOPNOTSUPP;
176
177 if (data)
178 memcpy(data, priv->cmd_buffer + 2, REPLY_SIZE);
179
180 return 0;
181}
182
183static int corsairpsu_init(struct corsairpsu_data *priv)
184{
185 /*
186 * PSU_CMD_INIT uses swapped length/command and expects 2 parameter bytes, this command
187 * actually generates a reply, but we don't need it
188 */
189 return corsairpsu_usb_cmd(priv, PSU_CMD_INIT, 3, 0, NULL);
190}
191
192static int corsairpsu_fwinfo(struct corsairpsu_data *priv)
193{
194 int ret;
195
196 ret = corsairpsu_usb_cmd(priv, 3, PSU_CMD_VEND_STR, 0, priv->vendor);
197 if (ret < 0)
198 return ret;
199
200 ret = corsairpsu_usb_cmd(priv, 3, PSU_CMD_PROD_STR, 0, priv->product);
201 if (ret < 0)
202 return ret;
203
204 return 0;
205}
206
207static int corsairpsu_request(struct corsairpsu_data *priv, u8 cmd, u8 rail, void *data)
208{
209 int ret;
210
211 mutex_lock(&priv->lock);
212 switch (cmd) {
213 case PSU_CMD_RAIL_VOLTS_HCRIT:
214 case PSU_CMD_RAIL_VOLTS_LCRIT:
215 case PSU_CMD_RAIL_AMPS_HCRIT:
216 case PSU_CMD_RAIL_VOLTS:
217 case PSU_CMD_RAIL_AMPS:
218 case PSU_CMD_RAIL_WATTS:
219 ret = corsairpsu_usb_cmd(priv, 2, PSU_CMD_SELECT_RAIL, rail, NULL);
220 if (ret < 0)
221 goto cmd_fail;
222 break;
223 default:
224 break;
225 }
226
227 ret = corsairpsu_usb_cmd(priv, 3, cmd, 0, data);
228
229cmd_fail:
230 mutex_unlock(&priv->lock);
231 return ret;
232}
233
234static int corsairpsu_get_value(struct corsairpsu_data *priv, u8 cmd, u8 rail, long *val)
235{
236 u8 data[REPLY_SIZE];
237 long tmp;
238 int ret;
239
240 ret = corsairpsu_request(priv, cmd, rail, data);
241 if (ret < 0)
242 return ret;
243
244 /*
245 * the biggest value here comes from the uptime command and to exceed MAXINT total uptime
246 * needs to be about 68 years, the rest are u16 values and the biggest value coming out of
247 * the LINEAR11 conversion are the watts values which are about 1200 for the strongest psu
248 * supported (HX1200i)
249 */
250 tmp = ((long)data[3] << 24) + (data[2] << 16) + (data[1] << 8) + data[0];
251 switch (cmd) {
252 case PSU_CMD_RAIL_VOLTS_HCRIT:
253 case PSU_CMD_RAIL_VOLTS_LCRIT:
254 case PSU_CMD_RAIL_AMPS_HCRIT:
255 case PSU_CMD_TEMP_HCRIT:
256 case PSU_CMD_IN_VOLTS:
257 case PSU_CMD_IN_AMPS:
258 case PSU_CMD_RAIL_VOLTS:
259 case PSU_CMD_RAIL_AMPS:
260 case PSU_CMD_TEMP0:
261 case PSU_CMD_TEMP1:
262 *val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1000);
263 break;
264 case PSU_CMD_FAN:
265 *val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1);
266 break;
267 case PSU_CMD_RAIL_WATTS:
268 case PSU_CMD_TOTAL_WATTS:
269 *val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1000000);
270 break;
271 case PSU_CMD_TOTAL_UPTIME:
272 case PSU_CMD_UPTIME:
273 case PSU_CMD_OCPMODE:
274 *val = tmp;
275 break;
276 default:
277 ret = -EOPNOTSUPP;
278 break;
279 }
280
281 return ret;
282}
283
284static void corsairpsu_get_criticals(struct corsairpsu_data *priv)
285{
286 long tmp;
287 int rail;
288
289 for (rail = 0; rail < TEMP_COUNT; ++rail) {
290 if (!corsairpsu_get_value(priv, PSU_CMD_TEMP_HCRIT, rail, &tmp)) {
291 priv->temp_crit_support |= BIT(rail);
292 priv->temp_crit[rail] = tmp;
293 }
294 }
295
296 for (rail = 0; rail < RAIL_COUNT; ++rail) {
297 if (!corsairpsu_get_value(priv, PSU_CMD_RAIL_VOLTS_HCRIT, rail, &tmp)) {
298 priv->in_crit_support |= BIT(rail);
299 priv->in_crit[rail] = tmp;
300 }
301
302 if (!corsairpsu_get_value(priv, PSU_CMD_RAIL_VOLTS_LCRIT, rail, &tmp)) {
303 priv->in_lcrit_support |= BIT(rail);
304 priv->in_lcrit[rail] = tmp;
305 }
306
307 if (!corsairpsu_get_value(priv, PSU_CMD_RAIL_AMPS_HCRIT, rail, &tmp)) {
308 priv->curr_crit_support |= BIT(rail);
309 priv->curr_crit[rail] = tmp;
310 }
311 }
312}
313
314static void corsairpsu_check_cmd_support(struct corsairpsu_data *priv)
315{
316 long tmp;
317
318 priv->in_curr_cmd_support = !corsairpsu_get_value(priv, PSU_CMD_IN_AMPS, 0, &tmp);
319}
320
321static umode_t corsairpsu_hwmon_temp_is_visible(const struct corsairpsu_data *priv, u32 attr,
322 int channel)
323{
324 umode_t res = 0444;
325
326 switch (attr) {
327 case hwmon_temp_input:
328 case hwmon_temp_label:
329 case hwmon_temp_crit:
330 if (channel > 0 && !(priv->temp_crit_support & BIT(channel - 1)))
331 res = 0;
332 break;
333 default:
334 break;
335 }
336
337 return res;
338}
339
340static umode_t corsairpsu_hwmon_fan_is_visible(const struct corsairpsu_data *priv, u32 attr,
341 int channel)
342{
343 switch (attr) {
344 case hwmon_fan_input:
345 case hwmon_fan_label:
346 return 0444;
347 default:
348 return 0;
349 }
350}
351
352static umode_t corsairpsu_hwmon_power_is_visible(const struct corsairpsu_data *priv, u32 attr,
353 int channel)
354{
355 switch (attr) {
356 case hwmon_power_input:
357 case hwmon_power_label:
358 return 0444;
359 default:
360 return 0;
361 }
362}
363
364static umode_t corsairpsu_hwmon_in_is_visible(const struct corsairpsu_data *priv, u32 attr,
365 int channel)
366{
367 umode_t res = 0444;
368
369 switch (attr) {
370 case hwmon_in_input:
371 case hwmon_in_label:
372 case hwmon_in_crit:
373 if (channel > 0 && !(priv->in_crit_support & BIT(channel - 1)))
374 res = 0;
375 break;
376 case hwmon_in_lcrit:
377 if (channel > 0 && !(priv->in_lcrit_support & BIT(channel - 1)))
378 res = 0;
379 break;
380 default:
381 break;
382 }
383
384 return res;
385}
386
387static umode_t corsairpsu_hwmon_curr_is_visible(const struct corsairpsu_data *priv, u32 attr,
388 int channel)
389{
390 umode_t res = 0444;
391
392 switch (attr) {
393 case hwmon_curr_input:
394 if (channel == 0 && !priv->in_curr_cmd_support)
395 res = 0;
396 break;
397 case hwmon_curr_label:
398 case hwmon_curr_crit:
399 if (channel > 0 && !(priv->curr_crit_support & BIT(channel - 1)))
400 res = 0;
401 break;
402 default:
403 break;
404 }
405
406 return res;
407}
408
409static umode_t corsairpsu_hwmon_ops_is_visible(const void *data, enum hwmon_sensor_types type,
410 u32 attr, int channel)
411{
412 const struct corsairpsu_data *priv = data;
413
414 switch (type) {
415 case hwmon_temp:
416 return corsairpsu_hwmon_temp_is_visible(priv, attr, channel);
417 case hwmon_fan:
418 return corsairpsu_hwmon_fan_is_visible(priv, attr, channel);
419 case hwmon_power:
420 return corsairpsu_hwmon_power_is_visible(priv, attr, channel);
421 case hwmon_in:
422 return corsairpsu_hwmon_in_is_visible(priv, attr, channel);
423 case hwmon_curr:
424 return corsairpsu_hwmon_curr_is_visible(priv, attr, channel);
425 default:
426 return 0;
427 }
428}
429
430static int corsairpsu_hwmon_temp_read(struct corsairpsu_data *priv, u32 attr, int channel,
431 long *val)
432{
433 int err = -EOPNOTSUPP;
434
435 switch (attr) {
436 case hwmon_temp_input:
437 return corsairpsu_get_value(priv, channel ? PSU_CMD_TEMP1 : PSU_CMD_TEMP0,
438 channel, val);
439 case hwmon_temp_crit:
440 *val = priv->temp_crit[channel];
441 err = 0;
442 break;
443 default:
444 break;
445 }
446
447 return err;
448}
449
450static int corsairpsu_hwmon_power_read(struct corsairpsu_data *priv, u32 attr, int channel,
451 long *val)
452{
453 if (attr == hwmon_power_input) {
454 switch (channel) {
455 case 0:
456 return corsairpsu_get_value(priv, PSU_CMD_TOTAL_WATTS, 0, val);
457 case 1 ... 3:
458 return corsairpsu_get_value(priv, PSU_CMD_RAIL_WATTS, channel - 1, val);
459 default:
460 break;
461 }
462 }
463
464 return -EOPNOTSUPP;
465}
466
467static int corsairpsu_hwmon_in_read(struct corsairpsu_data *priv, u32 attr, int channel, long *val)
468{
469 int err = -EOPNOTSUPP;
470
471 switch (attr) {
472 case hwmon_in_input:
473 switch (channel) {
474 case 0:
475 return corsairpsu_get_value(priv, PSU_CMD_IN_VOLTS, 0, val);
476 case 1 ... 3:
477 return corsairpsu_get_value(priv, PSU_CMD_RAIL_VOLTS, channel - 1, val);
478 default:
479 break;
480 }
481 break;
482 case hwmon_in_crit:
483 *val = priv->in_crit[channel - 1];
484 err = 0;
485 break;
486 case hwmon_in_lcrit:
487 *val = priv->in_lcrit[channel - 1];
488 err = 0;
489 break;
490 }
491
492 return err;
493}
494
495static int corsairpsu_hwmon_curr_read(struct corsairpsu_data *priv, u32 attr, int channel,
496 long *val)
497{
498 int err = -EOPNOTSUPP;
499
500 switch (attr) {
501 case hwmon_curr_input:
502 switch (channel) {
503 case 0:
504 return corsairpsu_get_value(priv, PSU_CMD_IN_AMPS, 0, val);
505 case 1 ... 3:
506 return corsairpsu_get_value(priv, PSU_CMD_RAIL_AMPS, channel - 1, val);
507 default:
508 break;
509 }
510 break;
511 case hwmon_curr_crit:
512 *val = priv->curr_crit[channel - 1];
513 err = 0;
514 break;
515 default:
516 break;
517 }
518
519 return err;
520}
521
522static int corsairpsu_hwmon_ops_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
523 int channel, long *val)
524{
525 struct corsairpsu_data *priv = dev_get_drvdata(dev);
526
527 switch (type) {
528 case hwmon_temp:
529 return corsairpsu_hwmon_temp_read(priv, attr, channel, val);
530 case hwmon_fan:
531 if (attr == hwmon_fan_input)
532 return corsairpsu_get_value(priv, PSU_CMD_FAN, 0, val);
533 return -EOPNOTSUPP;
534 case hwmon_power:
535 return corsairpsu_hwmon_power_read(priv, attr, channel, val);
536 case hwmon_in:
537 return corsairpsu_hwmon_in_read(priv, attr, channel, val);
538 case hwmon_curr:
539 return corsairpsu_hwmon_curr_read(priv, attr, channel, val);
540 default:
541 return -EOPNOTSUPP;
542 }
543}
544
545static int corsairpsu_hwmon_ops_read_string(struct device *dev, enum hwmon_sensor_types type,
546 u32 attr, int channel, const char **str)
547{
548 if (type == hwmon_temp && attr == hwmon_temp_label) {
549 *str = channel ? L_TEMP1 : L_TEMP0;
550 return 0;
551 } else if (type == hwmon_fan && attr == hwmon_fan_label) {
552 *str = L_FAN;
553 return 0;
554 } else if (type == hwmon_power && attr == hwmon_power_label && channel < 4) {
555 *str = label_watts[channel];
556 return 0;
557 } else if (type == hwmon_in && attr == hwmon_in_label && channel < 4) {
558 *str = label_volts[channel];
559 return 0;
560 } else if (type == hwmon_curr && attr == hwmon_curr_label && channel < 4) {
561 *str = label_amps[channel];
562 return 0;
563 }
564
565 return -EOPNOTSUPP;
566}
567
568static const struct hwmon_ops corsairpsu_hwmon_ops = {
569 .is_visible = corsairpsu_hwmon_ops_is_visible,
570 .read = corsairpsu_hwmon_ops_read,
571 .read_string = corsairpsu_hwmon_ops_read_string,
572};
573
574static const struct hwmon_channel_info *corsairpsu_info[] = {
575 HWMON_CHANNEL_INFO(chip,
576 HWMON_C_REGISTER_TZ),
577 HWMON_CHANNEL_INFO(temp,
578 HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT,
579 HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT),
580 HWMON_CHANNEL_INFO(fan,
581 HWMON_F_INPUT | HWMON_F_LABEL),
582 HWMON_CHANNEL_INFO(power,
583 HWMON_P_INPUT | HWMON_P_LABEL,
584 HWMON_P_INPUT | HWMON_P_LABEL,
585 HWMON_P_INPUT | HWMON_P_LABEL,
586 HWMON_P_INPUT | HWMON_P_LABEL),
587 HWMON_CHANNEL_INFO(in,
588 HWMON_I_INPUT | HWMON_I_LABEL,
589 HWMON_I_INPUT | HWMON_I_LABEL | HWMON_I_LCRIT | HWMON_I_CRIT,
590 HWMON_I_INPUT | HWMON_I_LABEL | HWMON_I_LCRIT | HWMON_I_CRIT,
591 HWMON_I_INPUT | HWMON_I_LABEL | HWMON_I_LCRIT | HWMON_I_CRIT),
592 HWMON_CHANNEL_INFO(curr,
593 HWMON_C_INPUT | HWMON_C_LABEL,
594 HWMON_C_INPUT | HWMON_C_LABEL | HWMON_C_CRIT,
595 HWMON_C_INPUT | HWMON_C_LABEL | HWMON_C_CRIT,
596 HWMON_C_INPUT | HWMON_C_LABEL | HWMON_C_CRIT),
597 NULL
598};
599
600static const struct hwmon_chip_info corsairpsu_chip_info = {
601 .ops = &corsairpsu_hwmon_ops,
602 .info = corsairpsu_info,
603};
604
605#ifdef CONFIG_DEBUG_FS
606
607static void print_uptime(struct seq_file *seqf, u8 cmd)
608{
609 struct corsairpsu_data *priv = seqf->private;
610 long val;
611 int ret;
612
613 ret = corsairpsu_get_value(priv, cmd, 0, &val);
614 if (ret < 0) {
615 seq_puts(seqf, "N/A\n");
616 return;
617 }
618
619 if (val > SECONDS_PER_DAY) {
620 seq_printf(seqf, "%ld day(s), %02ld:%02ld:%02ld\n", val / SECONDS_PER_DAY,
621 val % SECONDS_PER_DAY / SECONDS_PER_HOUR, val % SECONDS_PER_HOUR / 60,
622 val % 60);
623 return;
624 }
625
626 seq_printf(seqf, "%02ld:%02ld:%02ld\n", val % SECONDS_PER_DAY / SECONDS_PER_HOUR,
627 val % SECONDS_PER_HOUR / 60, val % 60);
628}
629
630static int uptime_show(struct seq_file *seqf, void *unused)
631{
632 print_uptime(seqf, PSU_CMD_UPTIME);
633
634 return 0;
635}
636DEFINE_SHOW_ATTRIBUTE(uptime);
637
638static int uptime_total_show(struct seq_file *seqf, void *unused)
639{
640 print_uptime(seqf, PSU_CMD_TOTAL_UPTIME);
641
642 return 0;
643}
644DEFINE_SHOW_ATTRIBUTE(uptime_total);
645
646static int vendor_show(struct seq_file *seqf, void *unused)
647{
648 struct corsairpsu_data *priv = seqf->private;
649
650 seq_printf(seqf, "%s\n", priv->vendor);
651
652 return 0;
653}
654DEFINE_SHOW_ATTRIBUTE(vendor);
655
656static int product_show(struct seq_file *seqf, void *unused)
657{
658 struct corsairpsu_data *priv = seqf->private;
659
660 seq_printf(seqf, "%s\n", priv->product);
661
662 return 0;
663}
664DEFINE_SHOW_ATTRIBUTE(product);
665
666static int ocpmode_show(struct seq_file *seqf, void *unused)
667{
668 struct corsairpsu_data *priv = seqf->private;
669 long val;
670 int ret;
671
672 /*
673 * The rail mode is switchable on the fly. The RAW interface can be used for this. But it
674 * will not be included here, because I consider it somewhat dangerous for the health of the
675 * PSU. The returned value can be a bogus one, if the PSU is in the process of switching and
676 * getting of the value itself can also fail during this. Because of this every other value
677 * than OCP_MULTI_RAIL can be considered as "single rail".
678 */
679 ret = corsairpsu_get_value(priv, PSU_CMD_OCPMODE, 0, &val);
680 if (ret < 0)
681 seq_puts(seqf, "N/A\n");
682 else
683 seq_printf(seqf, "%s\n", (val == OCP_MULTI_RAIL) ? "multi rail" : "single rail");
684
685 return 0;
686}
687DEFINE_SHOW_ATTRIBUTE(ocpmode);
688
689static void corsairpsu_debugfs_init(struct corsairpsu_data *priv)
690{
691 char name[32];
692
693 scnprintf(name, sizeof(name), "%s-%s", DRIVER_NAME, dev_name(&priv->hdev->dev));
694
695 priv->debugfs = debugfs_create_dir(name, NULL);
696 debugfs_create_file("uptime", 0444, priv->debugfs, priv, &uptime_fops);
697 debugfs_create_file("uptime_total", 0444, priv->debugfs, priv, &uptime_total_fops);
698 debugfs_create_file("vendor", 0444, priv->debugfs, priv, &vendor_fops);
699 debugfs_create_file("product", 0444, priv->debugfs, priv, &product_fops);
700 debugfs_create_file("ocpmode", 0444, priv->debugfs, priv, &ocpmode_fops);
701}
702
703#else
704
705static void corsairpsu_debugfs_init(struct corsairpsu_data *priv)
706{
707}
708
709#endif
710
711static int corsairpsu_probe(struct hid_device *hdev, const struct hid_device_id *id)
712{
713 struct corsairpsu_data *priv;
714 int ret;
715
716 priv = devm_kzalloc(&hdev->dev, sizeof(struct corsairpsu_data), GFP_KERNEL);
717 if (!priv)
718 return -ENOMEM;
719
720 priv->cmd_buffer = devm_kmalloc(&hdev->dev, CMD_BUFFER_SIZE, GFP_KERNEL);
721 if (!priv->cmd_buffer)
722 return -ENOMEM;
723
724 ret = hid_parse(hdev);
725 if (ret)
726 return ret;
727
728 ret = hid_hw_start(hdev, HID_CONNECT_HIDRAW);
729 if (ret)
730 return ret;
731
732 ret = hid_hw_open(hdev);
733 if (ret)
734 goto fail_and_stop;
735
736 priv->hdev = hdev;
737 hid_set_drvdata(hdev, priv);
738 mutex_init(&priv->lock);
739 init_completion(&priv->wait_completion);
740
741 hid_device_io_start(hdev);
742
743 ret = corsairpsu_init(priv);
744 if (ret < 0) {
745 dev_err(&hdev->dev, "unable to initialize device (%d)\n", ret);
746 goto fail_and_stop;
747 }
748
749 ret = corsairpsu_fwinfo(priv);
750 if (ret < 0) {
751 dev_err(&hdev->dev, "unable to query firmware (%d)\n", ret);
752 goto fail_and_stop;
753 }
754
755 corsairpsu_get_criticals(priv);
756 corsairpsu_check_cmd_support(priv);
757
758 priv->hwmon_dev = hwmon_device_register_with_info(&hdev->dev, "corsairpsu", priv,
759 &corsairpsu_chip_info, NULL);
760
761 if (IS_ERR(priv->hwmon_dev)) {
762 ret = PTR_ERR(priv->hwmon_dev);
763 goto fail_and_close;
764 }
765
766 corsairpsu_debugfs_init(priv);
767
768 return 0;
769
770fail_and_close:
771 hid_hw_close(hdev);
772fail_and_stop:
773 hid_hw_stop(hdev);
774 return ret;
775}
776
777static void corsairpsu_remove(struct hid_device *hdev)
778{
779 struct corsairpsu_data *priv = hid_get_drvdata(hdev);
780
781 debugfs_remove_recursive(priv->debugfs);
782 hwmon_device_unregister(priv->hwmon_dev);
783 hid_hw_close(hdev);
784 hid_hw_stop(hdev);
785}
786
787static int corsairpsu_raw_event(struct hid_device *hdev, struct hid_report *report, u8 *data,
788 int size)
789{
790 struct corsairpsu_data *priv = hid_get_drvdata(hdev);
791
792 if (completion_done(&priv->wait_completion))
793 return 0;
794
795 memcpy(priv->cmd_buffer, data, min(CMD_BUFFER_SIZE, size));
796 complete(&priv->wait_completion);
797
798 return 0;
799}
800
801#ifdef CONFIG_PM
802static int corsairpsu_resume(struct hid_device *hdev)
803{
804 struct corsairpsu_data *priv = hid_get_drvdata(hdev);
805
806 /* some PSUs turn off the microcontroller during standby, so a reinit is required */
807 return corsairpsu_init(priv);
808}
809#endif
810
811static const struct hid_device_id corsairpsu_idtable[] = {
812 { HID_USB_DEVICE(0x1b1c, 0x1c03) }, /* Corsair HX550i */
813 { HID_USB_DEVICE(0x1b1c, 0x1c04) }, /* Corsair HX650i */
814 { HID_USB_DEVICE(0x1b1c, 0x1c05) }, /* Corsair HX750i */
815 { HID_USB_DEVICE(0x1b1c, 0x1c06) }, /* Corsair HX850i */
816 { HID_USB_DEVICE(0x1b1c, 0x1c07) }, /* Corsair HX1000i revision 1 */
817 { HID_USB_DEVICE(0x1b1c, 0x1c08) }, /* Corsair HX1200i */
818 { HID_USB_DEVICE(0x1b1c, 0x1c09) }, /* Corsair RM550i */
819 { HID_USB_DEVICE(0x1b1c, 0x1c0a) }, /* Corsair RM650i */
820 { HID_USB_DEVICE(0x1b1c, 0x1c0b) }, /* Corsair RM750i */
821 { HID_USB_DEVICE(0x1b1c, 0x1c0c) }, /* Corsair RM850i */
822 { HID_USB_DEVICE(0x1b1c, 0x1c0d) }, /* Corsair RM1000i */
823 { HID_USB_DEVICE(0x1b1c, 0x1c1e) }, /* Corsair HX1000i revision 2 */
824 { HID_USB_DEVICE(0x1b1c, 0x1c1f) }, /* Corsair HX1500i */
825 { },
826};
827MODULE_DEVICE_TABLE(hid, corsairpsu_idtable);
828
829static struct hid_driver corsairpsu_driver = {
830 .name = DRIVER_NAME,
831 .id_table = corsairpsu_idtable,
832 .probe = corsairpsu_probe,
833 .remove = corsairpsu_remove,
834 .raw_event = corsairpsu_raw_event,
835#ifdef CONFIG_PM
836 .resume = corsairpsu_resume,
837 .reset_resume = corsairpsu_resume,
838#endif
839};
840module_hid_driver(corsairpsu_driver);
841
842MODULE_LICENSE("GPL");
843MODULE_AUTHOR("Wilken Gottwalt <wilken.gottwalt@posteo.net>");
844MODULE_DESCRIPTION("Linux driver for Corsair power supplies with HID sensors interface");