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1/*
2 * Copyright (C) 2015 Red Hat, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
26#include <linux/virtio.h>
27#include <linux/virtio_config.h>
28#include <linux/virtio_ring.h>
29
30#include <drm/drm_file.h>
31#include <drm/drm_managed.h>
32
33#include "virtgpu_drv.h"
34
35static void virtio_gpu_config_changed_work_func(struct work_struct *work)
36{
37 struct virtio_gpu_device *vgdev =
38 container_of(work, struct virtio_gpu_device,
39 config_changed_work);
40 u32 events_read, events_clear = 0;
41
42 /* read the config space */
43 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config,
44 events_read, &events_read);
45 if (events_read & VIRTIO_GPU_EVENT_DISPLAY) {
46 if (vgdev->has_edid)
47 virtio_gpu_cmd_get_edids(vgdev);
48 virtio_gpu_cmd_get_display_info(vgdev);
49 virtio_gpu_notify(vgdev);
50 drm_helper_hpd_irq_event(vgdev->ddev);
51 events_clear |= VIRTIO_GPU_EVENT_DISPLAY;
52 }
53 virtio_cwrite_le(vgdev->vdev, struct virtio_gpu_config,
54 events_clear, &events_clear);
55}
56
57static void virtio_gpu_init_vq(struct virtio_gpu_queue *vgvq,
58 void (*work_func)(struct work_struct *work))
59{
60 spin_lock_init(&vgvq->qlock);
61 init_waitqueue_head(&vgvq->ack_queue);
62 INIT_WORK(&vgvq->dequeue_work, work_func);
63}
64
65static void virtio_gpu_get_capsets(struct virtio_gpu_device *vgdev,
66 int num_capsets)
67{
68 int i, ret;
69 bool invalid_capset_id = false;
70 struct drm_device *drm = vgdev->ddev;
71
72 vgdev->capsets = drmm_kcalloc(drm, num_capsets,
73 sizeof(struct virtio_gpu_drv_capset),
74 GFP_KERNEL);
75 if (!vgdev->capsets) {
76 DRM_ERROR("failed to allocate cap sets\n");
77 return;
78 }
79 for (i = 0; i < num_capsets; i++) {
80 virtio_gpu_cmd_get_capset_info(vgdev, i);
81 virtio_gpu_notify(vgdev);
82 ret = wait_event_timeout(vgdev->resp_wq,
83 vgdev->capsets[i].id > 0, 5 * HZ);
84 /*
85 * Capability ids are defined in the virtio-gpu spec and are
86 * between 1 to 63, inclusive.
87 */
88 if (!vgdev->capsets[i].id ||
89 vgdev->capsets[i].id > MAX_CAPSET_ID)
90 invalid_capset_id = true;
91
92 if (ret == 0)
93 DRM_ERROR("timed out waiting for cap set %d\n", i);
94 else if (invalid_capset_id)
95 DRM_ERROR("invalid capset id %u", vgdev->capsets[i].id);
96
97 if (ret == 0 || invalid_capset_id) {
98 spin_lock(&vgdev->display_info_lock);
99 drmm_kfree(drm, vgdev->capsets);
100 vgdev->capsets = NULL;
101 spin_unlock(&vgdev->display_info_lock);
102 return;
103 }
104
105 vgdev->capset_id_mask |= 1 << vgdev->capsets[i].id;
106 DRM_INFO("cap set %d: id %d, max-version %d, max-size %d\n",
107 i, vgdev->capsets[i].id,
108 vgdev->capsets[i].max_version,
109 vgdev->capsets[i].max_size);
110 }
111
112 vgdev->num_capsets = num_capsets;
113}
114
115int virtio_gpu_init(struct virtio_device *vdev, struct drm_device *dev)
116{
117 static vq_callback_t *callbacks[] = {
118 virtio_gpu_ctrl_ack, virtio_gpu_cursor_ack
119 };
120 static const char * const names[] = { "control", "cursor" };
121
122 struct virtio_gpu_device *vgdev;
123 /* this will expand later */
124 struct virtqueue *vqs[2];
125 u32 num_scanouts, num_capsets;
126 int ret = 0;
127
128 if (!virtio_has_feature(vdev, VIRTIO_F_VERSION_1))
129 return -ENODEV;
130
131 vgdev = drmm_kzalloc(dev, sizeof(struct virtio_gpu_device), GFP_KERNEL);
132 if (!vgdev)
133 return -ENOMEM;
134
135 vgdev->ddev = dev;
136 dev->dev_private = vgdev;
137 vgdev->vdev = vdev;
138
139 spin_lock_init(&vgdev->display_info_lock);
140 spin_lock_init(&vgdev->resource_export_lock);
141 spin_lock_init(&vgdev->host_visible_lock);
142 ida_init(&vgdev->ctx_id_ida);
143 ida_init(&vgdev->resource_ida);
144 init_waitqueue_head(&vgdev->resp_wq);
145 virtio_gpu_init_vq(&vgdev->ctrlq, virtio_gpu_dequeue_ctrl_func);
146 virtio_gpu_init_vq(&vgdev->cursorq, virtio_gpu_dequeue_cursor_func);
147
148 vgdev->fence_drv.context = dma_fence_context_alloc(1);
149 spin_lock_init(&vgdev->fence_drv.lock);
150 INIT_LIST_HEAD(&vgdev->fence_drv.fences);
151 INIT_LIST_HEAD(&vgdev->cap_cache);
152 INIT_WORK(&vgdev->config_changed_work,
153 virtio_gpu_config_changed_work_func);
154
155 INIT_WORK(&vgdev->obj_free_work,
156 virtio_gpu_array_put_free_work);
157 INIT_LIST_HEAD(&vgdev->obj_free_list);
158 spin_lock_init(&vgdev->obj_free_lock);
159
160#ifdef __LITTLE_ENDIAN
161 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_VIRGL))
162 vgdev->has_virgl_3d = true;
163#endif
164 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_EDID)) {
165 vgdev->has_edid = true;
166 }
167 if (virtio_has_feature(vgdev->vdev, VIRTIO_RING_F_INDIRECT_DESC)) {
168 vgdev->has_indirect = true;
169 }
170 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_RESOURCE_UUID)) {
171 vgdev->has_resource_assign_uuid = true;
172 }
173 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_RESOURCE_BLOB)) {
174 vgdev->has_resource_blob = true;
175 }
176 if (virtio_get_shm_region(vgdev->vdev, &vgdev->host_visible_region,
177 VIRTIO_GPU_SHM_ID_HOST_VISIBLE)) {
178 if (!devm_request_mem_region(&vgdev->vdev->dev,
179 vgdev->host_visible_region.addr,
180 vgdev->host_visible_region.len,
181 dev_name(&vgdev->vdev->dev))) {
182 DRM_ERROR("Could not reserve host visible region\n");
183 ret = -EBUSY;
184 goto err_vqs;
185 }
186
187 DRM_INFO("Host memory window: 0x%lx +0x%lx\n",
188 (unsigned long)vgdev->host_visible_region.addr,
189 (unsigned long)vgdev->host_visible_region.len);
190 vgdev->has_host_visible = true;
191 drm_mm_init(&vgdev->host_visible_mm,
192 (unsigned long)vgdev->host_visible_region.addr,
193 (unsigned long)vgdev->host_visible_region.len);
194 }
195 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_CONTEXT_INIT)) {
196 vgdev->has_context_init = true;
197 }
198
199 DRM_INFO("features: %cvirgl %cedid %cresource_blob %chost_visible",
200 vgdev->has_virgl_3d ? '+' : '-',
201 vgdev->has_edid ? '+' : '-',
202 vgdev->has_resource_blob ? '+' : '-',
203 vgdev->has_host_visible ? '+' : '-');
204
205 DRM_INFO("features: %ccontext_init\n",
206 vgdev->has_context_init ? '+' : '-');
207
208 ret = virtio_find_vqs(vgdev->vdev, 2, vqs, callbacks, names, NULL);
209 if (ret) {
210 DRM_ERROR("failed to find virt queues\n");
211 goto err_vqs;
212 }
213 vgdev->ctrlq.vq = vqs[0];
214 vgdev->cursorq.vq = vqs[1];
215 ret = virtio_gpu_alloc_vbufs(vgdev);
216 if (ret) {
217 DRM_ERROR("failed to alloc vbufs\n");
218 goto err_vbufs;
219 }
220
221 /* get display info */
222 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config,
223 num_scanouts, &num_scanouts);
224 vgdev->num_scanouts = min_t(uint32_t, num_scanouts,
225 VIRTIO_GPU_MAX_SCANOUTS);
226 if (!vgdev->num_scanouts) {
227 DRM_ERROR("num_scanouts is zero\n");
228 ret = -EINVAL;
229 goto err_scanouts;
230 }
231 DRM_INFO("number of scanouts: %d\n", num_scanouts);
232
233 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config,
234 num_capsets, &num_capsets);
235 DRM_INFO("number of cap sets: %d\n", num_capsets);
236
237 ret = virtio_gpu_modeset_init(vgdev);
238 if (ret) {
239 DRM_ERROR("modeset init failed\n");
240 goto err_scanouts;
241 }
242
243 virtio_device_ready(vgdev->vdev);
244
245 if (num_capsets)
246 virtio_gpu_get_capsets(vgdev, num_capsets);
247 if (vgdev->has_edid)
248 virtio_gpu_cmd_get_edids(vgdev);
249 virtio_gpu_cmd_get_display_info(vgdev);
250 virtio_gpu_notify(vgdev);
251 wait_event_timeout(vgdev->resp_wq, !vgdev->display_info_pending,
252 5 * HZ);
253 return 0;
254
255err_scanouts:
256 virtio_gpu_free_vbufs(vgdev);
257err_vbufs:
258 vgdev->vdev->config->del_vqs(vgdev->vdev);
259err_vqs:
260 dev->dev_private = NULL;
261 return ret;
262}
263
264static void virtio_gpu_cleanup_cap_cache(struct virtio_gpu_device *vgdev)
265{
266 struct virtio_gpu_drv_cap_cache *cache_ent, *tmp;
267
268 list_for_each_entry_safe(cache_ent, tmp, &vgdev->cap_cache, head) {
269 kfree(cache_ent->caps_cache);
270 kfree(cache_ent);
271 }
272}
273
274void virtio_gpu_deinit(struct drm_device *dev)
275{
276 struct virtio_gpu_device *vgdev = dev->dev_private;
277
278 flush_work(&vgdev->obj_free_work);
279 flush_work(&vgdev->ctrlq.dequeue_work);
280 flush_work(&vgdev->cursorq.dequeue_work);
281 flush_work(&vgdev->config_changed_work);
282 virtio_reset_device(vgdev->vdev);
283 vgdev->vdev->config->del_vqs(vgdev->vdev);
284}
285
286void virtio_gpu_release(struct drm_device *dev)
287{
288 struct virtio_gpu_device *vgdev = dev->dev_private;
289
290 if (!vgdev)
291 return;
292
293 virtio_gpu_modeset_fini(vgdev);
294 virtio_gpu_free_vbufs(vgdev);
295 virtio_gpu_cleanup_cap_cache(vgdev);
296
297 if (vgdev->has_host_visible)
298 drm_mm_takedown(&vgdev->host_visible_mm);
299}
300
301int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file)
302{
303 struct virtio_gpu_device *vgdev = dev->dev_private;
304 struct virtio_gpu_fpriv *vfpriv;
305 int handle;
306
307 /* can't create contexts without 3d renderer */
308 if (!vgdev->has_virgl_3d)
309 return 0;
310
311 /* allocate a virt GPU context for this opener */
312 vfpriv = kzalloc(sizeof(*vfpriv), GFP_KERNEL);
313 if (!vfpriv)
314 return -ENOMEM;
315
316 mutex_init(&vfpriv->context_lock);
317
318 handle = ida_alloc(&vgdev->ctx_id_ida, GFP_KERNEL);
319 if (handle < 0) {
320 kfree(vfpriv);
321 return handle;
322 }
323
324 vfpriv->ctx_id = handle + 1;
325 file->driver_priv = vfpriv;
326 return 0;
327}
328
329void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file)
330{
331 struct virtio_gpu_device *vgdev = dev->dev_private;
332 struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
333
334 if (!vgdev->has_virgl_3d)
335 return;
336
337 if (vfpriv->context_created) {
338 virtio_gpu_cmd_context_destroy(vgdev, vfpriv->ctx_id);
339 virtio_gpu_notify(vgdev);
340 }
341
342 ida_free(&vgdev->ctx_id_ida, vfpriv->ctx_id - 1);
343 mutex_destroy(&vfpriv->context_lock);
344 kfree(vfpriv);
345 file->driver_priv = NULL;
346}