1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
  4 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
  5 */
  6
  7#include <drm/drm_atomic.h>
  8#include <drm/drm_atomic_helper.h>
  9#include <drm/drm_blend.h>
 10#include <drm/drm_crtc.h>
 11#include <drm/drm_crtc_helper.h>
 12#include <drm/drm_fourcc.h>
 13#include <drm/drm_framebuffer.h>
 14#include <drm/drm_gem_atomic_helper.h>
 15
 16#include "tidss_crtc.h"
 17#include "tidss_dispc.h"
 18#include "tidss_drv.h"
 19#include "tidss_plane.h"
 20
 21/* drm_plane_helper_funcs */
 22
 23static int tidss_plane_atomic_check(struct drm_plane *plane,
 24				    struct drm_atomic_state *state)
 25{
 26	struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
 27										 plane);
 28	struct drm_device *ddev = plane->dev;
 29	struct tidss_device *tidss = to_tidss(ddev);
 30	struct tidss_plane *tplane = to_tidss_plane(plane);
 31	const struct drm_format_info *finfo;
 32	struct drm_crtc_state *crtc_state;
 33	u32 hw_plane = tplane->hw_plane_id;
 34	u32 hw_videoport;
 35	int ret;
 36
 37	dev_dbg(ddev->dev, "%s\n", __func__);
 38
 39	if (!new_plane_state->crtc) {
 40		/*
 41		 * The visible field is not reset by the DRM core but only
 42		 * updated by drm_plane_helper_check_state(), set it manually.
 43		 */
 44		new_plane_state->visible = false;
 45		return 0;
 46	}
 47
 48	crtc_state = drm_atomic_get_crtc_state(state,
 49					       new_plane_state->crtc);
 50	if (IS_ERR(crtc_state))
 51		return PTR_ERR(crtc_state);
 52
 53	ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state,
 54						  0,
 55						  INT_MAX, true, true);
 56	if (ret < 0)
 57		return ret;
 58
 59	/*
 60	 * The HW is only able to start drawing at subpixel boundary
 61	 * (the two first checks bellow). At the end of a row the HW
 62	 * can only jump integer number of subpixels forward to the
 63	 * beginning of the next row. So we can only show picture with
 64	 * integer subpixel width (the third check). However, after
 65	 * reaching the end of the drawn picture the drawing starts
 66	 * again at the absolute memory address where top left corner
 67	 * position of the drawn picture is (so there is no need to
 68	 * check for odd height).
 69	 */
 70
 71	finfo = drm_format_info(new_plane_state->fb->format->format);
 72
 73	if ((new_plane_state->src_x >> 16) % finfo->hsub != 0) {
 74		dev_dbg(ddev->dev,
 75			"%s: x-position %u not divisible subpixel size %u\n",
 76			__func__, (new_plane_state->src_x >> 16), finfo->hsub);
 77		return -EINVAL;
 78	}
 79
 80	if ((new_plane_state->src_y >> 16) % finfo->vsub != 0) {
 81		dev_dbg(ddev->dev,
 82			"%s: y-position %u not divisible subpixel size %u\n",
 83			__func__, (new_plane_state->src_y >> 16), finfo->vsub);
 84		return -EINVAL;
 85	}
 86
 87	if ((new_plane_state->src_w >> 16) % finfo->hsub != 0) {
 88		dev_dbg(ddev->dev,
 89			"%s: src width %u not divisible by subpixel size %u\n",
 90			 __func__, (new_plane_state->src_w >> 16),
 91			 finfo->hsub);
 92		return -EINVAL;
 93	}
 94
 95	if (!new_plane_state->visible)
 96		return 0;
 97
 98	hw_videoport = to_tidss_crtc(new_plane_state->crtc)->hw_videoport;
 99
100	ret = dispc_plane_check(tidss->dispc, hw_plane, new_plane_state,
101				hw_videoport);
102	if (ret)
103		return ret;
104
105	return 0;
106}
107
108static void tidss_plane_atomic_update(struct drm_plane *plane,
109				      struct drm_atomic_state *state)
110{
111	struct drm_device *ddev = plane->dev;
112	struct tidss_device *tidss = to_tidss(ddev);
113	struct tidss_plane *tplane = to_tidss_plane(plane);
114	struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
115									   plane);
116	u32 hw_videoport;
117	int ret;
118
119	dev_dbg(ddev->dev, "%s\n", __func__);
120
121	if (!new_state->visible) {
122		dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
123		return;
124	}
125
126	hw_videoport = to_tidss_crtc(new_state->crtc)->hw_videoport;
127
128	ret = dispc_plane_setup(tidss->dispc, tplane->hw_plane_id,
129				new_state, hw_videoport);
130
131	if (ret) {
132		dev_err(plane->dev->dev, "%s: Failed to setup plane %d\n",
133			__func__, tplane->hw_plane_id);
134		dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
135		return;
136	}
137
138	dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, true);
139}
140
141static void tidss_plane_atomic_disable(struct drm_plane *plane,
142				       struct drm_atomic_state *state)
143{
144	struct drm_device *ddev = plane->dev;
145	struct tidss_device *tidss = to_tidss(ddev);
146	struct tidss_plane *tplane = to_tidss_plane(plane);
147
148	dev_dbg(ddev->dev, "%s\n", __func__);
149
150	dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
151}
152
153static void drm_plane_destroy(struct drm_plane *plane)
154{
155	struct tidss_plane *tplane = to_tidss_plane(plane);
156
157	drm_plane_cleanup(plane);
158	kfree(tplane);
159}
160
161static const struct drm_plane_helper_funcs tidss_plane_helper_funcs = {
162	.atomic_check = tidss_plane_atomic_check,
163	.atomic_update = tidss_plane_atomic_update,
164	.atomic_disable = tidss_plane_atomic_disable,
165};
166
167static const struct drm_plane_funcs tidss_plane_funcs = {
168	.update_plane = drm_atomic_helper_update_plane,
169	.disable_plane = drm_atomic_helper_disable_plane,
170	.reset = drm_atomic_helper_plane_reset,
171	.destroy = drm_plane_destroy,
172	.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
173	.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
174};
175
176struct tidss_plane *tidss_plane_create(struct tidss_device *tidss,
177				       u32 hw_plane_id, u32 plane_type,
178				       u32 crtc_mask, const u32 *formats,
179				       u32 num_formats)
180{
181	struct tidss_plane *tplane;
182	enum drm_plane_type type;
183	u32 possible_crtcs;
184	u32 num_planes = tidss->feat->num_planes;
185	u32 color_encodings = (BIT(DRM_COLOR_YCBCR_BT601) |
186			       BIT(DRM_COLOR_YCBCR_BT709));
187	u32 color_ranges = (BIT(DRM_COLOR_YCBCR_FULL_RANGE) |
188			    BIT(DRM_COLOR_YCBCR_LIMITED_RANGE));
189	u32 default_encoding = DRM_COLOR_YCBCR_BT601;
190	u32 default_range = DRM_COLOR_YCBCR_FULL_RANGE;
191	u32 blend_modes = (BIT(DRM_MODE_BLEND_PREMULTI) |
192			   BIT(DRM_MODE_BLEND_COVERAGE));
193	int ret;
194
195	tplane = kzalloc(sizeof(*tplane), GFP_KERNEL);
196	if (!tplane)
197		return ERR_PTR(-ENOMEM);
198
199	tplane->hw_plane_id = hw_plane_id;
200
201	possible_crtcs = crtc_mask;
202	type = plane_type;
203
204	ret = drm_universal_plane_init(&tidss->ddev, &tplane->plane,
205				       possible_crtcs,
206				       &tidss_plane_funcs,
207				       formats, num_formats,
208				       NULL, type, NULL);
209	if (ret < 0)
210		goto err;
211
212	drm_plane_helper_add(&tplane->plane, &tidss_plane_helper_funcs);
213
214	drm_plane_create_zpos_property(&tplane->plane, hw_plane_id, 0,
215				       num_planes - 1);
216
217	ret = drm_plane_create_color_properties(&tplane->plane,
218						color_encodings,
219						color_ranges,
220						default_encoding,
221						default_range);
222	if (ret)
223		goto err;
224
225	ret = drm_plane_create_alpha_property(&tplane->plane);
226	if (ret)
227		goto err;
228
229	ret = drm_plane_create_blend_mode_property(&tplane->plane, blend_modes);
230	if (ret)
231		goto err;
232
233	return tplane;
234
235err:
236	kfree(tplane);
237	return ERR_PTR(ret);
238}