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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Innolux/Chimei EJ030NA TFT LCD panel driver
4 *
5 * Copyright (C) 2020, Paul Cercueil <paul@crapouillou.net>
6 * Copyright (C) 2020, Christophe Branchereau <cbranchereau@gmail.com>
7 */
8
9#include <linux/delay.h>
10#include <linux/device.h>
11#include <linux/gpio/consumer.h>
12#include <linux/media-bus-format.h>
13#include <linux/module.h>
14#include <linux/of_device.h>
15#include <linux/regmap.h>
16#include <linux/regulator/consumer.h>
17#include <linux/spi/spi.h>
18
19#include <drm/drm_modes.h>
20#include <drm/drm_panel.h>
21
22struct ej030na_info {
23 const struct drm_display_mode *display_modes;
24 unsigned int num_modes;
25 u16 width_mm, height_mm;
26 u32 bus_format, bus_flags;
27};
28
29struct ej030na {
30 struct drm_panel panel;
31 struct spi_device *spi;
32 struct regmap *map;
33
34 const struct ej030na_info *panel_info;
35
36 struct regulator *supply;
37 struct gpio_desc *reset_gpio;
38};
39
40static inline struct ej030na *to_ej030na(struct drm_panel *panel)
41{
42 return container_of(panel, struct ej030na, panel);
43}
44
45static const struct reg_sequence ej030na_init_sequence[] = {
46 { 0x05, 0x1e },
47 { 0x05, 0x5c },
48 { 0x02, 0x14 },
49 { 0x03, 0x40 },
50 { 0x04, 0x07 },
51 { 0x06, 0x12 },
52 { 0x07, 0xd2 },
53 { 0x0c, 0x06 },
54 { 0x0d, 0x40 },
55 { 0x0e, 0x40 },
56 { 0x0f, 0x40 },
57 { 0x10, 0x40 },
58 { 0x11, 0x40 },
59 { 0x2f, 0x40 },
60 { 0x5a, 0x02 },
61
62 { 0x30, 0x07 },
63 { 0x31, 0x57 },
64 { 0x32, 0x53 },
65 { 0x33, 0x77 },
66 { 0x34, 0xb8 },
67 { 0x35, 0xbd },
68 { 0x36, 0xb8 },
69 { 0x37, 0xe7 },
70 { 0x38, 0x04 },
71 { 0x39, 0xff },
72
73 { 0x40, 0x0b },
74 { 0x41, 0xb8 },
75 { 0x42, 0xab },
76 { 0x43, 0xb9 },
77 { 0x44, 0x6a },
78 { 0x45, 0x56 },
79 { 0x46, 0x61 },
80 { 0x47, 0x08 },
81 { 0x48, 0x0f },
82 { 0x49, 0x0f },
83};
84
85static int ej030na_prepare(struct drm_panel *panel)
86{
87 struct ej030na *priv = to_ej030na(panel);
88 struct device *dev = &priv->spi->dev;
89 int err;
90
91 err = regulator_enable(priv->supply);
92 if (err) {
93 dev_err(dev, "Failed to enable power supply: %d\n", err);
94 return err;
95 }
96
97 /* Reset the chip */
98 gpiod_set_value_cansleep(priv->reset_gpio, 1);
99 usleep_range(50, 150);
100 gpiod_set_value_cansleep(priv->reset_gpio, 0);
101 usleep_range(50, 150);
102
103 err = regmap_multi_reg_write(priv->map, ej030na_init_sequence,
104 ARRAY_SIZE(ej030na_init_sequence));
105 if (err) {
106 dev_err(dev, "Failed to init registers: %d\n", err);
107 goto err_disable_regulator;
108 }
109
110 return 0;
111
112err_disable_regulator:
113 regulator_disable(priv->supply);
114 return err;
115}
116
117static int ej030na_unprepare(struct drm_panel *panel)
118{
119 struct ej030na *priv = to_ej030na(panel);
120
121 gpiod_set_value_cansleep(priv->reset_gpio, 1);
122 regulator_disable(priv->supply);
123
124 return 0;
125}
126
127static int ej030na_enable(struct drm_panel *panel)
128{
129 struct ej030na *priv = to_ej030na(panel);
130
131 /* standby off */
132 regmap_write(priv->map, 0x2b, 0x01);
133
134 if (panel->backlight) {
135 /* Wait for the picture to be ready before enabling backlight */
136 msleep(120);
137 }
138
139 return 0;
140}
141
142static int ej030na_disable(struct drm_panel *panel)
143{
144 struct ej030na *priv = to_ej030na(panel);
145
146 /* standby on */
147 regmap_write(priv->map, 0x2b, 0x00);
148
149 return 0;
150}
151
152static int ej030na_get_modes(struct drm_panel *panel,
153 struct drm_connector *connector)
154{
155 struct ej030na *priv = to_ej030na(panel);
156 const struct ej030na_info *panel_info = priv->panel_info;
157 struct drm_display_mode *mode;
158 unsigned int i;
159
160 for (i = 0; i < panel_info->num_modes; i++) {
161 mode = drm_mode_duplicate(connector->dev,
162 &panel_info->display_modes[i]);
163 if (!mode)
164 return -ENOMEM;
165
166 drm_mode_set_name(mode);
167
168 mode->type = DRM_MODE_TYPE_DRIVER;
169 if (panel_info->num_modes == 1)
170 mode->type |= DRM_MODE_TYPE_PREFERRED;
171
172 drm_mode_probed_add(connector, mode);
173 }
174
175 connector->display_info.bpc = 8;
176 connector->display_info.width_mm = panel_info->width_mm;
177 connector->display_info.height_mm = panel_info->height_mm;
178
179 drm_display_info_set_bus_formats(&connector->display_info,
180 &panel_info->bus_format, 1);
181 connector->display_info.bus_flags = panel_info->bus_flags;
182
183 return panel_info->num_modes;
184}
185
186static const struct drm_panel_funcs ej030na_funcs = {
187 .prepare = ej030na_prepare,
188 .unprepare = ej030na_unprepare,
189 .enable = ej030na_enable,
190 .disable = ej030na_disable,
191 .get_modes = ej030na_get_modes,
192};
193
194static const struct regmap_config ej030na_regmap_config = {
195 .reg_bits = 8,
196 .val_bits = 8,
197 .max_register = 0x5a,
198};
199
200static int ej030na_probe(struct spi_device *spi)
201{
202 struct device *dev = &spi->dev;
203 struct ej030na *priv;
204 int err;
205
206 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
207 if (!priv)
208 return -ENOMEM;
209
210 priv->spi = spi;
211 spi_set_drvdata(spi, priv);
212
213 priv->map = devm_regmap_init_spi(spi, &ej030na_regmap_config);
214 if (IS_ERR(priv->map)) {
215 dev_err(dev, "Unable to init regmap\n");
216 return PTR_ERR(priv->map);
217 }
218
219 priv->panel_info = of_device_get_match_data(dev);
220 if (!priv->panel_info)
221 return -EINVAL;
222
223 priv->supply = devm_regulator_get(dev, "power");
224 if (IS_ERR(priv->supply))
225 return dev_err_probe(dev, PTR_ERR(priv->supply),
226 "Failed to get power supply\n");
227
228 priv->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
229 if (IS_ERR(priv->reset_gpio))
230 return dev_err_probe(dev, PTR_ERR(priv->reset_gpio),
231 "Failed to get reset GPIO\n");
232
233 drm_panel_init(&priv->panel, dev, &ej030na_funcs,
234 DRM_MODE_CONNECTOR_DPI);
235
236 err = drm_panel_of_backlight(&priv->panel);
237 if (err)
238 return err;
239
240 drm_panel_add(&priv->panel);
241
242 return 0;
243}
244
245static void ej030na_remove(struct spi_device *spi)
246{
247 struct ej030na *priv = spi_get_drvdata(spi);
248
249 drm_panel_remove(&priv->panel);
250 drm_panel_disable(&priv->panel);
251 drm_panel_unprepare(&priv->panel);
252}
253
254static const struct drm_display_mode ej030na_modes[] = {
255 { /* 60 Hz */
256 .clock = 14400,
257 .hdisplay = 320,
258 .hsync_start = 320 + 10,
259 .hsync_end = 320 + 10 + 37,
260 .htotal = 320 + 10 + 37 + 33,
261 .vdisplay = 480,
262 .vsync_start = 480 + 102,
263 .vsync_end = 480 + 102 + 9 + 9,
264 .vtotal = 480 + 102 + 9 + 9,
265 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
266 },
267 { /* 50 Hz */
268 .clock = 12000,
269 .hdisplay = 320,
270 .hsync_start = 320 + 10,
271 .hsync_end = 320 + 10 + 37,
272 .htotal = 320 + 10 + 37 + 33,
273 .vdisplay = 480,
274 .vsync_start = 480 + 102,
275 .vsync_end = 480 + 102 + 9,
276 .vtotal = 480 + 102 + 9 + 9,
277 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
278 },
279};
280
281static const struct ej030na_info ej030na_info = {
282 .display_modes = ej030na_modes,
283 .num_modes = ARRAY_SIZE(ej030na_modes),
284 .width_mm = 70,
285 .height_mm = 51,
286 .bus_format = MEDIA_BUS_FMT_RGB888_3X8_DELTA,
287 .bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE | DRM_BUS_FLAG_DE_LOW,
288};
289
290static const struct of_device_id ej030na_of_match[] = {
291 { .compatible = "innolux,ej030na", .data = &ej030na_info },
292 { /* sentinel */ }
293};
294MODULE_DEVICE_TABLE(of, ej030na_of_match);
295
296static struct spi_driver ej030na_driver = {
297 .driver = {
298 .name = "panel-innolux-ej030na",
299 .of_match_table = ej030na_of_match,
300 },
301 .probe = ej030na_probe,
302 .remove = ej030na_remove,
303};
304module_spi_driver(ej030na_driver);
305
306MODULE_AUTHOR("Paul Cercueil <paul@crapouillou.net>");
307MODULE_AUTHOR("Christophe Branchereau <cbranchereau@gmail.com>");
308MODULE_LICENSE("GPL v2");