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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2016 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
5 * Copyright (C) 2015 Amlogic, Inc. All rights reserved.
6 */
7
8#include <linux/clk.h>
9#include <linux/component.h>
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/of_device.h>
13#include <linux/of_graph.h>
14#include <linux/regulator/consumer.h>
15#include <linux/reset.h>
16
17#include <media/cec-notifier.h>
18
19#include <drm/drm_atomic_helper.h>
20#include <drm/drm_bridge.h>
21#include <drm/drm_bridge_connector.h>
22#include <drm/drm_device.h>
23#include <drm/drm_edid.h>
24#include <drm/drm_probe_helper.h>
25#include <drm/drm_simple_kms_helper.h>
26
27#include <linux/media-bus-format.h>
28#include <linux/videodev2.h>
29
30#include "meson_drv.h"
31#include "meson_registers.h"
32#include "meson_vclk.h"
33#include "meson_venc.h"
34#include "meson_encoder_hdmi.h"
35
36struct meson_encoder_hdmi {
37 struct drm_encoder encoder;
38 struct drm_bridge bridge;
39 struct drm_bridge *next_bridge;
40 struct drm_connector *connector;
41 struct meson_drm *priv;
42 unsigned long output_bus_fmt;
43 struct cec_notifier *cec_notifier;
44};
45
46#define bridge_to_meson_encoder_hdmi(x) \
47 container_of(x, struct meson_encoder_hdmi, bridge)
48
49static int meson_encoder_hdmi_attach(struct drm_bridge *bridge,
50 enum drm_bridge_attach_flags flags)
51{
52 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
53
54 return drm_bridge_attach(bridge->encoder, encoder_hdmi->next_bridge,
55 &encoder_hdmi->bridge, flags);
56}
57
58static void meson_encoder_hdmi_detach(struct drm_bridge *bridge)
59{
60 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
61
62 cec_notifier_conn_unregister(encoder_hdmi->cec_notifier);
63 encoder_hdmi->cec_notifier = NULL;
64}
65
66static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
67 const struct drm_display_mode *mode)
68{
69 struct meson_drm *priv = encoder_hdmi->priv;
70 int vic = drm_match_cea_mode(mode);
71 unsigned int phy_freq;
72 unsigned int vclk_freq;
73 unsigned int venc_freq;
74 unsigned int hdmi_freq;
75
76 vclk_freq = mode->clock;
77
78 /* For 420, pixel clock is half unlike venc clock */
79 if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
80 vclk_freq /= 2;
81
82 /* TMDS clock is pixel_clock * 10 */
83 phy_freq = vclk_freq * 10;
84
85 if (!vic) {
86 meson_vclk_setup(priv, MESON_VCLK_TARGET_DMT, phy_freq,
87 vclk_freq, vclk_freq, vclk_freq, false);
88 return;
89 }
90
91 /* 480i/576i needs global pixel doubling */
92 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
93 vclk_freq *= 2;
94
95 venc_freq = vclk_freq;
96 hdmi_freq = vclk_freq;
97
98 /* VENC double pixels for 1080i, 720p and YUV420 modes */
99 if (meson_venc_hdmi_venc_repeat(vic) ||
100 encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
101 venc_freq *= 2;
102
103 vclk_freq = max(venc_freq, hdmi_freq);
104
105 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
106 venc_freq /= 2;
107
108 dev_dbg(priv->dev, "vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n",
109 phy_freq, vclk_freq, venc_freq, hdmi_freq,
110 priv->venc.hdmi_use_enci);
111
112 meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, phy_freq, vclk_freq,
113 venc_freq, hdmi_freq, priv->venc.hdmi_use_enci);
114}
115
116static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bridge,
117 const struct drm_display_info *display_info,
118 const struct drm_display_mode *mode)
119{
120 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
121 struct meson_drm *priv = encoder_hdmi->priv;
122 bool is_hdmi2_sink = display_info->hdmi.scdc.supported;
123 unsigned int phy_freq;
124 unsigned int vclk_freq;
125 unsigned int venc_freq;
126 unsigned int hdmi_freq;
127 int vic = drm_match_cea_mode(mode);
128 enum drm_mode_status status;
129
130 dev_dbg(priv->dev, "Modeline " DRM_MODE_FMT "\n", DRM_MODE_ARG(mode));
131
132 /* If sink does not support 540MHz, reject the non-420 HDMI2 modes */
133 if (display_info->max_tmds_clock &&
134 mode->clock > display_info->max_tmds_clock &&
135 !drm_mode_is_420_only(display_info, mode) &&
136 !drm_mode_is_420_also(display_info, mode))
137 return MODE_BAD;
138
139 /* Check against non-VIC supported modes */
140 if (!vic) {
141 status = meson_venc_hdmi_supported_mode(mode);
142 if (status != MODE_OK)
143 return status;
144
145 return meson_vclk_dmt_supported_freq(priv, mode->clock);
146 /* Check against supported VIC modes */
147 } else if (!meson_venc_hdmi_supported_vic(vic))
148 return MODE_BAD;
149
150 vclk_freq = mode->clock;
151
152 /* For 420, pixel clock is half unlike venc clock */
153 if (drm_mode_is_420_only(display_info, mode) ||
154 (!is_hdmi2_sink &&
155 drm_mode_is_420_also(display_info, mode)))
156 vclk_freq /= 2;
157
158 /* TMDS clock is pixel_clock * 10 */
159 phy_freq = vclk_freq * 10;
160
161 /* 480i/576i needs global pixel doubling */
162 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
163 vclk_freq *= 2;
164
165 venc_freq = vclk_freq;
166 hdmi_freq = vclk_freq;
167
168 /* VENC double pixels for 1080i, 720p and YUV420 modes */
169 if (meson_venc_hdmi_venc_repeat(vic) ||
170 drm_mode_is_420_only(display_info, mode) ||
171 (!is_hdmi2_sink &&
172 drm_mode_is_420_also(display_info, mode)))
173 venc_freq *= 2;
174
175 vclk_freq = max(venc_freq, hdmi_freq);
176
177 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
178 venc_freq /= 2;
179
180 dev_dbg(priv->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n",
181 __func__, phy_freq, vclk_freq, venc_freq, hdmi_freq);
182
183 return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq);
184}
185
186static void meson_encoder_hdmi_atomic_enable(struct drm_bridge *bridge,
187 struct drm_bridge_state *bridge_state)
188{
189 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
190 struct drm_atomic_state *state = bridge_state->base.state;
191 unsigned int ycrcb_map = VPU_HDMI_OUTPUT_CBYCR;
192 struct meson_drm *priv = encoder_hdmi->priv;
193 struct drm_connector_state *conn_state;
194 const struct drm_display_mode *mode;
195 struct drm_crtc_state *crtc_state;
196 struct drm_connector *connector;
197 bool yuv420_mode = false;
198 int vic;
199
200 connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder);
201 if (WARN_ON(!connector))
202 return;
203
204 conn_state = drm_atomic_get_new_connector_state(state, connector);
205 if (WARN_ON(!conn_state))
206 return;
207
208 crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
209 if (WARN_ON(!crtc_state))
210 return;
211
212 mode = &crtc_state->adjusted_mode;
213
214 vic = drm_match_cea_mode(mode);
215
216 dev_dbg(priv->dev, "\"%s\" vic %d\n", mode->name, vic);
217
218 if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) {
219 ycrcb_map = VPU_HDMI_OUTPUT_CRYCB;
220 yuv420_mode = true;
221 } else if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYVY8_1X16)
222 ycrcb_map = VPU_HDMI_OUTPUT_CRYCB;
223
224 /* VENC + VENC-DVI Mode setup */
225 meson_venc_hdmi_mode_set(priv, vic, ycrcb_map, yuv420_mode, mode);
226
227 /* VCLK Set clock */
228 meson_encoder_hdmi_set_vclk(encoder_hdmi, mode);
229
230 if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
231 /* Setup YUV420 to HDMI-TX, no 10bit diphering */
232 writel_relaxed(2 | (2 << 2),
233 priv->io_base + _REG(VPU_HDMI_FMT_CTRL));
234 else if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYVY8_1X16)
235 /* Setup YUV422 to HDMI-TX, no 10bit diphering */
236 writel_relaxed(1 | (2 << 2),
237 priv->io_base + _REG(VPU_HDMI_FMT_CTRL));
238 else
239 /* Setup YUV444 to HDMI-TX, no 10bit diphering */
240 writel_relaxed(0, priv->io_base + _REG(VPU_HDMI_FMT_CTRL));
241
242 dev_dbg(priv->dev, "%s\n", priv->venc.hdmi_use_enci ? "VENCI" : "VENCP");
243
244 if (priv->venc.hdmi_use_enci)
245 writel_relaxed(1, priv->io_base + _REG(ENCI_VIDEO_EN));
246 else
247 writel_relaxed(1, priv->io_base + _REG(ENCP_VIDEO_EN));
248}
249
250static void meson_encoder_hdmi_atomic_disable(struct drm_bridge *bridge,
251 struct drm_bridge_state *bridge_state)
252{
253 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
254 struct meson_drm *priv = encoder_hdmi->priv;
255
256 writel_bits_relaxed(0x3, 0,
257 priv->io_base + _REG(VPU_HDMI_SETTING));
258
259 writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_EN));
260 writel_relaxed(0, priv->io_base + _REG(ENCP_VIDEO_EN));
261}
262
263static const u32 meson_encoder_hdmi_out_bus_fmts[] = {
264 MEDIA_BUS_FMT_YUV8_1X24,
265 MEDIA_BUS_FMT_UYVY8_1X16,
266 MEDIA_BUS_FMT_UYYVYY8_0_5X24,
267};
268
269static u32 *
270meson_encoder_hdmi_get_inp_bus_fmts(struct drm_bridge *bridge,
271 struct drm_bridge_state *bridge_state,
272 struct drm_crtc_state *crtc_state,
273 struct drm_connector_state *conn_state,
274 u32 output_fmt,
275 unsigned int *num_input_fmts)
276{
277 u32 *input_fmts = NULL;
278 int i;
279
280 *num_input_fmts = 0;
281
282 for (i = 0 ; i < ARRAY_SIZE(meson_encoder_hdmi_out_bus_fmts) ; ++i) {
283 if (output_fmt == meson_encoder_hdmi_out_bus_fmts[i]) {
284 *num_input_fmts = 1;
285 input_fmts = kcalloc(*num_input_fmts,
286 sizeof(*input_fmts),
287 GFP_KERNEL);
288 if (!input_fmts)
289 return NULL;
290
291 input_fmts[0] = output_fmt;
292
293 break;
294 }
295 }
296
297 return input_fmts;
298}
299
300static int meson_encoder_hdmi_atomic_check(struct drm_bridge *bridge,
301 struct drm_bridge_state *bridge_state,
302 struct drm_crtc_state *crtc_state,
303 struct drm_connector_state *conn_state)
304{
305 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
306 struct drm_connector_state *old_conn_state =
307 drm_atomic_get_old_connector_state(conn_state->state, conn_state->connector);
308 struct meson_drm *priv = encoder_hdmi->priv;
309
310 encoder_hdmi->output_bus_fmt = bridge_state->output_bus_cfg.format;
311
312 dev_dbg(priv->dev, "output_bus_fmt %lx\n", encoder_hdmi->output_bus_fmt);
313
314 if (!drm_connector_atomic_hdr_metadata_equal(old_conn_state, conn_state))
315 crtc_state->mode_changed = true;
316
317 return 0;
318}
319
320static void meson_encoder_hdmi_hpd_notify(struct drm_bridge *bridge,
321 enum drm_connector_status status)
322{
323 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
324 struct edid *edid;
325
326 if (!encoder_hdmi->cec_notifier)
327 return;
328
329 if (status == connector_status_connected) {
330 edid = drm_bridge_get_edid(encoder_hdmi->next_bridge, encoder_hdmi->connector);
331 if (!edid)
332 return;
333
334 cec_notifier_set_phys_addr_from_edid(encoder_hdmi->cec_notifier, edid);
335 } else
336 cec_notifier_phys_addr_invalidate(encoder_hdmi->cec_notifier);
337}
338
339static const struct drm_bridge_funcs meson_encoder_hdmi_bridge_funcs = {
340 .attach = meson_encoder_hdmi_attach,
341 .detach = meson_encoder_hdmi_detach,
342 .mode_valid = meson_encoder_hdmi_mode_valid,
343 .hpd_notify = meson_encoder_hdmi_hpd_notify,
344 .atomic_enable = meson_encoder_hdmi_atomic_enable,
345 .atomic_disable = meson_encoder_hdmi_atomic_disable,
346 .atomic_get_input_bus_fmts = meson_encoder_hdmi_get_inp_bus_fmts,
347 .atomic_check = meson_encoder_hdmi_atomic_check,
348 .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
349 .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
350 .atomic_reset = drm_atomic_helper_bridge_reset,
351};
352
353int meson_encoder_hdmi_init(struct meson_drm *priv)
354{
355 struct meson_encoder_hdmi *meson_encoder_hdmi;
356 struct platform_device *pdev;
357 struct device_node *remote;
358 int ret;
359
360 meson_encoder_hdmi = devm_kzalloc(priv->dev, sizeof(*meson_encoder_hdmi), GFP_KERNEL);
361 if (!meson_encoder_hdmi)
362 return -ENOMEM;
363
364 /* HDMI Transceiver Bridge */
365 remote = of_graph_get_remote_node(priv->dev->of_node, 1, 0);
366 if (!remote) {
367 dev_err(priv->dev, "HDMI transceiver device is disabled");
368 return 0;
369 }
370
371 meson_encoder_hdmi->next_bridge = of_drm_find_bridge(remote);
372 if (!meson_encoder_hdmi->next_bridge) {
373 dev_err(priv->dev, "Failed to find HDMI transceiver bridge\n");
374 ret = -EPROBE_DEFER;
375 goto err_put_node;
376 }
377
378 /* HDMI Encoder Bridge */
379 meson_encoder_hdmi->bridge.funcs = &meson_encoder_hdmi_bridge_funcs;
380 meson_encoder_hdmi->bridge.of_node = priv->dev->of_node;
381 meson_encoder_hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
382 meson_encoder_hdmi->bridge.interlace_allowed = true;
383
384 drm_bridge_add(&meson_encoder_hdmi->bridge);
385
386 meson_encoder_hdmi->priv = priv;
387
388 /* Encoder */
389 ret = drm_simple_encoder_init(priv->drm, &meson_encoder_hdmi->encoder,
390 DRM_MODE_ENCODER_TMDS);
391 if (ret) {
392 dev_err(priv->dev, "Failed to init HDMI encoder: %d\n", ret);
393 goto err_put_node;
394 }
395
396 meson_encoder_hdmi->encoder.possible_crtcs = BIT(0);
397
398 /* Attach HDMI Encoder Bridge to Encoder */
399 ret = drm_bridge_attach(&meson_encoder_hdmi->encoder, &meson_encoder_hdmi->bridge, NULL,
400 DRM_BRIDGE_ATTACH_NO_CONNECTOR);
401 if (ret) {
402 dev_err(priv->dev, "Failed to attach bridge: %d\n", ret);
403 goto err_put_node;
404 }
405
406 /* Initialize & attach Bridge Connector */
407 meson_encoder_hdmi->connector = drm_bridge_connector_init(priv->drm,
408 &meson_encoder_hdmi->encoder);
409 if (IS_ERR(meson_encoder_hdmi->connector)) {
410 dev_err(priv->dev, "Unable to create HDMI bridge connector\n");
411 ret = PTR_ERR(meson_encoder_hdmi->connector);
412 goto err_put_node;
413 }
414 drm_connector_attach_encoder(meson_encoder_hdmi->connector,
415 &meson_encoder_hdmi->encoder);
416
417 /*
418 * We should have now in place:
419 * encoder->[hdmi encoder bridge]->[dw-hdmi bridge]->[display connector bridge]->[display connector]
420 */
421
422 /*
423 * drm_connector_attach_max_bpc_property() requires the
424 * connector to have a state.
425 */
426 drm_atomic_helper_connector_reset(meson_encoder_hdmi->connector);
427
428 if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL) ||
429 meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) ||
430 meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A))
431 drm_connector_attach_hdr_output_metadata_property(meson_encoder_hdmi->connector);
432
433 drm_connector_attach_max_bpc_property(meson_encoder_hdmi->connector, 8, 8);
434
435 /* Handle this here until handled by drm_bridge_connector_init() */
436 meson_encoder_hdmi->connector->ycbcr_420_allowed = true;
437
438 pdev = of_find_device_by_node(remote);
439 of_node_put(remote);
440 if (pdev) {
441 struct cec_connector_info conn_info;
442 struct cec_notifier *notifier;
443
444 cec_fill_conn_info_from_drm(&conn_info, meson_encoder_hdmi->connector);
445
446 notifier = cec_notifier_conn_register(&pdev->dev, NULL, &conn_info);
447 if (!notifier) {
448 put_device(&pdev->dev);
449 return -ENOMEM;
450 }
451
452 meson_encoder_hdmi->cec_notifier = notifier;
453 }
454
455 priv->encoders[MESON_ENC_HDMI] = meson_encoder_hdmi;
456
457 dev_dbg(priv->dev, "HDMI encoder initialized\n");
458
459 return 0;
460
461err_put_node:
462 of_node_put(remote);
463 return ret;
464}
465
466void meson_encoder_hdmi_remove(struct meson_drm *priv)
467{
468 struct meson_encoder_hdmi *meson_encoder_hdmi;
469
470 if (priv->encoders[MESON_ENC_HDMI]) {
471 meson_encoder_hdmi = priv->encoders[MESON_ENC_HDMI];
472 drm_bridge_remove(&meson_encoder_hdmi->bridge);
473 drm_bridge_remove(meson_encoder_hdmi->next_bridge);
474 }
475}