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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019-2022 Bootlin
4 * Author: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
5 */
6
7#include <linux/bitfield.h>
8#include <linux/clk.h>
9#include <linux/mfd/syscon.h>
10#include <linux/module.h>
11#include <linux/of.h>
12#include <linux/of_address.h>
13#include <linux/of_device.h>
14#include <linux/of_reserved_mem.h>
15#include <linux/regmap.h>
16#include <linux/types.h>
17
18#include <drm/drm_atomic_helper.h>
19#include <drm/drm_drv.h>
20#include <drm/drm_fbdev_generic.h>
21#include <drm/drm_gem_dma_helper.h>
22#include <drm/drm_print.h>
23
24#include "logicvc_crtc.h"
25#include "logicvc_drm.h"
26#include "logicvc_interface.h"
27#include "logicvc_mode.h"
28#include "logicvc_layer.h"
29#include "logicvc_of.h"
30#include "logicvc_regs.h"
31
32DEFINE_DRM_GEM_DMA_FOPS(logicvc_drm_fops);
33
34static int logicvc_drm_gem_dma_dumb_create(struct drm_file *file_priv,
35 struct drm_device *drm_dev,
36 struct drm_mode_create_dumb *args)
37{
38 struct logicvc_drm *logicvc = logicvc_drm(drm_dev);
39
40 /* Stride is always fixed to its configuration value. */
41 args->pitch = logicvc->config.row_stride * DIV_ROUND_UP(args->bpp, 8);
42
43 return drm_gem_dma_dumb_create_internal(file_priv, drm_dev, args);
44}
45
46static struct drm_driver logicvc_drm_driver = {
47 .driver_features = DRIVER_GEM | DRIVER_MODESET |
48 DRIVER_ATOMIC,
49
50 .fops = &logicvc_drm_fops,
51 .name = "logicvc-drm",
52 .desc = "Xylon LogiCVC DRM driver",
53 .date = "20200403",
54 .major = 1,
55 .minor = 0,
56
57 DRM_GEM_DMA_DRIVER_OPS_VMAP_WITH_DUMB_CREATE(logicvc_drm_gem_dma_dumb_create),
58};
59
60static struct regmap_config logicvc_drm_regmap_config = {
61 .reg_bits = 32,
62 .val_bits = 32,
63 .reg_stride = 4,
64 .name = "logicvc-drm",
65};
66
67static irqreturn_t logicvc_drm_irq_handler(int irq, void *data)
68{
69 struct logicvc_drm *logicvc = data;
70 irqreturn_t ret = IRQ_NONE;
71 u32 stat = 0;
72
73 /* Get pending interrupt sources. */
74 regmap_read(logicvc->regmap, LOGICVC_INT_STAT_REG, &stat);
75
76 /* Clear all pending interrupt sources. */
77 regmap_write(logicvc->regmap, LOGICVC_INT_STAT_REG, stat);
78
79 if (stat & LOGICVC_INT_STAT_V_SYNC) {
80 logicvc_crtc_vblank_handler(logicvc);
81 ret = IRQ_HANDLED;
82 }
83
84 return ret;
85}
86
87static int logicvc_drm_config_parse(struct logicvc_drm *logicvc)
88{
89 struct drm_device *drm_dev = &logicvc->drm_dev;
90 struct device *dev = drm_dev->dev;
91 struct device_node *of_node = dev->of_node;
92 struct logicvc_drm_config *config = &logicvc->config;
93 struct device_node *layers_node;
94 int ret;
95
96 logicvc_of_property_parse_bool(of_node, LOGICVC_OF_PROPERTY_DITHERING,
97 &config->dithering);
98 logicvc_of_property_parse_bool(of_node,
99 LOGICVC_OF_PROPERTY_BACKGROUND_LAYER,
100 &config->background_layer);
101 logicvc_of_property_parse_bool(of_node,
102 LOGICVC_OF_PROPERTY_LAYERS_CONFIGURABLE,
103 &config->layers_configurable);
104
105 ret = logicvc_of_property_parse_u32(of_node,
106 LOGICVC_OF_PROPERTY_DISPLAY_INTERFACE,
107 &config->display_interface);
108 if (ret)
109 return ret;
110
111 ret = logicvc_of_property_parse_u32(of_node,
112 LOGICVC_OF_PROPERTY_DISPLAY_COLORSPACE,
113 &config->display_colorspace);
114 if (ret)
115 return ret;
116
117 ret = logicvc_of_property_parse_u32(of_node,
118 LOGICVC_OF_PROPERTY_DISPLAY_DEPTH,
119 &config->display_depth);
120 if (ret)
121 return ret;
122
123 ret = logicvc_of_property_parse_u32(of_node,
124 LOGICVC_OF_PROPERTY_ROW_STRIDE,
125 &config->row_stride);
126 if (ret)
127 return ret;
128
129 layers_node = of_get_child_by_name(of_node, "layers");
130 if (!layers_node) {
131 drm_err(drm_dev, "Missing non-optional layers node\n");
132 return -EINVAL;
133 }
134
135 config->layers_count = of_get_child_count(layers_node);
136 if (!config->layers_count) {
137 drm_err(drm_dev,
138 "Missing a non-optional layers children node\n");
139 return -EINVAL;
140 }
141
142 return 0;
143}
144
145static int logicvc_clocks_prepare(struct logicvc_drm *logicvc)
146{
147 struct drm_device *drm_dev = &logicvc->drm_dev;
148 struct device *dev = drm_dev->dev;
149
150 struct {
151 struct clk **clk;
152 char *name;
153 bool optional;
154 } clocks_map[] = {
155 {
156 .clk = &logicvc->vclk,
157 .name = "vclk",
158 .optional = false,
159 },
160 {
161 .clk = &logicvc->vclk2,
162 .name = "vclk2",
163 .optional = true,
164 },
165 {
166 .clk = &logicvc->lvdsclk,
167 .name = "lvdsclk",
168 .optional = true,
169 },
170 {
171 .clk = &logicvc->lvdsclkn,
172 .name = "lvdsclkn",
173 .optional = true,
174 },
175 };
176 unsigned int i;
177 int ret;
178
179 for (i = 0; i < ARRAY_SIZE(clocks_map); i++) {
180 struct clk *clk;
181
182 clk = devm_clk_get(dev, clocks_map[i].name);
183 if (IS_ERR(clk)) {
184 if (PTR_ERR(clk) == -ENOENT && clocks_map[i].optional)
185 continue;
186
187 drm_err(drm_dev, "Missing non-optional clock %s\n",
188 clocks_map[i].name);
189
190 ret = PTR_ERR(clk);
191 goto error;
192 }
193
194 ret = clk_prepare_enable(clk);
195 if (ret) {
196 drm_err(drm_dev,
197 "Failed to prepare and enable clock %s\n",
198 clocks_map[i].name);
199 goto error;
200 }
201
202 *clocks_map[i].clk = clk;
203 }
204
205 return 0;
206
207error:
208 for (i = 0; i < ARRAY_SIZE(clocks_map); i++) {
209 if (!*clocks_map[i].clk)
210 continue;
211
212 clk_disable_unprepare(*clocks_map[i].clk);
213 *clocks_map[i].clk = NULL;
214 }
215
216 return ret;
217}
218
219static int logicvc_clocks_unprepare(struct logicvc_drm *logicvc)
220{
221 struct clk **clocks[] = {
222 &logicvc->vclk,
223 &logicvc->vclk2,
224 &logicvc->lvdsclk,
225 &logicvc->lvdsclkn,
226 };
227 unsigned int i;
228
229 for (i = 0; i < ARRAY_SIZE(clocks); i++) {
230 if (!*clocks[i])
231 continue;
232
233 clk_disable_unprepare(*clocks[i]);
234 *clocks[i] = NULL;
235 }
236
237 return 0;
238}
239
240static const struct logicvc_drm_caps logicvc_drm_caps[] = {
241 {
242 .major = 3,
243 .layer_address = false,
244 },
245 {
246 .major = 4,
247 .layer_address = true,
248 },
249 {
250 .major = 5,
251 .layer_address = true,
252 },
253};
254
255static const struct logicvc_drm_caps *
256logicvc_drm_caps_match(struct logicvc_drm *logicvc)
257{
258 struct drm_device *drm_dev = &logicvc->drm_dev;
259 const struct logicvc_drm_caps *caps = NULL;
260 unsigned int major, minor;
261 char level;
262 unsigned int i;
263 u32 version;
264
265 regmap_read(logicvc->regmap, LOGICVC_IP_VERSION_REG, &version);
266
267 major = FIELD_GET(LOGICVC_IP_VERSION_MAJOR_MASK, version);
268 minor = FIELD_GET(LOGICVC_IP_VERSION_MINOR_MASK, version);
269 level = FIELD_GET(LOGICVC_IP_VERSION_LEVEL_MASK, version) + 'a';
270
271 for (i = 0; i < ARRAY_SIZE(logicvc_drm_caps); i++) {
272 if (logicvc_drm_caps[i].major &&
273 logicvc_drm_caps[i].major != major)
274 continue;
275
276 if (logicvc_drm_caps[i].minor &&
277 logicvc_drm_caps[i].minor != minor)
278 continue;
279
280 if (logicvc_drm_caps[i].level &&
281 logicvc_drm_caps[i].level != level)
282 continue;
283
284 caps = &logicvc_drm_caps[i];
285 }
286
287 drm_info(drm_dev, "LogiCVC version %d.%02d.%c\n", major, minor, level);
288
289 return caps;
290}
291
292static int logicvc_drm_probe(struct platform_device *pdev)
293{
294 struct device_node *of_node = pdev->dev.of_node;
295 struct device_node *reserved_mem_node;
296 struct reserved_mem *reserved_mem = NULL;
297 const struct logicvc_drm_caps *caps;
298 struct logicvc_drm *logicvc;
299 struct device *dev = &pdev->dev;
300 struct drm_device *drm_dev;
301 struct regmap *regmap = NULL;
302 struct resource res;
303 void __iomem *base;
304 int irq;
305 int ret;
306
307 ret = of_reserved_mem_device_init(dev);
308 if (ret && ret != -ENODEV) {
309 dev_err(dev, "Failed to init memory region\n");
310 goto error_early;
311 }
312
313 reserved_mem_node = of_parse_phandle(of_node, "memory-region", 0);
314 if (reserved_mem_node) {
315 reserved_mem = of_reserved_mem_lookup(reserved_mem_node);
316 of_node_put(reserved_mem_node);
317 }
318
319 /* Get regmap from parent if available. */
320 if (of_node->parent)
321 regmap = syscon_node_to_regmap(of_node->parent);
322
323 /* Register our own regmap otherwise. */
324 if (IS_ERR_OR_NULL(regmap)) {
325 ret = of_address_to_resource(of_node, 0, &res);
326 if (ret) {
327 dev_err(dev, "Failed to get resource from address\n");
328 goto error_reserved_mem;
329 }
330
331 base = devm_ioremap_resource(dev, &res);
332 if (IS_ERR(base)) {
333 dev_err(dev, "Failed to map I/O base\n");
334 ret = PTR_ERR(base);
335 goto error_reserved_mem;
336 }
337
338 logicvc_drm_regmap_config.max_register = resource_size(&res) -
339 4;
340
341 regmap = devm_regmap_init_mmio(dev, base,
342 &logicvc_drm_regmap_config);
343 if (IS_ERR(regmap)) {
344 dev_err(dev, "Failed to create regmap for I/O\n");
345 ret = PTR_ERR(regmap);
346 goto error_reserved_mem;
347 }
348 }
349
350 irq = platform_get_irq(pdev, 0);
351 if (irq < 0) {
352 ret = -ENODEV;
353 goto error_reserved_mem;
354 }
355
356 logicvc = devm_drm_dev_alloc(dev, &logicvc_drm_driver,
357 struct logicvc_drm, drm_dev);
358 if (IS_ERR(logicvc)) {
359 ret = PTR_ERR(logicvc);
360 goto error_reserved_mem;
361 }
362
363 platform_set_drvdata(pdev, logicvc);
364 drm_dev = &logicvc->drm_dev;
365
366 logicvc->regmap = regmap;
367 INIT_LIST_HEAD(&logicvc->layers_list);
368
369 caps = logicvc_drm_caps_match(logicvc);
370 if (!caps) {
371 ret = -EINVAL;
372 goto error_reserved_mem;
373 }
374
375 logicvc->caps = caps;
376
377 if (reserved_mem)
378 logicvc->reserved_mem_base = reserved_mem->base;
379
380 ret = logicvc_clocks_prepare(logicvc);
381 if (ret) {
382 drm_err(drm_dev, "Failed to prepare clocks\n");
383 goto error_reserved_mem;
384 }
385
386 ret = devm_request_irq(dev, irq, logicvc_drm_irq_handler, 0,
387 dev_name(dev), logicvc);
388 if (ret) {
389 drm_err(drm_dev, "Failed to request IRQ\n");
390 goto error_clocks;
391 }
392
393 ret = logicvc_drm_config_parse(logicvc);
394 if (ret && ret != -ENODEV) {
395 drm_err(drm_dev, "Failed to parse config\n");
396 goto error_clocks;
397 }
398
399 ret = drmm_mode_config_init(drm_dev);
400 if (ret) {
401 drm_err(drm_dev, "Failed to init mode config\n");
402 goto error_clocks;
403 }
404
405 ret = logicvc_layers_init(logicvc);
406 if (ret) {
407 drm_err(drm_dev, "Failed to initialize layers\n");
408 goto error_clocks;
409 }
410
411 ret = logicvc_crtc_init(logicvc);
412 if (ret) {
413 drm_err(drm_dev, "Failed to initialize CRTC\n");
414 goto error_clocks;
415 }
416
417 logicvc_layers_attach_crtc(logicvc);
418
419 ret = logicvc_interface_init(logicvc);
420 if (ret) {
421 if (ret != -EPROBE_DEFER)
422 drm_err(drm_dev, "Failed to initialize interface\n");
423
424 goto error_clocks;
425 }
426
427 logicvc_interface_attach_crtc(logicvc);
428
429 ret = logicvc_mode_init(logicvc);
430 if (ret) {
431 drm_err(drm_dev, "Failed to initialize KMS\n");
432 goto error_clocks;
433 }
434
435 ret = drm_dev_register(drm_dev, 0);
436 if (ret) {
437 drm_err(drm_dev, "Failed to register DRM device\n");
438 goto error_mode;
439 }
440
441 drm_fbdev_generic_setup(drm_dev, drm_dev->mode_config.preferred_depth);
442
443 return 0;
444
445error_mode:
446 logicvc_mode_fini(logicvc);
447
448error_clocks:
449 logicvc_clocks_unprepare(logicvc);
450
451error_reserved_mem:
452 of_reserved_mem_device_release(dev);
453
454error_early:
455 return ret;
456}
457
458static int logicvc_drm_remove(struct platform_device *pdev)
459{
460 struct logicvc_drm *logicvc = platform_get_drvdata(pdev);
461 struct device *dev = &pdev->dev;
462 struct drm_device *drm_dev = &logicvc->drm_dev;
463
464 drm_dev_unregister(drm_dev);
465 drm_atomic_helper_shutdown(drm_dev);
466
467 logicvc_mode_fini(logicvc);
468
469 logicvc_clocks_unprepare(logicvc);
470
471 of_reserved_mem_device_release(dev);
472
473 return 0;
474}
475
476static const struct of_device_id logicvc_drm_of_table[] = {
477 { .compatible = "xylon,logicvc-3.02.a-display" },
478 { .compatible = "xylon,logicvc-4.01.a-display" },
479 {},
480};
481MODULE_DEVICE_TABLE(of, logicvc_drm_of_table);
482
483static struct platform_driver logicvc_drm_platform_driver = {
484 .probe = logicvc_drm_probe,
485 .remove = logicvc_drm_remove,
486 .driver = {
487 .name = "logicvc-drm",
488 .of_match_table = logicvc_drm_of_table,
489 },
490};
491
492module_platform_driver(logicvc_drm_platform_driver);
493
494MODULE_AUTHOR("Paul Kocialkowski <paul.kocialkowski@bootlin.com>");
495MODULE_DESCRIPTION("Xylon LogiCVC DRM driver");
496MODULE_LICENSE("GPL");