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1/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 */
27
28#include <linux/i2c.h>
29#include <linux/slab.h>
30
31#include <drm/drm_atomic_helper.h>
32#include <drm/drm_crtc.h>
33
34#include "i915_drv.h"
35#include "i915_reg.h"
36#include "intel_connector.h"
37#include "intel_de.h"
38#include "intel_display_types.h"
39#include "intel_dvo.h"
40#include "intel_dvo_dev.h"
41#include "intel_gmbus.h"
42#include "intel_panel.h"
43
44#define INTEL_DVO_CHIP_NONE 0
45#define INTEL_DVO_CHIP_LVDS 1
46#define INTEL_DVO_CHIP_TMDS 2
47#define INTEL_DVO_CHIP_TVOUT 4
48#define INTEL_DVO_CHIP_LVDS_NO_FIXED 5
49
50#define SIL164_ADDR 0x38
51#define CH7xxx_ADDR 0x76
52#define TFP410_ADDR 0x38
53#define NS2501_ADDR 0x38
54
55static const struct intel_dvo_device intel_dvo_devices[] = {
56 {
57 .type = INTEL_DVO_CHIP_TMDS,
58 .name = "sil164",
59 .dvo_reg = DVOC,
60 .dvo_srcdim_reg = DVOC_SRCDIM,
61 .slave_addr = SIL164_ADDR,
62 .dev_ops = &sil164_ops,
63 },
64 {
65 .type = INTEL_DVO_CHIP_TMDS,
66 .name = "ch7xxx",
67 .dvo_reg = DVOC,
68 .dvo_srcdim_reg = DVOC_SRCDIM,
69 .slave_addr = CH7xxx_ADDR,
70 .dev_ops = &ch7xxx_ops,
71 },
72 {
73 .type = INTEL_DVO_CHIP_TMDS,
74 .name = "ch7xxx",
75 .dvo_reg = DVOC,
76 .dvo_srcdim_reg = DVOC_SRCDIM,
77 .slave_addr = 0x75, /* For some ch7010 */
78 .dev_ops = &ch7xxx_ops,
79 },
80 {
81 .type = INTEL_DVO_CHIP_LVDS,
82 .name = "ivch",
83 .dvo_reg = DVOA,
84 .dvo_srcdim_reg = DVOA_SRCDIM,
85 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
86 .dev_ops = &ivch_ops,
87 },
88 {
89 .type = INTEL_DVO_CHIP_TMDS,
90 .name = "tfp410",
91 .dvo_reg = DVOC,
92 .dvo_srcdim_reg = DVOC_SRCDIM,
93 .slave_addr = TFP410_ADDR,
94 .dev_ops = &tfp410_ops,
95 },
96 {
97 .type = INTEL_DVO_CHIP_LVDS,
98 .name = "ch7017",
99 .dvo_reg = DVOC,
100 .dvo_srcdim_reg = DVOC_SRCDIM,
101 .slave_addr = 0x75,
102 .gpio = GMBUS_PIN_DPB,
103 .dev_ops = &ch7017_ops,
104 },
105 {
106 .type = INTEL_DVO_CHIP_LVDS_NO_FIXED,
107 .name = "ns2501",
108 .dvo_reg = DVOB,
109 .dvo_srcdim_reg = DVOB_SRCDIM,
110 .slave_addr = NS2501_ADDR,
111 .dev_ops = &ns2501_ops,
112 },
113};
114
115struct intel_dvo {
116 struct intel_encoder base;
117
118 struct intel_dvo_device dev;
119
120 struct intel_connector *attached_connector;
121
122 bool panel_wants_dither;
123};
124
125static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
126{
127 return container_of(encoder, struct intel_dvo, base);
128}
129
130static struct intel_dvo *intel_attached_dvo(struct intel_connector *connector)
131{
132 return enc_to_dvo(intel_attached_encoder(connector));
133}
134
135static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
136{
137 struct drm_device *dev = connector->base.dev;
138 struct drm_i915_private *dev_priv = to_i915(dev);
139 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
140 u32 tmp;
141
142 tmp = intel_de_read(dev_priv, intel_dvo->dev.dvo_reg);
143
144 if (!(tmp & DVO_ENABLE))
145 return false;
146
147 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
148}
149
150static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
151 enum pipe *pipe)
152{
153 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
154 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
155 u32 tmp;
156
157 tmp = intel_de_read(dev_priv, intel_dvo->dev.dvo_reg);
158
159 *pipe = (tmp & DVO_PIPE_SEL_MASK) >> DVO_PIPE_SEL_SHIFT;
160
161 return tmp & DVO_ENABLE;
162}
163
164static void intel_dvo_get_config(struct intel_encoder *encoder,
165 struct intel_crtc_state *pipe_config)
166{
167 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
168 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
169 u32 tmp, flags = 0;
170
171 pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO);
172
173 tmp = intel_de_read(dev_priv, intel_dvo->dev.dvo_reg);
174 if (tmp & DVO_HSYNC_ACTIVE_HIGH)
175 flags |= DRM_MODE_FLAG_PHSYNC;
176 else
177 flags |= DRM_MODE_FLAG_NHSYNC;
178 if (tmp & DVO_VSYNC_ACTIVE_HIGH)
179 flags |= DRM_MODE_FLAG_PVSYNC;
180 else
181 flags |= DRM_MODE_FLAG_NVSYNC;
182
183 pipe_config->hw.adjusted_mode.flags |= flags;
184
185 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock;
186}
187
188static void intel_disable_dvo(struct intel_atomic_state *state,
189 struct intel_encoder *encoder,
190 const struct intel_crtc_state *old_crtc_state,
191 const struct drm_connector_state *old_conn_state)
192{
193 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
194 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
195 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
196 u32 temp = intel_de_read(dev_priv, dvo_reg);
197
198 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
199 intel_de_write(dev_priv, dvo_reg, temp & ~DVO_ENABLE);
200 intel_de_read(dev_priv, dvo_reg);
201}
202
203static void intel_enable_dvo(struct intel_atomic_state *state,
204 struct intel_encoder *encoder,
205 const struct intel_crtc_state *pipe_config,
206 const struct drm_connector_state *conn_state)
207{
208 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
209 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
210 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
211 u32 temp = intel_de_read(dev_priv, dvo_reg);
212
213 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
214 &pipe_config->hw.mode,
215 &pipe_config->hw.adjusted_mode);
216
217 intel_de_write(dev_priv, dvo_reg, temp | DVO_ENABLE);
218 intel_de_read(dev_priv, dvo_reg);
219
220 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
221}
222
223static enum drm_mode_status
224intel_dvo_mode_valid(struct drm_connector *connector,
225 struct drm_display_mode *mode)
226{
227 struct intel_connector *intel_connector = to_intel_connector(connector);
228 struct intel_dvo *intel_dvo = intel_attached_dvo(intel_connector);
229 const struct drm_display_mode *fixed_mode =
230 intel_panel_fixed_mode(intel_connector, mode);
231 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
232 int target_clock = mode->clock;
233
234 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
235 return MODE_NO_DBLESCAN;
236
237 /* XXX: Validate clock range */
238
239 if (fixed_mode) {
240 enum drm_mode_status status;
241
242 status = intel_panel_mode_valid(intel_connector, mode);
243 if (status != MODE_OK)
244 return status;
245
246 target_clock = fixed_mode->clock;
247 }
248
249 if (target_clock > max_dotclk)
250 return MODE_CLOCK_HIGH;
251
252 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
253}
254
255static int intel_dvo_compute_config(struct intel_encoder *encoder,
256 struct intel_crtc_state *pipe_config,
257 struct drm_connector_state *conn_state)
258{
259 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
260 struct intel_connector *connector = to_intel_connector(conn_state->connector);
261 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
262 const struct drm_display_mode *fixed_mode =
263 intel_panel_fixed_mode(intel_dvo->attached_connector, adjusted_mode);
264
265 /*
266 * If we have timings from the BIOS for the panel, put them in
267 * to the adjusted mode. The CRTC will be set up for this mode,
268 * with the panel scaling set up to source from the H/VDisplay
269 * of the original mode.
270 */
271 if (fixed_mode) {
272 int ret;
273
274 ret = intel_panel_compute_config(connector, adjusted_mode);
275 if (ret)
276 return ret;
277 }
278
279 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
280 return -EINVAL;
281
282 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
283
284 return 0;
285}
286
287static void intel_dvo_pre_enable(struct intel_atomic_state *state,
288 struct intel_encoder *encoder,
289 const struct intel_crtc_state *pipe_config,
290 const struct drm_connector_state *conn_state)
291{
292 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
293 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
294 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
295 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
296 enum pipe pipe = crtc->pipe;
297 u32 dvo_val;
298 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
299 i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg;
300
301 /* Save the data order, since I don't know what it should be set to. */
302 dvo_val = intel_de_read(dev_priv, dvo_reg) &
303 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
304 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
305 DVO_BLANK_ACTIVE_HIGH;
306
307 dvo_val |= DVO_PIPE_SEL(pipe);
308 dvo_val |= DVO_PIPE_STALL;
309 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
310 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
311 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
312 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
313
314 intel_de_write(dev_priv, dvo_srcdim_reg,
315 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
316 intel_de_write(dev_priv, dvo_reg, dvo_val);
317}
318
319static enum drm_connector_status
320intel_dvo_detect(struct drm_connector *connector, bool force)
321{
322 struct drm_i915_private *i915 = to_i915(connector->dev);
323 struct intel_dvo *intel_dvo = intel_attached_dvo(to_intel_connector(connector));
324
325 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
326 connector->base.id, connector->name);
327
328 if (!INTEL_DISPLAY_ENABLED(i915))
329 return connector_status_disconnected;
330
331 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
332}
333
334static int intel_dvo_get_modes(struct drm_connector *connector)
335{
336 struct drm_i915_private *dev_priv = to_i915(connector->dev);
337 int num_modes;
338
339 /*
340 * We should probably have an i2c driver get_modes function for those
341 * devices which will have a fixed set of modes determined by the chip
342 * (TV-out, for example), but for now with just TMDS and LVDS,
343 * that's not the case.
344 */
345 num_modes = intel_ddc_get_modes(connector,
346 intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
347 if (num_modes)
348 return num_modes;
349
350 return intel_panel_get_modes(to_intel_connector(connector));
351}
352
353static const struct drm_connector_funcs intel_dvo_connector_funcs = {
354 .detect = intel_dvo_detect,
355 .late_register = intel_connector_register,
356 .early_unregister = intel_connector_unregister,
357 .destroy = intel_connector_destroy,
358 .fill_modes = drm_helper_probe_single_connector_modes,
359 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
360 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
361};
362
363static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
364 .mode_valid = intel_dvo_mode_valid,
365 .get_modes = intel_dvo_get_modes,
366};
367
368static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
369{
370 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
371
372 if (intel_dvo->dev.dev_ops->destroy)
373 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
374
375 intel_encoder_destroy(encoder);
376}
377
378static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
379 .destroy = intel_dvo_enc_destroy,
380};
381
382static enum port intel_dvo_port(i915_reg_t dvo_reg)
383{
384 if (i915_mmio_reg_equal(dvo_reg, DVOA))
385 return PORT_A;
386 else if (i915_mmio_reg_equal(dvo_reg, DVOB))
387 return PORT_B;
388 else
389 return PORT_C;
390}
391
392void intel_dvo_init(struct drm_i915_private *dev_priv)
393{
394 struct intel_encoder *intel_encoder;
395 struct intel_dvo *intel_dvo;
396 struct intel_connector *intel_connector;
397 int i;
398 int encoder_type = DRM_MODE_ENCODER_NONE;
399
400 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
401 if (!intel_dvo)
402 return;
403
404 intel_connector = intel_connector_alloc();
405 if (!intel_connector) {
406 kfree(intel_dvo);
407 return;
408 }
409
410 intel_dvo->attached_connector = intel_connector;
411
412 intel_encoder = &intel_dvo->base;
413
414 intel_encoder->disable = intel_disable_dvo;
415 intel_encoder->enable = intel_enable_dvo;
416 intel_encoder->get_hw_state = intel_dvo_get_hw_state;
417 intel_encoder->get_config = intel_dvo_get_config;
418 intel_encoder->compute_config = intel_dvo_compute_config;
419 intel_encoder->pre_enable = intel_dvo_pre_enable;
420 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
421
422 /* Now, try to find a controller */
423 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
424 struct drm_connector *connector = &intel_connector->base;
425 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
426 struct i2c_adapter *i2c;
427 int gpio;
428 bool dvoinit;
429 enum pipe pipe;
430 u32 dpll[I915_MAX_PIPES];
431 enum port port;
432
433 /*
434 * Allow the I2C driver info to specify the GPIO to be used in
435 * special cases, but otherwise default to what's defined
436 * in the spec.
437 */
438 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
439 gpio = dvo->gpio;
440 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
441 gpio = GMBUS_PIN_SSC;
442 else
443 gpio = GMBUS_PIN_DPB;
444
445 /*
446 * Set up the I2C bus necessary for the chip we're probing.
447 * It appears that everything is on GPIOE except for panels
448 * on i830 laptops, which are on GPIOB (DVOA).
449 */
450 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
451
452 intel_dvo->dev = *dvo;
453
454 /*
455 * GMBUS NAK handling seems to be unstable, hence let the
456 * transmitter detection run in bit banging mode for now.
457 */
458 intel_gmbus_force_bit(i2c, true);
459
460 /*
461 * ns2501 requires the DVO 2x clock before it will
462 * respond to i2c accesses, so make sure we have
463 * have the clock enabled before we attempt to
464 * initialize the device.
465 */
466 for_each_pipe(dev_priv, pipe) {
467 dpll[pipe] = intel_de_read(dev_priv, DPLL(pipe));
468 intel_de_write(dev_priv, DPLL(pipe),
469 dpll[pipe] | DPLL_DVO_2X_MODE);
470 }
471
472 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
473
474 /* restore the DVO 2x clock state to original */
475 for_each_pipe(dev_priv, pipe) {
476 intel_de_write(dev_priv, DPLL(pipe), dpll[pipe]);
477 }
478
479 intel_gmbus_force_bit(i2c, false);
480
481 if (!dvoinit)
482 continue;
483
484 port = intel_dvo_port(dvo->dvo_reg);
485 drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
486 &intel_dvo_enc_funcs, encoder_type,
487 "DVO %c", port_name(port));
488
489 intel_encoder->type = INTEL_OUTPUT_DVO;
490 intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
491 intel_encoder->port = port;
492 intel_encoder->pipe_mask = ~0;
493
494 if (dvo->type != INTEL_DVO_CHIP_LVDS)
495 intel_encoder->cloneable = BIT(INTEL_OUTPUT_ANALOG) |
496 BIT(INTEL_OUTPUT_DVO);
497
498 switch (dvo->type) {
499 case INTEL_DVO_CHIP_TMDS:
500 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT |
501 DRM_CONNECTOR_POLL_DISCONNECT;
502 drm_connector_init(&dev_priv->drm, connector,
503 &intel_dvo_connector_funcs,
504 DRM_MODE_CONNECTOR_DVII);
505 encoder_type = DRM_MODE_ENCODER_TMDS;
506 break;
507 case INTEL_DVO_CHIP_LVDS_NO_FIXED:
508 case INTEL_DVO_CHIP_LVDS:
509 drm_connector_init(&dev_priv->drm, connector,
510 &intel_dvo_connector_funcs,
511 DRM_MODE_CONNECTOR_LVDS);
512 encoder_type = DRM_MODE_ENCODER_LVDS;
513 break;
514 }
515
516 drm_connector_helper_add(connector,
517 &intel_dvo_connector_helper_funcs);
518 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
519
520 intel_connector_attach_encoder(intel_connector, intel_encoder);
521 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
522 /*
523 * For our LVDS chipsets, we should hopefully be able
524 * to dig the fixed panel mode out of the BIOS data.
525 * However, it's in a different format from the BIOS
526 * data on chipsets with integrated LVDS (stored in AIM
527 * headers, likely), so for now, just get the current
528 * mode being output through DVO.
529 */
530 intel_panel_add_encoder_fixed_mode(intel_connector,
531 intel_encoder);
532
533 intel_panel_init(intel_connector);
534
535 intel_dvo->panel_wants_dither = true;
536 }
537
538 return;
539 }
540
541 kfree(intel_dvo);
542 kfree(intel_connector);
543}