1/* SPDX-License-Identifier: MIT */
 2/*
 3 * Copyright © 2019 Intel Corporation
 4 */
 5
 6#ifndef __INTEL_DMC_H__
 7#define __INTEL_DMC_H__
 8
 9#include "i915_reg_defs.h"
10#include "intel_wakeref.h"
11#include <linux/workqueue.h>
12
13struct drm_i915_error_state_buf;
14struct drm_i915_private;
15
16enum {
17	DMC_FW_MAIN = 0,
18	DMC_FW_PIPEA,
19	DMC_FW_PIPEB,
20	DMC_FW_PIPEC,
21	DMC_FW_PIPED,
22	DMC_FW_MAX
23};
24
25struct intel_dmc {
26	struct work_struct work;
27	const char *fw_path;
28	u32 required_version;
29	u32 max_fw_size; /* bytes */
30	u32 version;
31	struct dmc_fw_info {
32		u32 mmio_count;
33		i915_reg_t mmioaddr[20];
34		u32 mmiodata[20];
35		u32 dmc_offset;
36		u32 start_mmioaddr;
37		u32 dmc_fw_size; /*dwords */
38		u32 *payload;
39		bool present;
40	} dmc_info[DMC_FW_MAX];
41
42	u32 dc_state;
43	u32 target_dc_state;
44	u32 allowed_dc_mask;
45	intel_wakeref_t wakeref;
46};
47
48void intel_dmc_ucode_init(struct drm_i915_private *i915);
49void intel_dmc_load_program(struct drm_i915_private *i915);
50void intel_dmc_disable_program(struct drm_i915_private *i915);
51void intel_dmc_ucode_fini(struct drm_i915_private *i915);
52void intel_dmc_ucode_suspend(struct drm_i915_private *i915);
53void intel_dmc_ucode_resume(struct drm_i915_private *i915);
54bool intel_dmc_has_payload(struct drm_i915_private *i915);
55void intel_dmc_debugfs_register(struct drm_i915_private *i915);
56void intel_dmc_print_error_state(struct drm_i915_error_state_buf *m,
57				 struct drm_i915_private *i915);
58
59void assert_dmc_loaded(struct drm_i915_private *i915);
60
61#endif /* __INTEL_DMC_H__ */