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1/*
2 * Copyright © 2016-2019 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24/*
25 * Please use intel_vbt_defs.h for VBT private data, to hide and abstract away
26 * the VBT from the rest of the driver. Add the parsed, clean data to struct
27 * intel_vbt_data within struct drm_i915_private.
28 */
29
30#ifndef _INTEL_BIOS_H_
31#define _INTEL_BIOS_H_
32
33#include <linux/types.h>
34
35struct drm_i915_private;
36struct edid;
37struct intel_bios_encoder_data;
38struct intel_crtc_state;
39struct intel_encoder;
40struct intel_panel;
41enum port;
42
43enum intel_backlight_type {
44 INTEL_BACKLIGHT_PMIC,
45 INTEL_BACKLIGHT_LPSS,
46 INTEL_BACKLIGHT_DISPLAY_DDI,
47 INTEL_BACKLIGHT_DSI_DCS,
48 INTEL_BACKLIGHT_PANEL_DRIVER_INTERFACE,
49 INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE,
50};
51
52struct edp_power_seq {
53 u16 t1_t3;
54 u16 t8;
55 u16 t9;
56 u16 t10;
57 u16 t11_t12;
58} __packed;
59
60/*
61 * MIPI Sequence Block definitions
62 *
63 * Note the VBT spec has AssertReset / DeassertReset swapped from their
64 * usual naming, we use the proper names here to avoid confusion when
65 * reading the code.
66 */
67enum mipi_seq {
68 MIPI_SEQ_END = 0,
69 MIPI_SEQ_DEASSERT_RESET, /* Spec says MipiAssertResetPin */
70 MIPI_SEQ_INIT_OTP,
71 MIPI_SEQ_DISPLAY_ON,
72 MIPI_SEQ_DISPLAY_OFF,
73 MIPI_SEQ_ASSERT_RESET, /* Spec says MipiDeassertResetPin */
74 MIPI_SEQ_BACKLIGHT_ON, /* sequence block v2+ */
75 MIPI_SEQ_BACKLIGHT_OFF, /* sequence block v2+ */
76 MIPI_SEQ_TEAR_ON, /* sequence block v2+ */
77 MIPI_SEQ_TEAR_OFF, /* sequence block v3+ */
78 MIPI_SEQ_POWER_ON, /* sequence block v3+ */
79 MIPI_SEQ_POWER_OFF, /* sequence block v3+ */
80 MIPI_SEQ_MAX
81};
82
83enum mipi_seq_element {
84 MIPI_SEQ_ELEM_END = 0,
85 MIPI_SEQ_ELEM_SEND_PKT,
86 MIPI_SEQ_ELEM_DELAY,
87 MIPI_SEQ_ELEM_GPIO,
88 MIPI_SEQ_ELEM_I2C, /* sequence block v2+ */
89 MIPI_SEQ_ELEM_SPI, /* sequence block v3+ */
90 MIPI_SEQ_ELEM_PMIC, /* sequence block v3+ */
91 MIPI_SEQ_ELEM_MAX
92};
93
94#define MIPI_DSI_UNDEFINED_PANEL_ID 0
95#define MIPI_DSI_GENERIC_PANEL_ID 1
96
97struct mipi_config {
98 u16 panel_id;
99
100 /* General Params */
101 u32 enable_dithering:1;
102 u32 rsvd1:1;
103 u32 is_bridge:1;
104
105 u32 panel_arch_type:2;
106 u32 is_cmd_mode:1;
107
108#define NON_BURST_SYNC_PULSE 0x1
109#define NON_BURST_SYNC_EVENTS 0x2
110#define BURST_MODE 0x3
111 u32 video_transfer_mode:2;
112
113 u32 cabc_supported:1;
114#define PPS_BLC_PMIC 0
115#define PPS_BLC_SOC 1
116 u32 pwm_blc:1;
117
118 /* Bit 13:10 */
119#define PIXEL_FORMAT_RGB565 0x1
120#define PIXEL_FORMAT_RGB666 0x2
121#define PIXEL_FORMAT_RGB666_LOOSELY_PACKED 0x3
122#define PIXEL_FORMAT_RGB888 0x4
123 u32 videomode_color_format:4;
124
125 /* Bit 15:14 */
126#define ENABLE_ROTATION_0 0x0
127#define ENABLE_ROTATION_90 0x1
128#define ENABLE_ROTATION_180 0x2
129#define ENABLE_ROTATION_270 0x3
130 u32 rotation:2;
131 u32 bta_enabled:1;
132 u32 rsvd2:15;
133
134 /* 2 byte Port Description */
135#define DUAL_LINK_NOT_SUPPORTED 0
136#define DUAL_LINK_FRONT_BACK 1
137#define DUAL_LINK_PIXEL_ALT 2
138 u16 dual_link:2;
139 u16 lane_cnt:2;
140 u16 pixel_overlap:3;
141 u16 rgb_flip:1;
142#define DL_DCS_PORT_A 0x00
143#define DL_DCS_PORT_C 0x01
144#define DL_DCS_PORT_A_AND_C 0x02
145 u16 dl_dcs_cabc_ports:2;
146 u16 dl_dcs_backlight_ports:2;
147 u16 rsvd3:4;
148
149 u16 rsvd4;
150
151 u8 rsvd5;
152 u32 target_burst_mode_freq;
153 u32 dsi_ddr_clk;
154 u32 bridge_ref_clk;
155
156#define BYTE_CLK_SEL_20MHZ 0
157#define BYTE_CLK_SEL_10MHZ 1
158#define BYTE_CLK_SEL_5MHZ 2
159 u8 byte_clk_sel:2;
160
161 u8 rsvd6:6;
162
163 /* DPHY Flags */
164 u16 dphy_param_valid:1;
165 u16 eot_pkt_disabled:1;
166 u16 enable_clk_stop:1;
167 u16 rsvd7:13;
168
169 u32 hs_tx_timeout;
170 u32 lp_rx_timeout;
171 u32 turn_around_timeout;
172 u32 device_reset_timer;
173 u32 master_init_timer;
174 u32 dbi_bw_timer;
175 u32 lp_byte_clk_val;
176
177 /* 4 byte Dphy Params */
178 u32 prepare_cnt:6;
179 u32 rsvd8:2;
180 u32 clk_zero_cnt:8;
181 u32 trail_cnt:5;
182 u32 rsvd9:3;
183 u32 exit_zero_cnt:6;
184 u32 rsvd10:2;
185
186 u32 clk_lane_switch_cnt;
187 u32 hl_switch_cnt;
188
189 u32 rsvd11[6];
190
191 /* timings based on dphy spec */
192 u8 tclk_miss;
193 u8 tclk_post;
194 u8 rsvd12;
195 u8 tclk_pre;
196 u8 tclk_prepare;
197 u8 tclk_settle;
198 u8 tclk_term_enable;
199 u8 tclk_trail;
200 u16 tclk_prepare_clkzero;
201 u8 rsvd13;
202 u8 td_term_enable;
203 u8 teot;
204 u8 ths_exit;
205 u8 ths_prepare;
206 u16 ths_prepare_hszero;
207 u8 rsvd14;
208 u8 ths_settle;
209 u8 ths_skip;
210 u8 ths_trail;
211 u8 tinit;
212 u8 tlpx;
213 u8 rsvd15[3];
214
215 /* GPIOs */
216 u8 panel_enable;
217 u8 bl_enable;
218 u8 pwm_enable;
219 u8 reset_r_n;
220 u8 pwr_down_r;
221 u8 stdby_r_n;
222
223} __packed;
224
225/* all delays have a unit of 100us */
226struct mipi_pps_data {
227 u16 panel_on_delay;
228 u16 bl_enable_delay;
229 u16 bl_disable_delay;
230 u16 panel_off_delay;
231 u16 panel_power_cycle_delay;
232} __packed;
233
234void intel_bios_init(struct drm_i915_private *dev_priv);
235void intel_bios_init_panel(struct drm_i915_private *dev_priv,
236 struct intel_panel *panel,
237 const struct intel_bios_encoder_data *devdata,
238 const struct edid *edid);
239void intel_bios_fini_panel(struct intel_panel *panel);
240void intel_bios_driver_remove(struct drm_i915_private *dev_priv);
241bool intel_bios_is_valid_vbt(const void *buf, size_t size);
242bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv);
243bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin);
244bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port);
245bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
246bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, enum port port);
247bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv, enum port *port);
248bool intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
249 enum port port);
250bool intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
251 enum port port);
252bool intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915,
253 enum port port);
254enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv, enum port port);
255bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
256 struct intel_crtc_state *crtc_state,
257 int dsc_max_bpc);
258int intel_bios_max_tmds_clock(struct intel_encoder *encoder);
259int intel_bios_hdmi_level_shift(struct intel_encoder *encoder);
260int intel_bios_dp_max_link_rate(struct intel_encoder *encoder);
261int intel_bios_dp_max_lane_count(struct intel_encoder *encoder);
262int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder);
263bool intel_bios_port_supports_typec_usb(struct drm_i915_private *i915, enum port port);
264bool intel_bios_port_supports_tbt(struct drm_i915_private *i915, enum port port);
265
266const struct intel_bios_encoder_data *
267intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port);
268
269bool intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata);
270bool intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata);
271bool intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata);
272bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata);
273bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata);
274int intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data *devdata);
275int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *devdata);
276
277#endif /* _INTEL_BIOS_H_ */