1/*
 2 *
 3 */
 4
 
 
 
 5#ifndef _ASSEMBLER_
 6
 7struct cpulaunch {
 8    unsigned long	pc;
 9    unsigned long	gp;
10    unsigned long	sp;
11    unsigned long	a0;
12    unsigned long	_pad[3]; /* pad to cache line size to avoid thrashing */
13    unsigned long	flags;
14};
15
16#else
17
18#define LOG2CPULAUNCH	5
19#define	LAUNCH_PC	0
20#define	LAUNCH_GP	4
21#define	LAUNCH_SP	8
22#define	LAUNCH_A0	12
23#define	LAUNCH_FLAGS	28
24
25#endif
26
27#define LAUNCH_FREADY	1
28#define LAUNCH_FGO	2
29#define LAUNCH_FGONE	4
30
31#define CPULAUNCH	0x00000f00
32#define NCPULAUNCH	8
33
34/* Polling period in count cycles for secondary CPU's */
35#define LAUNCHPERIOD	10000

 1/* SPDX-License-Identifier: GPL-2.0 */
 2/*
 3 *
 4 */
 5
 6#ifndef _ASM_MIPS_BOARDS_LAUNCH_H
 7#define _ASM_MIPS_BOARDS_LAUNCH_H
 8
 9#ifndef _ASSEMBLER_
10
11struct cpulaunch {
12    unsigned long	pc;
13    unsigned long	gp;
14    unsigned long	sp;
15    unsigned long	a0;
16    unsigned long	_pad[3]; /* pad to cache line size to avoid thrashing */
17    unsigned long	flags;
18};
19
20#else
21
22#define LOG2CPULAUNCH	5
23#define LAUNCH_PC	0
24#define LAUNCH_GP	4
25#define LAUNCH_SP	8
26#define LAUNCH_A0	12
27#define LAUNCH_FLAGS	28
28
29#endif
30
31#define LAUNCH_FREADY	1
32#define LAUNCH_FGO	2
33#define LAUNCH_FGONE	4
34
35#define CPULAUNCH	0x00000f00
36#define NCPULAUNCH	8
37
38/* Polling period in count cycles for secondary CPU's */
39#define LAUNCHPERIOD	10000
40
41#endif /* _ASM_MIPS_BOARDS_LAUNCH_H */