1/*
 2 *  linux/arch/arm/mm/tlb-fa.S
 3 *
 4 *  Copyright (C) 2005 Faraday Corp.
 5 *  Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
 6 *
 7 * Based on tlb-v4wbi.S:
 8 *  Copyright (C) 1997-2002 Russell King
 9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 *  ARM architecture version 4, Faraday variation.
15 *  This assume an unified TLBs, with a write buffer, and branch target buffer (BTB)
16 *
17 *  Processors: FA520 FA526 FA626
18 */
19#include <linux/linkage.h>
20#include <linux/init.h>
 
21#include <asm/asm-offsets.h>
22#include <asm/tlbflush.h>
23#include "proc-macros.S"
24
25
26/*
27 *	flush_user_tlb_range(start, end, mm)
28 *
29 *	Invalidate a range of TLB entries in the specified address space.
30 *
31 *	- start - range start address
32 *	- end   - range end address
33 *	- mm    - mm_struct describing address space
34 */
35	.align	4
36ENTRY(fa_flush_user_tlb_range)
37	vma_vm_mm ip, r2
38	act_mm	r3				@ get current->active_mm
39	eors	r3, ip, r3			@ == mm ?
40	movne	pc, lr				@ no, we dont do anything
41	mov	r3, #0
42	mcr	p15, 0, r3, c7, c10, 4		@ drain WB
43	bic	r0, r0, #0x0ff
44	bic	r0, r0, #0xf00
451:	mcr	p15, 0, r0, c8, c7, 1		@ invalidate UTLB entry
46	add	r0, r0, #PAGE_SZ
47	cmp	r0, r1
48	blo	1b
49	mcr	p15, 0, r3, c7, c10, 4		@ data write barrier
50	mov	pc, lr
51
52
53ENTRY(fa_flush_kern_tlb_range)
54	mov	r3, #0
55	mcr	p15, 0, r3, c7, c10, 4		@ drain WB
56	bic	r0, r0, #0x0ff
57	bic	r0, r0, #0xf00
581:	mcr	p15, 0, r0, c8, c7, 1		@ invalidate UTLB entry
59	add	r0, r0, #PAGE_SZ
60	cmp	r0, r1
61	blo	1b
62	mcr	p15, 0, r3, c7, c10, 4		@ data write barrier
63	mcr	p15, 0, r3, c7, c5, 4		@ prefetch flush (isb)
64	mov	pc, lr
65
66	__INITDATA
67
68	/* define struct cpu_tlb_fns (see <asm/tlbflush.h> and proc-macros.S) */
69	define_tlb_functions fa, fa_tlb_flags

 1/* SPDX-License-Identifier: GPL-2.0-only */
 2/*
 3 *  linux/arch/arm/mm/tlb-fa.S
 4 *
 5 *  Copyright (C) 2005 Faraday Corp.
 6 *  Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
 7 *
 8 * Based on tlb-v4wbi.S:
 9 *  Copyright (C) 1997-2002 Russell King
10 *
 
 
 
 
11 *  ARM architecture version 4, Faraday variation.
12 *  This assume an unified TLBs, with a write buffer, and branch target buffer (BTB)
13 *
14 *  Processors: FA520 FA526 FA626
15 */
16#include <linux/linkage.h>
17#include <linux/init.h>
18#include <asm/assembler.h>
19#include <asm/asm-offsets.h>
20#include <asm/tlbflush.h>
21#include "proc-macros.S"
22
23
24/*
25 *	flush_user_tlb_range(start, end, mm)
26 *
27 *	Invalidate a range of TLB entries in the specified address space.
28 *
29 *	- start - range start address
30 *	- end   - range end address
31 *	- mm    - mm_struct describing address space
32 */
33	.align	4
34ENTRY(fa_flush_user_tlb_range)
35	vma_vm_mm ip, r2
36	act_mm	r3				@ get current->active_mm
37	eors	r3, ip, r3			@ == mm ?
38	retne	lr				@ no, we dont do anything
39	mov	r3, #0
40	mcr	p15, 0, r3, c7, c10, 4		@ drain WB
41	bic	r0, r0, #0x0ff
42	bic	r0, r0, #0xf00
431:	mcr	p15, 0, r0, c8, c7, 1		@ invalidate UTLB entry
44	add	r0, r0, #PAGE_SZ
45	cmp	r0, r1
46	blo	1b
47	mcr	p15, 0, r3, c7, c10, 4		@ data write barrier
48	ret	lr
49
50
51ENTRY(fa_flush_kern_tlb_range)
52	mov	r3, #0
53	mcr	p15, 0, r3, c7, c10, 4		@ drain WB
54	bic	r0, r0, #0x0ff
55	bic	r0, r0, #0xf00
561:	mcr	p15, 0, r0, c8, c7, 1		@ invalidate UTLB entry
57	add	r0, r0, #PAGE_SZ
58	cmp	r0, r1
59	blo	1b
60	mcr	p15, 0, r3, c7, c10, 4		@ data write barrier
61	mcr	p15, 0, r3, c7, c5, 4		@ prefetch flush (isb)
62	ret	lr
63
64	__INITDATA
65
66	/* define struct cpu_tlb_fns (see <asm/tlbflush.h> and proc-macros.S) */
67	define_tlb_functions fa, fa_tlb_flags