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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Texas Instruments DSPS platforms "glue layer"
4 *
5 * Copyright (C) 2012, by Texas Instruments
6 *
7 * Based on the am35x "glue layer" code.
8 *
9 * This file is part of the Inventra Controller Driver for Linux.
10 *
11 * musb_dsps.c will be a common file for all the TI DSPS platforms
12 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
13 * For now only ti81x is using this and in future davinci.c, am35x.c
14 * da8xx.c would be merged to this file after testing.
15 */
16
17#include <linux/io.h>
18#include <linux/irq.h>
19#include <linux/err.h>
20#include <linux/platform_device.h>
21#include <linux/dma-mapping.h>
22#include <linux/pm_runtime.h>
23#include <linux/module.h>
24#include <linux/usb/usb_phy_generic.h>
25#include <linux/platform_data/usb-omap.h>
26#include <linux/sizes.h>
27
28#include <linux/of.h>
29#include <linux/of_device.h>
30#include <linux/of_address.h>
31#include <linux/of_irq.h>
32#include <linux/usb/of.h>
33
34#include <linux/debugfs.h>
35
36#include "musb_core.h"
37
38static const struct of_device_id musb_dsps_of_match[];
39
40/*
41 * DSPS musb wrapper register offset.
42 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
43 * musb ips.
44 */
45struct dsps_musb_wrapper {
46 u16 revision;
47 u16 control;
48 u16 status;
49 u16 epintr_set;
50 u16 epintr_clear;
51 u16 epintr_status;
52 u16 coreintr_set;
53 u16 coreintr_clear;
54 u16 coreintr_status;
55 u16 phy_utmi;
56 u16 mode;
57 u16 tx_mode;
58 u16 rx_mode;
59
60 /* bit positions for control */
61 unsigned reset:5;
62
63 /* bit positions for interrupt */
64 unsigned usb_shift:5;
65 u32 usb_mask;
66 u32 usb_bitmap;
67 unsigned drvvbus:5;
68
69 unsigned txep_shift:5;
70 u32 txep_mask;
71 u32 txep_bitmap;
72
73 unsigned rxep_shift:5;
74 u32 rxep_mask;
75 u32 rxep_bitmap;
76
77 /* bit positions for phy_utmi */
78 unsigned otg_disable:5;
79
80 /* bit positions for mode */
81 unsigned iddig:5;
82 unsigned iddig_mux:5;
83 /* miscellaneous stuff */
84 unsigned poll_timeout;
85};
86
87/*
88 * register shadow for suspend
89 */
90struct dsps_context {
91 u32 control;
92 u32 epintr;
93 u32 coreintr;
94 u32 phy_utmi;
95 u32 mode;
96 u32 tx_mode;
97 u32 rx_mode;
98};
99
100/*
101 * DSPS glue structure.
102 */
103struct dsps_glue {
104 struct device *dev;
105 struct platform_device *musb; /* child musb pdev */
106 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
107 int vbus_irq; /* optional vbus irq */
108 unsigned long last_timer; /* last timer data for each instance */
109 bool sw_babble_enabled;
110 void __iomem *usbss_base;
111
112 struct dsps_context context;
113 struct debugfs_regset32 regset;
114 struct dentry *dbgfs_root;
115};
116
117static const struct debugfs_reg32 dsps_musb_regs[] = {
118 { "revision", 0x00 },
119 { "control", 0x14 },
120 { "status", 0x18 },
121 { "eoi", 0x24 },
122 { "intr0_stat", 0x30 },
123 { "intr1_stat", 0x34 },
124 { "intr0_set", 0x38 },
125 { "intr1_set", 0x3c },
126 { "txmode", 0x70 },
127 { "rxmode", 0x74 },
128 { "autoreq", 0xd0 },
129 { "srpfixtime", 0xd4 },
130 { "tdown", 0xd8 },
131 { "phy_utmi", 0xe0 },
132 { "mode", 0xe8 },
133};
134
135static void dsps_mod_timer(struct dsps_glue *glue, int wait_ms)
136{
137 struct musb *musb = platform_get_drvdata(glue->musb);
138 int wait;
139
140 if (wait_ms < 0)
141 wait = msecs_to_jiffies(glue->wrp->poll_timeout);
142 else
143 wait = msecs_to_jiffies(wait_ms);
144
145 mod_timer(&musb->dev_timer, jiffies + wait);
146}
147
148/*
149 * If no vbus irq from the PMIC is configured, we need to poll VBUS status.
150 */
151static void dsps_mod_timer_optional(struct dsps_glue *glue)
152{
153 if (glue->vbus_irq)
154 return;
155
156 dsps_mod_timer(glue, -1);
157}
158
159/* USBSS / USB AM335x */
160#define USBSS_IRQ_STATUS 0x28
161#define USBSS_IRQ_ENABLER 0x2c
162#define USBSS_IRQ_CLEARR 0x30
163
164#define USBSS_IRQ_PD_COMP (1 << 2)
165
166/*
167 * dsps_musb_enable - enable interrupts
168 */
169static void dsps_musb_enable(struct musb *musb)
170{
171 struct device *dev = musb->controller;
172 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
173 const struct dsps_musb_wrapper *wrp = glue->wrp;
174 void __iomem *reg_base = musb->ctrl_base;
175 u32 epmask, coremask;
176
177 /* Workaround: setup IRQs through both register sets. */
178 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
179 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
180 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
181
182 musb_writel(reg_base, wrp->epintr_set, epmask);
183 musb_writel(reg_base, wrp->coreintr_set, coremask);
184 /*
185 * start polling for runtime PM active and idle,
186 * and for ID change in dual-role idle mode.
187 */
188 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE)
189 dsps_mod_timer(glue, -1);
190}
191
192/*
193 * dsps_musb_disable - disable HDRC and flush interrupts
194 */
195static void dsps_musb_disable(struct musb *musb)
196{
197 struct device *dev = musb->controller;
198 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
199 const struct dsps_musb_wrapper *wrp = glue->wrp;
200 void __iomem *reg_base = musb->ctrl_base;
201
202 musb_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
203 musb_writel(reg_base, wrp->epintr_clear,
204 wrp->txep_bitmap | wrp->rxep_bitmap);
205 del_timer_sync(&musb->dev_timer);
206}
207
208/* Caller must take musb->lock */
209static int dsps_check_status(struct musb *musb, void *unused)
210{
211 void __iomem *mregs = musb->mregs;
212 struct device *dev = musb->controller;
213 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
214 const struct dsps_musb_wrapper *wrp = glue->wrp;
215 u8 devctl;
216 int skip_session = 0;
217
218 if (glue->vbus_irq)
219 del_timer(&musb->dev_timer);
220
221 /*
222 * We poll because DSPS IP's won't expose several OTG-critical
223 * status change events (from the transceiver) otherwise.
224 */
225 devctl = musb_readb(mregs, MUSB_DEVCTL);
226 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
227 usb_otg_state_string(musb->xceiv->otg->state));
228
229 switch (musb->xceiv->otg->state) {
230 case OTG_STATE_A_WAIT_VRISE:
231 if (musb->port_mode == MUSB_HOST) {
232 musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON;
233 dsps_mod_timer_optional(glue);
234 break;
235 }
236 fallthrough;
237
238 case OTG_STATE_A_WAIT_BCON:
239 /* keep VBUS on for host-only mode */
240 if (musb->port_mode == MUSB_HOST) {
241 dsps_mod_timer_optional(glue);
242 break;
243 }
244 musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
245 skip_session = 1;
246 fallthrough;
247
248 case OTG_STATE_A_IDLE:
249 case OTG_STATE_B_IDLE:
250 if (!glue->vbus_irq) {
251 if (devctl & MUSB_DEVCTL_BDEVICE) {
252 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
253 MUSB_DEV_MODE(musb);
254 } else {
255 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
256 MUSB_HST_MODE(musb);
257 }
258
259 if (musb->port_mode == MUSB_PERIPHERAL)
260 skip_session = 1;
261
262 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
263 musb_writeb(mregs, MUSB_DEVCTL,
264 MUSB_DEVCTL_SESSION);
265 }
266 dsps_mod_timer_optional(glue);
267 break;
268 case OTG_STATE_A_WAIT_VFALL:
269 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
270 musb_writel(musb->ctrl_base, wrp->coreintr_set,
271 MUSB_INTR_VBUSERROR << wrp->usb_shift);
272 break;
273 default:
274 break;
275 }
276
277 return 0;
278}
279
280static void otg_timer(struct timer_list *t)
281{
282 struct musb *musb = from_timer(musb, t, dev_timer);
283 struct device *dev = musb->controller;
284 unsigned long flags;
285 int err;
286
287 err = pm_runtime_get(dev);
288 if ((err != -EINPROGRESS) && err < 0) {
289 dev_err(dev, "Poll could not pm_runtime_get: %i\n", err);
290 pm_runtime_put_noidle(dev);
291
292 return;
293 }
294
295 spin_lock_irqsave(&musb->lock, flags);
296 err = musb_queue_resume_work(musb, dsps_check_status, NULL);
297 if (err < 0)
298 dev_err(dev, "%s resume work: %i\n", __func__, err);
299 spin_unlock_irqrestore(&musb->lock, flags);
300 pm_runtime_mark_last_busy(dev);
301 pm_runtime_put_autosuspend(dev);
302}
303
304static void dsps_musb_clear_ep_rxintr(struct musb *musb, int epnum)
305{
306 u32 epintr;
307 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
308 const struct dsps_musb_wrapper *wrp = glue->wrp;
309
310 /* musb->lock might already been held */
311 epintr = (1 << epnum) << wrp->rxep_shift;
312 musb_writel(musb->ctrl_base, wrp->epintr_status, epintr);
313}
314
315static irqreturn_t dsps_interrupt(int irq, void *hci)
316{
317 struct musb *musb = hci;
318 void __iomem *reg_base = musb->ctrl_base;
319 struct device *dev = musb->controller;
320 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
321 const struct dsps_musb_wrapper *wrp = glue->wrp;
322 unsigned long flags;
323 irqreturn_t ret = IRQ_NONE;
324 u32 epintr, usbintr;
325
326 spin_lock_irqsave(&musb->lock, flags);
327
328 /* Get endpoint interrupts */
329 epintr = musb_readl(reg_base, wrp->epintr_status);
330 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
331 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
332
333 if (epintr)
334 musb_writel(reg_base, wrp->epintr_status, epintr);
335
336 /* Get usb core interrupts */
337 usbintr = musb_readl(reg_base, wrp->coreintr_status);
338 if (!usbintr && !epintr)
339 goto out;
340
341 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
342 if (usbintr)
343 musb_writel(reg_base, wrp->coreintr_status, usbintr);
344
345 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
346 usbintr, epintr);
347
348 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
349 int drvvbus = musb_readl(reg_base, wrp->status);
350 void __iomem *mregs = musb->mregs;
351 u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
352 int err;
353
354 err = musb->int_usb & MUSB_INTR_VBUSERROR;
355 if (err) {
356 /*
357 * The Mentor core doesn't debounce VBUS as needed
358 * to cope with device connect current spikes. This
359 * means it's not uncommon for bus-powered devices
360 * to get VBUS errors during enumeration.
361 *
362 * This is a workaround, but newer RTL from Mentor
363 * seems to allow a better one: "re"-starting sessions
364 * without waiting for VBUS to stop registering in
365 * devctl.
366 */
367 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
368 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
369 dsps_mod_timer_optional(glue);
370 WARNING("VBUS error workaround (delay coming)\n");
371 } else if (drvvbus) {
372 MUSB_HST_MODE(musb);
373 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
374 dsps_mod_timer_optional(glue);
375 } else {
376 musb->is_active = 0;
377 MUSB_DEV_MODE(musb);
378 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
379 }
380
381 /* NOTE: this must complete power-on within 100 ms. */
382 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
383 drvvbus ? "on" : "off",
384 usb_otg_state_string(musb->xceiv->otg->state),
385 err ? " ERROR" : "",
386 devctl);
387 ret = IRQ_HANDLED;
388 }
389
390 if (musb->int_tx || musb->int_rx || musb->int_usb)
391 ret |= musb_interrupt(musb);
392
393 /* Poll for ID change and connect */
394 switch (musb->xceiv->otg->state) {
395 case OTG_STATE_B_IDLE:
396 case OTG_STATE_A_WAIT_BCON:
397 dsps_mod_timer_optional(glue);
398 break;
399 default:
400 break;
401 }
402
403out:
404 spin_unlock_irqrestore(&musb->lock, flags);
405
406 return ret;
407}
408
409static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue)
410{
411 struct dentry *root;
412 char buf[128];
413
414 sprintf(buf, "%s.dsps", dev_name(musb->controller));
415 root = debugfs_create_dir(buf, usb_debug_root);
416 glue->dbgfs_root = root;
417
418 glue->regset.regs = dsps_musb_regs;
419 glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs);
420 glue->regset.base = musb->ctrl_base;
421
422 debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset);
423 return 0;
424}
425
426static int dsps_musb_init(struct musb *musb)
427{
428 struct device *dev = musb->controller;
429 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
430 struct platform_device *parent = to_platform_device(dev->parent);
431 const struct dsps_musb_wrapper *wrp = glue->wrp;
432 void __iomem *reg_base;
433 struct resource *r;
434 u32 rev, val;
435 int ret;
436
437 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
438 reg_base = devm_ioremap_resource(dev, r);
439 if (IS_ERR(reg_base))
440 return PTR_ERR(reg_base);
441 musb->ctrl_base = reg_base;
442
443 /* NOP driver needs change if supporting dual instance */
444 musb->xceiv = devm_usb_get_phy_by_phandle(dev->parent, "phys", 0);
445 if (IS_ERR(musb->xceiv))
446 return PTR_ERR(musb->xceiv);
447
448 musb->phy = devm_phy_get(dev->parent, "usb2-phy");
449
450 /* Returns zero if e.g. not clocked */
451 rev = musb_readl(reg_base, wrp->revision);
452 if (!rev)
453 return -ENODEV;
454
455 if (IS_ERR(musb->phy)) {
456 musb->phy = NULL;
457 } else {
458 ret = phy_init(musb->phy);
459 if (ret < 0)
460 return ret;
461 ret = phy_power_on(musb->phy);
462 if (ret) {
463 phy_exit(musb->phy);
464 return ret;
465 }
466 }
467
468 timer_setup(&musb->dev_timer, otg_timer, 0);
469
470 /* Reset the musb */
471 musb_writel(reg_base, wrp->control, (1 << wrp->reset));
472
473 musb->isr = dsps_interrupt;
474
475 /* reset the otgdisable bit, needed for host mode to work */
476 val = musb_readl(reg_base, wrp->phy_utmi);
477 val &= ~(1 << wrp->otg_disable);
478 musb_writel(musb->ctrl_base, wrp->phy_utmi, val);
479
480 /*
481 * Check whether the dsps version has babble control enabled.
482 * In latest silicon revision the babble control logic is enabled.
483 * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control
484 * logic enabled.
485 */
486 val = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
487 if (val & MUSB_BABBLE_RCV_DISABLE) {
488 glue->sw_babble_enabled = true;
489 val |= MUSB_BABBLE_SW_SESSION_CTRL;
490 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, val);
491 }
492
493 dsps_mod_timer(glue, -1);
494
495 return dsps_musb_dbg_init(musb, glue);
496}
497
498static int dsps_musb_exit(struct musb *musb)
499{
500 struct device *dev = musb->controller;
501 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
502
503 del_timer_sync(&musb->dev_timer);
504 phy_power_off(musb->phy);
505 phy_exit(musb->phy);
506 debugfs_remove_recursive(glue->dbgfs_root);
507
508 return 0;
509}
510
511static int dsps_musb_set_mode(struct musb *musb, u8 mode)
512{
513 struct device *dev = musb->controller;
514 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
515 const struct dsps_musb_wrapper *wrp = glue->wrp;
516 void __iomem *ctrl_base = musb->ctrl_base;
517 u32 reg;
518
519 reg = musb_readl(ctrl_base, wrp->mode);
520
521 switch (mode) {
522 case MUSB_HOST:
523 reg &= ~(1 << wrp->iddig);
524
525 /*
526 * if we're setting mode to host-only or device-only, we're
527 * going to ignore whatever the PHY sends us and just force
528 * ID pin status by SW
529 */
530 reg |= (1 << wrp->iddig_mux);
531
532 musb_writel(ctrl_base, wrp->mode, reg);
533 musb_writel(ctrl_base, wrp->phy_utmi, 0x02);
534 break;
535 case MUSB_PERIPHERAL:
536 reg |= (1 << wrp->iddig);
537
538 /*
539 * if we're setting mode to host-only or device-only, we're
540 * going to ignore whatever the PHY sends us and just force
541 * ID pin status by SW
542 */
543 reg |= (1 << wrp->iddig_mux);
544
545 musb_writel(ctrl_base, wrp->mode, reg);
546 break;
547 case MUSB_OTG:
548 musb_writel(ctrl_base, wrp->phy_utmi, 0x02);
549 break;
550 default:
551 dev_err(glue->dev, "unsupported mode %d\n", mode);
552 return -EINVAL;
553 }
554
555 return 0;
556}
557
558static bool dsps_sw_babble_control(struct musb *musb)
559{
560 u8 babble_ctl;
561 bool session_restart = false;
562
563 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
564 dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n",
565 babble_ctl);
566 /*
567 * check line monitor flag to check whether babble is
568 * due to noise
569 */
570 dev_dbg(musb->controller, "STUCK_J is %s\n",
571 babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset");
572
573 if (babble_ctl & MUSB_BABBLE_STUCK_J) {
574 int timeout = 10;
575
576 /*
577 * babble is due to noise, then set transmit idle (d7 bit)
578 * to resume normal operation
579 */
580 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
581 babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE;
582 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl);
583
584 /* wait till line monitor flag cleared */
585 dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n");
586 do {
587 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
588 udelay(1);
589 } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--);
590
591 /* check whether stuck_at_j bit cleared */
592 if (babble_ctl & MUSB_BABBLE_STUCK_J) {
593 /*
594 * real babble condition has occurred
595 * restart the controller to start the
596 * session again
597 */
598 dev_dbg(musb->controller, "J not cleared, misc (%x)\n",
599 babble_ctl);
600 session_restart = true;
601 }
602 } else {
603 session_restart = true;
604 }
605
606 return session_restart;
607}
608
609static int dsps_musb_recover(struct musb *musb)
610{
611 struct device *dev = musb->controller;
612 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
613 int session_restart = 0;
614
615 if (glue->sw_babble_enabled)
616 session_restart = dsps_sw_babble_control(musb);
617 else
618 session_restart = 1;
619
620 return session_restart ? 0 : -EPIPE;
621}
622
623/* Similar to am35x, dm81xx support only 32-bit read operation */
624static void dsps_read_fifo32(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
625{
626 void __iomem *fifo = hw_ep->fifo;
627
628 if (len >= 4) {
629 ioread32_rep(fifo, dst, len >> 2);
630 dst += len & ~0x03;
631 len &= 0x03;
632 }
633
634 /* Read any remaining 1 to 3 bytes */
635 if (len > 0) {
636 u32 val = musb_readl(fifo, 0);
637 memcpy(dst, &val, len);
638 }
639}
640
641#ifdef CONFIG_USB_TI_CPPI41_DMA
642static void dsps_dma_controller_callback(struct dma_controller *c)
643{
644 struct musb *musb = c->musb;
645 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
646 void __iomem *usbss_base = glue->usbss_base;
647 u32 status;
648
649 status = musb_readl(usbss_base, USBSS_IRQ_STATUS);
650 if (status & USBSS_IRQ_PD_COMP)
651 musb_writel(usbss_base, USBSS_IRQ_STATUS, USBSS_IRQ_PD_COMP);
652}
653
654static struct dma_controller *
655dsps_dma_controller_create(struct musb *musb, void __iomem *base)
656{
657 struct dma_controller *controller;
658 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
659 void __iomem *usbss_base = glue->usbss_base;
660
661 controller = cppi41_dma_controller_create(musb, base);
662 if (IS_ERR_OR_NULL(controller))
663 return controller;
664
665 musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP);
666 controller->dma_callback = dsps_dma_controller_callback;
667
668 return controller;
669}
670
671#ifdef CONFIG_PM_SLEEP
672static void dsps_dma_controller_suspend(struct dsps_glue *glue)
673{
674 void __iomem *usbss_base = glue->usbss_base;
675
676 musb_writel(usbss_base, USBSS_IRQ_CLEARR, USBSS_IRQ_PD_COMP);
677}
678
679static void dsps_dma_controller_resume(struct dsps_glue *glue)
680{
681 void __iomem *usbss_base = glue->usbss_base;
682
683 musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP);
684}
685#endif
686#else /* CONFIG_USB_TI_CPPI41_DMA */
687#ifdef CONFIG_PM_SLEEP
688static void dsps_dma_controller_suspend(struct dsps_glue *glue) {}
689static void dsps_dma_controller_resume(struct dsps_glue *glue) {}
690#endif
691#endif /* CONFIG_USB_TI_CPPI41_DMA */
692
693static struct musb_platform_ops dsps_ops = {
694 .quirks = MUSB_DMA_CPPI41 | MUSB_INDEXED_EP,
695 .init = dsps_musb_init,
696 .exit = dsps_musb_exit,
697
698#ifdef CONFIG_USB_TI_CPPI41_DMA
699 .dma_init = dsps_dma_controller_create,
700 .dma_exit = cppi41_dma_controller_destroy,
701#endif
702 .enable = dsps_musb_enable,
703 .disable = dsps_musb_disable,
704
705 .set_mode = dsps_musb_set_mode,
706 .recover = dsps_musb_recover,
707 .clear_ep_rxintr = dsps_musb_clear_ep_rxintr,
708};
709
710static u64 musb_dmamask = DMA_BIT_MASK(32);
711
712static int get_int_prop(struct device_node *dn, const char *s)
713{
714 int ret;
715 u32 val;
716
717 ret = of_property_read_u32(dn, s, &val);
718 if (ret)
719 return 0;
720 return val;
721}
722
723static int dsps_create_musb_pdev(struct dsps_glue *glue,
724 struct platform_device *parent)
725{
726 struct musb_hdrc_platform_data pdata;
727 struct resource resources[2];
728 struct resource *res;
729 struct device *dev = &parent->dev;
730 struct musb_hdrc_config *config;
731 struct platform_device *musb;
732 struct device_node *dn = parent->dev.of_node;
733 int ret, val;
734
735 memset(resources, 0, sizeof(resources));
736 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
737 if (!res) {
738 dev_err(dev, "failed to get memory.\n");
739 return -EINVAL;
740 }
741 resources[0] = *res;
742
743 ret = platform_get_irq_byname(parent, "mc");
744 if (ret < 0)
745 return ret;
746
747 resources[1].start = ret;
748 resources[1].end = ret;
749 resources[1].flags = IORESOURCE_IRQ | irq_get_trigger_type(ret);
750 resources[1].name = "mc";
751
752 /* allocate the child platform device */
753 musb = platform_device_alloc("musb-hdrc",
754 (resources[0].start & 0xFFF) == 0x400 ? 0 : 1);
755 if (!musb) {
756 dev_err(dev, "failed to allocate musb device\n");
757 return -ENOMEM;
758 }
759
760 musb->dev.parent = dev;
761 musb->dev.dma_mask = &musb_dmamask;
762 musb->dev.coherent_dma_mask = musb_dmamask;
763 device_set_of_node_from_dev(&musb->dev, &parent->dev);
764
765 glue->musb = musb;
766
767 ret = platform_device_add_resources(musb, resources,
768 ARRAY_SIZE(resources));
769 if (ret) {
770 dev_err(dev, "failed to add resources\n");
771 goto err;
772 }
773
774 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
775 if (!config) {
776 ret = -ENOMEM;
777 goto err;
778 }
779 pdata.config = config;
780 pdata.platform_ops = &dsps_ops;
781
782 config->num_eps = get_int_prop(dn, "mentor,num-eps");
783 config->ram_bits = get_int_prop(dn, "mentor,ram-bits");
784 config->host_port_deassert_reset_at_resume = 1;
785 pdata.mode = musb_get_mode(dev);
786 /* DT keeps this entry in mA, musb expects it as per USB spec */
787 pdata.power = get_int_prop(dn, "mentor,power") / 2;
788
789 ret = of_property_read_u32(dn, "mentor,multipoint", &val);
790 if (!ret && val)
791 config->multipoint = true;
792
793 config->maximum_speed = usb_get_maximum_speed(&parent->dev);
794 switch (config->maximum_speed) {
795 case USB_SPEED_LOW:
796 case USB_SPEED_FULL:
797 break;
798 case USB_SPEED_SUPER:
799 dev_warn(dev, "ignore incorrect maximum_speed "
800 "(super-speed) setting in dts");
801 fallthrough;
802 default:
803 config->maximum_speed = USB_SPEED_HIGH;
804 }
805
806 ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
807 if (ret) {
808 dev_err(dev, "failed to add platform_data\n");
809 goto err;
810 }
811
812 ret = platform_device_add(musb);
813 if (ret) {
814 dev_err(dev, "failed to register musb device\n");
815 goto err;
816 }
817 return 0;
818
819err:
820 platform_device_put(musb);
821 return ret;
822}
823
824static irqreturn_t dsps_vbus_threaded_irq(int irq, void *priv)
825{
826 struct dsps_glue *glue = priv;
827 struct musb *musb = platform_get_drvdata(glue->musb);
828
829 if (!musb)
830 return IRQ_NONE;
831
832 dev_dbg(glue->dev, "VBUS interrupt\n");
833 dsps_mod_timer(glue, 0);
834
835 return IRQ_HANDLED;
836}
837
838static int dsps_setup_optional_vbus_irq(struct platform_device *pdev,
839 struct dsps_glue *glue)
840{
841 int error;
842
843 glue->vbus_irq = platform_get_irq_byname(pdev, "vbus");
844 if (glue->vbus_irq == -EPROBE_DEFER)
845 return -EPROBE_DEFER;
846
847 if (glue->vbus_irq <= 0) {
848 glue->vbus_irq = 0;
849 return 0;
850 }
851
852 error = devm_request_threaded_irq(glue->dev, glue->vbus_irq,
853 NULL, dsps_vbus_threaded_irq,
854 IRQF_ONESHOT,
855 "vbus", glue);
856 if (error) {
857 glue->vbus_irq = 0;
858 return error;
859 }
860 dev_dbg(glue->dev, "VBUS irq %i configured\n", glue->vbus_irq);
861
862 return 0;
863}
864
865static int dsps_probe(struct platform_device *pdev)
866{
867 const struct of_device_id *match;
868 const struct dsps_musb_wrapper *wrp;
869 struct dsps_glue *glue;
870 int ret;
871
872 if (!strcmp(pdev->name, "musb-hdrc"))
873 return -ENODEV;
874
875 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
876 if (!match) {
877 dev_err(&pdev->dev, "fail to get matching of_match struct\n");
878 return -EINVAL;
879 }
880 wrp = match->data;
881
882 if (of_device_is_compatible(pdev->dev.of_node, "ti,musb-dm816"))
883 dsps_ops.read_fifo = dsps_read_fifo32;
884
885 /* allocate glue */
886 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
887 if (!glue)
888 return -ENOMEM;
889
890 glue->dev = &pdev->dev;
891 glue->wrp = wrp;
892 glue->usbss_base = of_iomap(pdev->dev.parent->of_node, 0);
893 if (!glue->usbss_base)
894 return -ENXIO;
895
896 platform_set_drvdata(pdev, glue);
897 pm_runtime_enable(&pdev->dev);
898 ret = dsps_create_musb_pdev(glue, pdev);
899 if (ret)
900 goto err;
901
902 if (usb_get_dr_mode(&pdev->dev) == USB_DR_MODE_PERIPHERAL) {
903 ret = dsps_setup_optional_vbus_irq(pdev, glue);
904 if (ret)
905 goto unregister_pdev;
906 }
907
908 return 0;
909
910unregister_pdev:
911 platform_device_unregister(glue->musb);
912err:
913 pm_runtime_disable(&pdev->dev);
914 iounmap(glue->usbss_base);
915 return ret;
916}
917
918static int dsps_remove(struct platform_device *pdev)
919{
920 struct dsps_glue *glue = platform_get_drvdata(pdev);
921
922 platform_device_unregister(glue->musb);
923
924 pm_runtime_disable(&pdev->dev);
925 iounmap(glue->usbss_base);
926
927 return 0;
928}
929
930static const struct dsps_musb_wrapper am33xx_driver_data = {
931 .revision = 0x00,
932 .control = 0x14,
933 .status = 0x18,
934 .epintr_set = 0x38,
935 .epintr_clear = 0x40,
936 .epintr_status = 0x30,
937 .coreintr_set = 0x3c,
938 .coreintr_clear = 0x44,
939 .coreintr_status = 0x34,
940 .phy_utmi = 0xe0,
941 .mode = 0xe8,
942 .tx_mode = 0x70,
943 .rx_mode = 0x74,
944 .reset = 0,
945 .otg_disable = 21,
946 .iddig = 8,
947 .iddig_mux = 7,
948 .usb_shift = 0,
949 .usb_mask = 0x1ff,
950 .usb_bitmap = (0x1ff << 0),
951 .drvvbus = 8,
952 .txep_shift = 0,
953 .txep_mask = 0xffff,
954 .txep_bitmap = (0xffff << 0),
955 .rxep_shift = 16,
956 .rxep_mask = 0xfffe,
957 .rxep_bitmap = (0xfffe << 16),
958 .poll_timeout = 2000, /* ms */
959};
960
961static const struct of_device_id musb_dsps_of_match[] = {
962 { .compatible = "ti,musb-am33xx",
963 .data = &am33xx_driver_data, },
964 { .compatible = "ti,musb-dm816",
965 .data = &am33xx_driver_data, },
966 { },
967};
968MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
969
970#ifdef CONFIG_PM_SLEEP
971static int dsps_suspend(struct device *dev)
972{
973 struct dsps_glue *glue = dev_get_drvdata(dev);
974 const struct dsps_musb_wrapper *wrp = glue->wrp;
975 struct musb *musb = platform_get_drvdata(glue->musb);
976 void __iomem *mbase;
977 int ret;
978
979 if (!musb)
980 /* This can happen if the musb device is in -EPROBE_DEFER */
981 return 0;
982
983 ret = pm_runtime_get_sync(dev);
984 if (ret < 0) {
985 pm_runtime_put_noidle(dev);
986 return ret;
987 }
988
989 del_timer_sync(&musb->dev_timer);
990
991 mbase = musb->ctrl_base;
992 glue->context.control = musb_readl(mbase, wrp->control);
993 glue->context.epintr = musb_readl(mbase, wrp->epintr_set);
994 glue->context.coreintr = musb_readl(mbase, wrp->coreintr_set);
995 glue->context.phy_utmi = musb_readl(mbase, wrp->phy_utmi);
996 glue->context.mode = musb_readl(mbase, wrp->mode);
997 glue->context.tx_mode = musb_readl(mbase, wrp->tx_mode);
998 glue->context.rx_mode = musb_readl(mbase, wrp->rx_mode);
999
1000 dsps_dma_controller_suspend(glue);
1001
1002 return 0;
1003}
1004
1005static int dsps_resume(struct device *dev)
1006{
1007 struct dsps_glue *glue = dev_get_drvdata(dev);
1008 const struct dsps_musb_wrapper *wrp = glue->wrp;
1009 struct musb *musb = platform_get_drvdata(glue->musb);
1010 void __iomem *mbase;
1011
1012 if (!musb)
1013 return 0;
1014
1015 dsps_dma_controller_resume(glue);
1016
1017 mbase = musb->ctrl_base;
1018 musb_writel(mbase, wrp->control, glue->context.control);
1019 musb_writel(mbase, wrp->epintr_set, glue->context.epintr);
1020 musb_writel(mbase, wrp->coreintr_set, glue->context.coreintr);
1021 musb_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi);
1022 musb_writel(mbase, wrp->mode, glue->context.mode);
1023 musb_writel(mbase, wrp->tx_mode, glue->context.tx_mode);
1024 musb_writel(mbase, wrp->rx_mode, glue->context.rx_mode);
1025 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
1026 musb->port_mode == MUSB_OTG)
1027 dsps_mod_timer(glue, -1);
1028
1029 pm_runtime_put(dev);
1030
1031 return 0;
1032}
1033#endif
1034
1035static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
1036
1037static struct platform_driver dsps_usbss_driver = {
1038 .probe = dsps_probe,
1039 .remove = dsps_remove,
1040 .driver = {
1041 .name = "musb-dsps",
1042 .pm = &dsps_pm_ops,
1043 .of_match_table = musb_dsps_of_match,
1044 },
1045};
1046
1047MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
1048MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
1049MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
1050MODULE_LICENSE("GPL v2");
1051
1052module_platform_driver(dsps_usbss_driver);