1// SPDX-License-Identifier: GPL-2.0
 2/*
 3 * This file contains platform specific structure definitions
 4 * and init function used by Meteor Lake PCH.
 5 *
 6 * Copyright (c) 2022, Intel Corporation.
 7 * All Rights Reserved.
 8 *
 9 */
10
11#include "core.h"
12
13const struct pmc_reg_map mtl_reg_map = {
14	.pfear_sts = ext_tgl_pfear_map,
15	.slp_s0_offset = CNP_PMC_SLP_S0_RES_COUNTER_OFFSET,
16	.slp_s0_res_counter_step = TGL_PMC_SLP_S0_RES_COUNTER_STEP,
17	.ltr_show_sts = adl_ltr_show_map,
18	.msr_sts = msr_map,
19	.ltr_ignore_offset = CNP_PMC_LTR_IGNORE_OFFSET,
20	.regmap_length = CNP_PMC_MMIO_REG_LEN,
21	.ppfear0_offset = CNP_PMC_HOST_PPFEAR0A,
22	.ppfear_buckets = ICL_PPFEAR_NUM_ENTRIES,
23	.pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET,
24	.pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT,
25	.ltr_ignore_max = ADL_NUM_IP_IGN_ALLOWED,
26	.lpm_num_modes = ADL_LPM_NUM_MODES,
27	.lpm_num_maps = ADL_LPM_NUM_MAPS,
28	.lpm_res_counter_step_x2 = TGL_PMC_LPM_RES_COUNTER_STEP_X2,
29	.etr3_offset = ETR3_OFFSET,
30	.lpm_sts_latch_en_offset = MTL_LPM_STATUS_LATCH_EN_OFFSET,
31	.lpm_priority_offset = MTL_LPM_PRI_OFFSET,
32	.lpm_en_offset = MTL_LPM_EN_OFFSET,
33	.lpm_residency_offset = MTL_LPM_RESIDENCY_OFFSET,
34	.lpm_sts = adl_lpm_maps,
35	.lpm_status_offset = MTL_LPM_STATUS_OFFSET,
36	.lpm_live_status_offset = MTL_LPM_LIVE_STATUS_OFFSET,
37};
38
39void mtl_core_configure(struct pmc_dev *pmcdev)
40{
41	/* Due to a hardware limitation, the GBE LTR blocks PC10
42	 * when a cable is attached. Tell the PMC to ignore it.
43	 */
44	dev_dbg(&pmcdev->pdev->dev, "ignoring GBE LTR\n");
45	pmc_core_send_ltr_ignore(pmcdev, 3);
46}
47
48void mtl_core_init(struct pmc_dev *pmcdev)
49{
50	pmcdev->map = &mtl_reg_map;
51	pmcdev->core_configure = mtl_core_configure;
52}