1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Copyright (c) 2018 MediaTek Inc.
  4 * Author: Jie Qiu <jie.qiu@mediatek.com>
  5 */
  6
  7#include "phy-mtk-hdmi.h"
  8
  9static int mtk_hdmi_phy_power_on(struct phy *phy);
 10static int mtk_hdmi_phy_power_off(struct phy *phy);
 11
 12static const struct phy_ops mtk_hdmi_phy_dev_ops = {
 13	.power_on = mtk_hdmi_phy_power_on,
 14	.power_off = mtk_hdmi_phy_power_off,
 15	.owner = THIS_MODULE,
 16};
 17
 18inline struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw)
 19{
 20	return container_of(hw, struct mtk_hdmi_phy, pll_hw);
 21}
 22
 23static int mtk_hdmi_phy_power_on(struct phy *phy)
 24{
 25	struct mtk_hdmi_phy *hdmi_phy = phy_get_drvdata(phy);
 26	int ret;
 27
 28	ret = clk_prepare_enable(hdmi_phy->pll);
 29	if (ret < 0)
 30		return ret;
 31
 32	hdmi_phy->conf->hdmi_phy_enable_tmds(hdmi_phy);
 33	return 0;
 34}
 35
 36static int mtk_hdmi_phy_power_off(struct phy *phy)
 37{
 38	struct mtk_hdmi_phy *hdmi_phy = phy_get_drvdata(phy);
 39
 40	hdmi_phy->conf->hdmi_phy_disable_tmds(hdmi_phy);
 41	clk_disable_unprepare(hdmi_phy->pll);
 42
 43	return 0;
 44}
 45
 46static const struct phy_ops *
 47mtk_hdmi_phy_dev_get_ops(const struct mtk_hdmi_phy *hdmi_phy)
 48{
 49	if (hdmi_phy && hdmi_phy->conf &&
 50	    hdmi_phy->conf->hdmi_phy_enable_tmds &&
 51	    hdmi_phy->conf->hdmi_phy_disable_tmds)
 52		return &mtk_hdmi_phy_dev_ops;
 53
 54	if (hdmi_phy)
 55		dev_err(hdmi_phy->dev, "Failed to get dev ops of phy\n");
 56	return NULL;
 57}
 58
 59static void mtk_hdmi_phy_clk_get_data(struct mtk_hdmi_phy *hdmi_phy,
 60				      struct clk_init_data *clk_init)
 61{
 62	clk_init->flags = hdmi_phy->conf->flags;
 63	clk_init->ops = hdmi_phy->conf->hdmi_phy_clk_ops;
 64}
 65
 66static int mtk_hdmi_phy_probe(struct platform_device *pdev)
 67{
 68	struct device *dev = &pdev->dev;
 69	struct mtk_hdmi_phy *hdmi_phy;
 70	struct clk *ref_clk;
 71	const char *ref_clk_name;
 72	struct clk_init_data clk_init = {
 73		.num_parents = 1,
 74		.parent_names = (const char * const *)&ref_clk_name,
 75	};
 76
 77	struct phy *phy;
 78	struct phy_provider *phy_provider;
 79	int ret;
 80
 81	hdmi_phy = devm_kzalloc(dev, sizeof(*hdmi_phy), GFP_KERNEL);
 82	if (!hdmi_phy)
 83		return -ENOMEM;
 84
 85	hdmi_phy->regs = devm_platform_ioremap_resource(pdev, 0);
 86	if (IS_ERR(hdmi_phy->regs))
 87		return PTR_ERR(hdmi_phy->regs);
 88
 89	ref_clk = devm_clk_get(dev, "pll_ref");
 90	if (IS_ERR(ref_clk))
 91		return dev_err_probe(dev, PTR_ERR(ref_clk),
 92				     "Failed to get PLL reference clock\n");
 93
 94	ref_clk_name = __clk_get_name(ref_clk);
 95
 96	ret = of_property_read_string(dev->of_node, "clock-output-names",
 97				      &clk_init.name);
 98	if (ret < 0)
 99		return dev_err_probe(dev, ret, "Failed to read clock-output-names\n");
100
101	hdmi_phy->dev = dev;
102	hdmi_phy->conf =
103		(struct mtk_hdmi_phy_conf *)of_device_get_match_data(dev);
104	mtk_hdmi_phy_clk_get_data(hdmi_phy, &clk_init);
105	hdmi_phy->pll_hw.init = &clk_init;
106	hdmi_phy->pll = devm_clk_register(dev, &hdmi_phy->pll_hw);
107	if (IS_ERR(hdmi_phy->pll))
108		return dev_err_probe(dev, PTR_ERR(hdmi_phy->pll),
109				    "Failed to register PLL\n");
110
111	ret = of_property_read_u32(dev->of_node, "mediatek,ibias",
112				   &hdmi_phy->ibias);
113	if (ret < 0)
114		return dev_err_probe(dev, ret, "Failed to get ibias\n");
115
116	ret = of_property_read_u32(dev->of_node, "mediatek,ibias_up",
117				   &hdmi_phy->ibias_up);
118	if (ret < 0)
119		return dev_err_probe(dev, ret, "Failed to get ibias_up\n");
120
121	dev_info(dev, "Using default TX DRV impedance: 4.2k/36\n");
122	hdmi_phy->drv_imp_clk = 0x30;
123	hdmi_phy->drv_imp_d2 = 0x30;
124	hdmi_phy->drv_imp_d1 = 0x30;
125	hdmi_phy->drv_imp_d0 = 0x30;
126
127	phy = devm_phy_create(dev, NULL, mtk_hdmi_phy_dev_get_ops(hdmi_phy));
128	if (IS_ERR(phy))
129		return dev_err_probe(dev, PTR_ERR(phy), "Cannot create HDMI PHY\n");
130
131	phy_set_drvdata(phy, hdmi_phy);
132
133	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
134	if (IS_ERR(phy_provider))
135		return dev_err_probe(dev, PTR_ERR(phy_provider),
136				     "Failed to register HDMI PHY\n");
137
138	if (hdmi_phy->conf->pll_default_off)
139		hdmi_phy->conf->hdmi_phy_disable_tmds(hdmi_phy);
140
141	return of_clk_add_provider(dev->of_node, of_clk_src_simple_get,
142				   hdmi_phy->pll);
143}
144
145static const struct of_device_id mtk_hdmi_phy_match[] = {
146	{ .compatible = "mediatek,mt2701-hdmi-phy",
147	  .data = &mtk_hdmi_phy_2701_conf,
148	},
149	{ .compatible = "mediatek,mt8173-hdmi-phy",
150	  .data = &mtk_hdmi_phy_8173_conf,
151	},
152	{},
153};
154MODULE_DEVICE_TABLE(of, mtk_hdmi_phy_match);
155
156static struct platform_driver mtk_hdmi_phy_driver = {
157	.probe = mtk_hdmi_phy_probe,
158	.driver = {
159		.name = "mediatek-hdmi-phy",
160		.of_match_table = mtk_hdmi_phy_match,
161	},
162};
163module_platform_driver(mtk_hdmi_phy_driver);
164
165MODULE_DESCRIPTION("MediaTek HDMI PHY Driver");
166MODULE_LICENSE("GPL v2");