1/* SPDX-License-Identifier: MIT */
 2/*
 3 * Copyright © 2022 Intel Corporation
 4 */
 5
 6#ifndef __INTEL_DISPLAY_REG_DEFS_H__
 7#define __INTEL_DISPLAY_REG_DEFS_H__
 8
 9#include "i915_reg_defs.h"
10
11#define DISPLAY_MMIO_BASE(dev_priv)	(INTEL_INFO(dev_priv)->display.mmio_offset)
12
13#define VLV_DISPLAY_BASE		0x180000
14
15/*
16 * Named helper wrappers around _PICK_EVEN() and _PICK().
17 */
18#define _PIPE(pipe, a, b)		_PICK_EVEN(pipe, a, b)
19#define _PLANE(plane, a, b)		_PICK_EVEN(plane, a, b)
20#define _TRANS(tran, a, b)		_PICK_EVEN(tran, a, b)
21#define _PORT(port, a, b)		_PICK_EVEN(port, a, b)
22#define _PLL(pll, a, b)			_PICK_EVEN(pll, a, b)
23#define _PHY(phy, a, b)			_PICK_EVEN(phy, a, b)
24
25#define _MMIO_PIPE(pipe, a, b)		_MMIO(_PIPE(pipe, a, b))
26#define _MMIO_PLANE(plane, a, b)	_MMIO(_PLANE(plane, a, b))
27#define _MMIO_TRANS(tran, a, b)		_MMIO(_TRANS(tran, a, b))
28#define _MMIO_PORT(port, a, b)		_MMIO(_PORT(port, a, b))
29#define _MMIO_PLL(pll, a, b)		_MMIO(_PLL(pll, a, b))
30#define _MMIO_PHY(phy, a, b)		_MMIO(_PHY(phy, a, b))
31
32#define _PHY3(phy, ...)			_PICK(phy, __VA_ARGS__)
33
34#define _MMIO_PIPE3(pipe, a, b, c)	_MMIO(_PICK(pipe, a, b, c))
35#define _MMIO_PORT3(pipe, a, b, c)	_MMIO(_PICK(pipe, a, b, c))
36#define _MMIO_PHY3(phy, a, b, c)	_MMIO(_PHY3(phy, a, b, c))
37#define _MMIO_PLL3(pll, ...)		_MMIO(_PICK(pll, __VA_ARGS__))
38
39/*
40 * Device info offset array based helpers for groups of registers with unevenly
41 * spaced base offsets.
42 */
43#define _MMIO_PIPE2(pipe, reg)		_MMIO(INTEL_INFO(dev_priv)->display.pipe_offsets[(pipe)] - \
44					      INTEL_INFO(dev_priv)->display.pipe_offsets[PIPE_A] + \
45					      DISPLAY_MMIO_BASE(dev_priv) + (reg))
46#define _MMIO_TRANS2(tran, reg)		_MMIO(INTEL_INFO(dev_priv)->display.trans_offsets[(tran)] - \
47					      INTEL_INFO(dev_priv)->display.trans_offsets[TRANSCODER_A] + \
48					      DISPLAY_MMIO_BASE(dev_priv) + (reg))
49#define _MMIO_CURSOR2(pipe, reg)	_MMIO(INTEL_INFO(dev_priv)->display.cursor_offsets[(pipe)] - \
50					      INTEL_INFO(dev_priv)->display.cursor_offsets[PIPE_A] + \
51					      DISPLAY_MMIO_BASE(dev_priv) + (reg))
52
53#endif /* __INTEL_DISPLAY_REG_DEFS_H__ */