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1/*
2 * RNG driver for AMD RNGs
3 *
4 * Copyright 2005 (c) MontaVista Software, Inc.
5 *
6 * with the majority of the code coming from:
7 *
8 * Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG)
9 * (c) Copyright 2003 Red Hat Inc <jgarzik@redhat.com>
10 *
11 * derived from
12 *
13 * Hardware driver for the AMD 768 Random Number Generator (RNG)
14 * (c) Copyright 2001 Red Hat Inc
15 *
16 * derived from
17 *
18 * Hardware driver for Intel i810 Random Number Generator (RNG)
19 * Copyright 2000,2001 Jeff Garzik <jgarzik@pobox.com>
20 * Copyright 2000,2001 Philipp Rumpf <prumpf@mandrakesoft.com>
21 *
22 * This file is licensed under the terms of the GNU General Public
23 * License version 2. This program is licensed "as is" without any
24 * warranty of any kind, whether express or implied.
25 */
26
27#include <linux/module.h>
28#include <linux/kernel.h>
29#include <linux/pci.h>
30#include <linux/hw_random.h>
31#include <linux/delay.h>
32#include <asm/io.h>
33
34
35#define PFX KBUILD_MODNAME ": "
36
37
38/*
39 * Data for PCI driver interface
40 *
41 * This data only exists for exporting the supported
42 * PCI ids via MODULE_DEVICE_TABLE. We do not actually
43 * register a pci_driver, because someone else might one day
44 * want to register another driver on the same PCI id.
45 */
46static const struct pci_device_id pci_tbl[] = {
47 { PCI_VDEVICE(AMD, 0x7443), 0, },
48 { PCI_VDEVICE(AMD, 0x746b), 0, },
49 { 0, }, /* terminate list */
50};
51MODULE_DEVICE_TABLE(pci, pci_tbl);
52
53static struct pci_dev *amd_pdev;
54
55
56static int amd_rng_data_present(struct hwrng *rng, int wait)
57{
58 u32 pmbase = (u32)rng->priv;
59 int data, i;
60
61 for (i = 0; i < 20; i++) {
62 data = !!(inl(pmbase + 0xF4) & 1);
63 if (data || !wait)
64 break;
65 udelay(10);
66 }
67 return data;
68}
69
70static int amd_rng_data_read(struct hwrng *rng, u32 *data)
71{
72 u32 pmbase = (u32)rng->priv;
73
74 *data = inl(pmbase + 0xF0);
75
76 return 4;
77}
78
79static int amd_rng_init(struct hwrng *rng)
80{
81 u8 rnen;
82
83 pci_read_config_byte(amd_pdev, 0x40, &rnen);
84 rnen |= (1 << 7); /* RNG on */
85 pci_write_config_byte(amd_pdev, 0x40, rnen);
86
87 pci_read_config_byte(amd_pdev, 0x41, &rnen);
88 rnen |= (1 << 7); /* PMIO enable */
89 pci_write_config_byte(amd_pdev, 0x41, rnen);
90
91 return 0;
92}
93
94static void amd_rng_cleanup(struct hwrng *rng)
95{
96 u8 rnen;
97
98 pci_read_config_byte(amd_pdev, 0x40, &rnen);
99 rnen &= ~(1 << 7); /* RNG off */
100 pci_write_config_byte(amd_pdev, 0x40, rnen);
101}
102
103
104static struct hwrng amd_rng = {
105 .name = "amd",
106 .init = amd_rng_init,
107 .cleanup = amd_rng_cleanup,
108 .data_present = amd_rng_data_present,
109 .data_read = amd_rng_data_read,
110};
111
112
113static int __init mod_init(void)
114{
115 int err = -ENODEV;
116 struct pci_dev *pdev = NULL;
117 const struct pci_device_id *ent;
118 u32 pmbase;
119
120 for_each_pci_dev(pdev) {
121 ent = pci_match_id(pci_tbl, pdev);
122 if (ent)
123 goto found;
124 }
125 /* Device not found. */
126 goto out;
127
128found:
129 err = pci_read_config_dword(pdev, 0x58, &pmbase);
130 if (err)
131 goto out;
132 err = -EIO;
133 pmbase &= 0x0000FF00;
134 if (pmbase == 0)
135 goto out;
136 if (!request_region(pmbase + 0xF0, 8, "AMD HWRNG")) {
137 dev_err(&pdev->dev, "AMD HWRNG region 0x%x already in use!\n",
138 pmbase + 0xF0);
139 err = -EBUSY;
140 goto out;
141 }
142 amd_rng.priv = (unsigned long)pmbase;
143 amd_pdev = pdev;
144
145 printk(KERN_INFO "AMD768 RNG detected\n");
146 err = hwrng_register(&amd_rng);
147 if (err) {
148 printk(KERN_ERR PFX "RNG registering failed (%d)\n",
149 err);
150 release_region(pmbase + 0xF0, 8);
151 goto out;
152 }
153out:
154 return err;
155}
156
157static void __exit mod_exit(void)
158{
159 u32 pmbase = (unsigned long)amd_rng.priv;
160 release_region(pmbase + 0xF0, 8);
161 hwrng_unregister(&amd_rng);
162}
163
164module_init(mod_init);
165module_exit(mod_exit);
166
167MODULE_AUTHOR("The Linux Kernel team");
168MODULE_DESCRIPTION("H/W RNG driver for AMD chipsets");
169MODULE_LICENSE("GPL");
1/*
2 * RNG driver for AMD RNGs
3 *
4 * Copyright 2005 (c) MontaVista Software, Inc.
5 *
6 * with the majority of the code coming from:
7 *
8 * Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG)
9 * (c) Copyright 2003 Red Hat Inc <jgarzik@redhat.com>
10 *
11 * derived from
12 *
13 * Hardware driver for the AMD 768 Random Number Generator (RNG)
14 * (c) Copyright 2001 Red Hat Inc
15 *
16 * derived from
17 *
18 * Hardware driver for Intel i810 Random Number Generator (RNG)
19 * Copyright 2000,2001 Jeff Garzik <jgarzik@pobox.com>
20 * Copyright 2000,2001 Philipp Rumpf <prumpf@mandrakesoft.com>
21 *
22 * This file is licensed under the terms of the GNU General Public
23 * License version 2. This program is licensed "as is" without any
24 * warranty of any kind, whether express or implied.
25 */
26
27#include <linux/delay.h>
28#include <linux/hw_random.h>
29#include <linux/kernel.h>
30#include <linux/module.h>
31#include <linux/pci.h>
32
33#define DRV_NAME "AMD768-HWRNG"
34
35#define RNGDATA 0x00
36#define RNGDONE 0x04
37#define PMBASE_OFFSET 0xF0
38#define PMBASE_SIZE 8
39
40/*
41 * Data for PCI driver interface
42 *
43 * This data only exists for exporting the supported
44 * PCI ids via MODULE_DEVICE_TABLE. We do not actually
45 * register a pci_driver, because someone else might one day
46 * want to register another driver on the same PCI id.
47 */
48static const struct pci_device_id pci_tbl[] = {
49 { PCI_VDEVICE(AMD, 0x7443), 0, },
50 { PCI_VDEVICE(AMD, 0x746b), 0, },
51 { 0, }, /* terminate list */
52};
53MODULE_DEVICE_TABLE(pci, pci_tbl);
54
55struct amd768_priv {
56 void __iomem *iobase;
57 struct pci_dev *pcidev;
58 u32 pmbase;
59};
60
61static int amd_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
62{
63 u32 *data = buf;
64 struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
65 size_t read = 0;
66 /* We will wait at maximum one time per read */
67 int timeout = max / 4 + 1;
68
69 /*
70 * RNG data is available when RNGDONE is set to 1
71 * New random numbers are generated approximately 128 microseconds
72 * after RNGDATA is read
73 */
74 while (read < max) {
75 if (ioread32(priv->iobase + RNGDONE) == 0) {
76 if (wait) {
77 /* Delay given by datasheet */
78 usleep_range(128, 196);
79 if (timeout-- == 0)
80 return read;
81 } else {
82 return 0;
83 }
84 } else {
85 *data = ioread32(priv->iobase + RNGDATA);
86 data++;
87 read += 4;
88 }
89 }
90
91 return read;
92}
93
94static int amd_rng_init(struct hwrng *rng)
95{
96 struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
97 u8 rnen;
98
99 pci_read_config_byte(priv->pcidev, 0x40, &rnen);
100 rnen |= BIT(7); /* RNG on */
101 pci_write_config_byte(priv->pcidev, 0x40, rnen);
102
103 pci_read_config_byte(priv->pcidev, 0x41, &rnen);
104 rnen |= BIT(7); /* PMIO enable */
105 pci_write_config_byte(priv->pcidev, 0x41, rnen);
106
107 return 0;
108}
109
110static void amd_rng_cleanup(struct hwrng *rng)
111{
112 struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
113 u8 rnen;
114
115 pci_read_config_byte(priv->pcidev, 0x40, &rnen);
116 rnen &= ~BIT(7); /* RNG off */
117 pci_write_config_byte(priv->pcidev, 0x40, rnen);
118}
119
120static struct hwrng amd_rng = {
121 .name = "amd",
122 .init = amd_rng_init,
123 .cleanup = amd_rng_cleanup,
124 .read = amd_rng_read,
125};
126
127static int __init amd_rng_mod_init(void)
128{
129 int err;
130 struct pci_dev *pdev = NULL;
131 const struct pci_device_id *ent;
132 u32 pmbase;
133 struct amd768_priv *priv;
134
135 for_each_pci_dev(pdev) {
136 ent = pci_match_id(pci_tbl, pdev);
137 if (ent)
138 goto found;
139 }
140 /* Device not found. */
141 return -ENODEV;
142
143found:
144 err = pci_read_config_dword(pdev, 0x58, &pmbase);
145 if (err)
146 goto put_dev;
147
148 pmbase &= 0x0000FF00;
149 if (pmbase == 0) {
150 err = -EIO;
151 goto put_dev;
152 }
153
154 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
155 if (!priv) {
156 err = -ENOMEM;
157 goto put_dev;
158 }
159
160 if (!request_region(pmbase + PMBASE_OFFSET, PMBASE_SIZE, DRV_NAME)) {
161 dev_err(&pdev->dev, DRV_NAME " region 0x%x already in use!\n",
162 pmbase + 0xF0);
163 err = -EBUSY;
164 goto out;
165 }
166
167 priv->iobase = ioport_map(pmbase + PMBASE_OFFSET, PMBASE_SIZE);
168 if (!priv->iobase) {
169 pr_err(DRV_NAME "Cannot map ioport\n");
170 err = -EINVAL;
171 goto err_iomap;
172 }
173
174 amd_rng.priv = (unsigned long)priv;
175 priv->pmbase = pmbase;
176 priv->pcidev = pdev;
177
178 pr_info(DRV_NAME " detected\n");
179 err = hwrng_register(&amd_rng);
180 if (err) {
181 pr_err(DRV_NAME " registering failed (%d)\n", err);
182 goto err_hwrng;
183 }
184 return 0;
185
186err_hwrng:
187 ioport_unmap(priv->iobase);
188err_iomap:
189 release_region(pmbase + PMBASE_OFFSET, PMBASE_SIZE);
190out:
191 kfree(priv);
192put_dev:
193 pci_dev_put(pdev);
194 return err;
195}
196
197static void __exit amd_rng_mod_exit(void)
198{
199 struct amd768_priv *priv;
200
201 priv = (struct amd768_priv *)amd_rng.priv;
202
203 hwrng_unregister(&amd_rng);
204
205 ioport_unmap(priv->iobase);
206
207 release_region(priv->pmbase + PMBASE_OFFSET, PMBASE_SIZE);
208
209 pci_dev_put(priv->pcidev);
210
211 kfree(priv);
212}
213
214module_init(amd_rng_mod_init);
215module_exit(amd_rng_mod_exit);
216
217MODULE_AUTHOR("The Linux Kernel team");
218MODULE_DESCRIPTION("H/W RNG driver for AMD chipsets");
219MODULE_LICENSE("GPL");