1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Copyright (c) 2011-2015, 2017, 2020, The Linux Foundation. All rights reserved.
  4 */
  5
  6#include <linux/bitops.h>
  7#include <linux/delay.h>
  8#include <linux/err.h>
  9#include <linux/iio/consumer.h>
 10#include <linux/interrupt.h>
 11#include <linux/module.h>
 12#include <linux/of.h>
 13#include <linux/platform_device.h>
 14#include <linux/regmap.h>
 15#include <linux/thermal.h>
 16
 17#include "../thermal_hwmon.h"
 18
 19#define QPNP_TM_REG_DIG_MAJOR		0x01
 20#define QPNP_TM_REG_TYPE		0x04
 21#define QPNP_TM_REG_SUBTYPE		0x05
 22#define QPNP_TM_REG_STATUS		0x08
 23#define QPNP_TM_REG_SHUTDOWN_CTRL1	0x40
 24#define QPNP_TM_REG_ALARM_CTRL		0x46
 25
 26#define QPNP_TM_TYPE			0x09
 27#define QPNP_TM_SUBTYPE_GEN1		0x08
 28#define QPNP_TM_SUBTYPE_GEN2		0x09
 29
 30#define STATUS_GEN1_STAGE_MASK		GENMASK(1, 0)
 31#define STATUS_GEN2_STATE_MASK		GENMASK(6, 4)
 32#define STATUS_GEN2_STATE_SHIFT		4
 33
 34#define SHUTDOWN_CTRL1_OVERRIDE_S2	BIT(6)
 35#define SHUTDOWN_CTRL1_THRESHOLD_MASK	GENMASK(1, 0)
 36
 37#define SHUTDOWN_CTRL1_RATE_25HZ	BIT(3)
 38
 39#define ALARM_CTRL_FORCE_ENABLE		BIT(7)
 40
 41#define THRESH_COUNT			4
 42#define STAGE_COUNT			3
 43
 44/* Over-temperature trip point values in mC */
 45static const long temp_map_gen1[THRESH_COUNT][STAGE_COUNT] = {
 46	{ 105000, 125000, 145000 },
 47	{ 110000, 130000, 150000 },
 48	{ 115000, 135000, 155000 },
 49	{ 120000, 140000, 160000 },
 50};
 51
 52static const long temp_map_gen2_v1[THRESH_COUNT][STAGE_COUNT] = {
 53	{  90000, 110000, 140000 },
 54	{  95000, 115000, 145000 },
 55	{ 100000, 120000, 150000 },
 56	{ 105000, 125000, 155000 },
 57};
 58
 59#define TEMP_THRESH_STEP		5000 /* Threshold step: 5 C */
 60
 61#define THRESH_MIN			0
 62#define THRESH_MAX			3
 63
 64#define TEMP_STAGE_HYSTERESIS		2000
 65
 66/* Temperature in Milli Celsius reported during stage 0 if no ADC is present */
 67#define DEFAULT_TEMP			37000
 68
 69struct qpnp_tm_chip {
 70	struct regmap			*map;
 71	struct device			*dev;
 72	struct thermal_zone_device	*tz_dev;
 73	unsigned int			subtype;
 74	long				temp;
 75	unsigned int			thresh;
 76	unsigned int			stage;
 77	unsigned int			base;
 78	/* protects .thresh, .stage and chip registers */
 79	struct mutex			lock;
 80	bool				initialized;
 81
 82	struct iio_channel		*adc;
 83	const long			(*temp_map)[THRESH_COUNT][STAGE_COUNT];
 84};
 85
 86/* This array maps from GEN2 alarm state to GEN1 alarm stage */
 87static const unsigned int alarm_state_map[8] = {0, 1, 1, 2, 2, 3, 3, 3};
 88
 89static int qpnp_tm_read(struct qpnp_tm_chip *chip, u16 addr, u8 *data)
 90{
 91	unsigned int val;
 92	int ret;
 93
 94	ret = regmap_read(chip->map, chip->base + addr, &val);
 95	if (ret < 0)
 96		return ret;
 97
 98	*data = val;
 99	return 0;
100}
101
102static int qpnp_tm_write(struct qpnp_tm_chip *chip, u16 addr, u8 data)
103{
104	return regmap_write(chip->map, chip->base + addr, data);
105}
106
107/**
108 * qpnp_tm_decode_temp() - return temperature in mC corresponding to the
109 *		specified over-temperature stage
110 * @chip:		Pointer to the qpnp_tm chip
111 * @stage:		Over-temperature stage
112 *
113 * Return: temperature in mC
114 */
115static long qpnp_tm_decode_temp(struct qpnp_tm_chip *chip, unsigned int stage)
116{
117	if (!chip->temp_map || chip->thresh >= THRESH_COUNT || stage == 0 ||
118	    stage > STAGE_COUNT)
119		return 0;
120
121	return (*chip->temp_map)[chip->thresh][stage - 1];
122}
123
124/**
125 * qpnp_tm_get_temp_stage() - return over-temperature stage
126 * @chip:		Pointer to the qpnp_tm chip
127 *
128 * Return: stage (GEN1) or state (GEN2) on success, or errno on failure.
129 */
130static int qpnp_tm_get_temp_stage(struct qpnp_tm_chip *chip)
131{
132	int ret;
133	u8 reg = 0;
134
135	ret = qpnp_tm_read(chip, QPNP_TM_REG_STATUS, &reg);
136	if (ret < 0)
137		return ret;
138
139	if (chip->subtype == QPNP_TM_SUBTYPE_GEN1)
140		ret = reg & STATUS_GEN1_STAGE_MASK;
141	else
142		ret = (reg & STATUS_GEN2_STATE_MASK) >> STATUS_GEN2_STATE_SHIFT;
143
144	return ret;
145}
146
147/*
148 * This function updates the internal temp value based on the
149 * current thermal stage and threshold as well as the previous stage
150 */
151static int qpnp_tm_update_temp_no_adc(struct qpnp_tm_chip *chip)
152{
153	unsigned int stage, stage_new, stage_old;
154	int ret;
155
156	WARN_ON(!mutex_is_locked(&chip->lock));
157
158	ret = qpnp_tm_get_temp_stage(chip);
159	if (ret < 0)
160		return ret;
161	stage = ret;
162
163	if (chip->subtype == QPNP_TM_SUBTYPE_GEN1) {
164		stage_new = stage;
165		stage_old = chip->stage;
166	} else {
167		stage_new = alarm_state_map[stage];
168		stage_old = alarm_state_map[chip->stage];
169	}
170
171	if (stage_new > stage_old) {
172		/* increasing stage, use lower bound */
173		chip->temp = qpnp_tm_decode_temp(chip, stage_new)
174				+ TEMP_STAGE_HYSTERESIS;
175	} else if (stage_new < stage_old) {
176		/* decreasing stage, use upper bound */
177		chip->temp = qpnp_tm_decode_temp(chip, stage_new + 1)
178				- TEMP_STAGE_HYSTERESIS;
179	}
180
181	chip->stage = stage;
182
183	return 0;
184}
185
186static int qpnp_tm_get_temp(struct thermal_zone_device *tz, int *temp)
187{
188	struct qpnp_tm_chip *chip = thermal_zone_device_priv(tz);
189	int ret, mili_celsius;
190
191	if (!temp)
192		return -EINVAL;
193
194	if (!chip->initialized) {
195		*temp = DEFAULT_TEMP;
196		return 0;
197	}
198
199	if (!chip->adc) {
200		mutex_lock(&chip->lock);
201		ret = qpnp_tm_update_temp_no_adc(chip);
202		mutex_unlock(&chip->lock);
203		if (ret < 0)
204			return ret;
205	} else {
206		ret = iio_read_channel_processed(chip->adc, &mili_celsius);
207		if (ret < 0)
208			return ret;
209
210		chip->temp = mili_celsius;
211	}
212
213	*temp = chip->temp;
214
215	return 0;
216}
217
218static int qpnp_tm_update_critical_trip_temp(struct qpnp_tm_chip *chip,
219					     int temp)
220{
221	long stage2_threshold_min = (*chip->temp_map)[THRESH_MIN][1];
222	long stage2_threshold_max = (*chip->temp_map)[THRESH_MAX][1];
223	bool disable_s2_shutdown = false;
224	u8 reg;
225
226	WARN_ON(!mutex_is_locked(&chip->lock));
227
228	/*
229	 * Default: S2 and S3 shutdown enabled, thresholds at
230	 * lowest threshold set, monitoring at 25Hz
231	 */
232	reg = SHUTDOWN_CTRL1_RATE_25HZ;
233
234	if (temp == THERMAL_TEMP_INVALID ||
235	    temp < stage2_threshold_min) {
236		chip->thresh = THRESH_MIN;
237		goto skip;
238	}
239
240	if (temp <= stage2_threshold_max) {
241		chip->thresh = THRESH_MAX -
242			((stage2_threshold_max - temp) /
243			 TEMP_THRESH_STEP);
244		disable_s2_shutdown = true;
245	} else {
246		chip->thresh = THRESH_MAX;
247
248		if (chip->adc)
249			disable_s2_shutdown = true;
250		else
251			dev_warn(chip->dev,
252				 "No ADC is configured and critical temperature %d mC is above the maximum stage 2 threshold of %ld mC! Configuring stage 2 shutdown at %ld mC.\n",
253				 temp, stage2_threshold_max, stage2_threshold_max);
254	}
255
256skip:
257	reg |= chip->thresh;
258	if (disable_s2_shutdown)
259		reg |= SHUTDOWN_CTRL1_OVERRIDE_S2;
260
261	return qpnp_tm_write(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, reg);
262}
263
264static int qpnp_tm_set_trip_temp(struct thermal_zone_device *tz,
265				 const struct thermal_trip *trip, int temp)
266{
267	struct qpnp_tm_chip *chip = thermal_zone_device_priv(tz);
268	int ret;
269
270	if (trip->type != THERMAL_TRIP_CRITICAL)
271		return 0;
272
273	mutex_lock(&chip->lock);
274	ret = qpnp_tm_update_critical_trip_temp(chip, temp);
275	mutex_unlock(&chip->lock);
276
277	return ret;
278}
279
280static const struct thermal_zone_device_ops qpnp_tm_sensor_ops = {
281	.get_temp = qpnp_tm_get_temp,
282	.set_trip_temp = qpnp_tm_set_trip_temp,
283};
284
285static irqreturn_t qpnp_tm_isr(int irq, void *data)
286{
287	struct qpnp_tm_chip *chip = data;
288
289	thermal_zone_device_update(chip->tz_dev, THERMAL_EVENT_UNSPECIFIED);
290
291	return IRQ_HANDLED;
292}
293
294/*
295 * This function initializes the internal temp value based on only the
296 * current thermal stage and threshold. Setup threshold control and
297 * disable shutdown override.
298 */
299static int qpnp_tm_init(struct qpnp_tm_chip *chip)
300{
301	unsigned int stage;
302	int ret;
303	u8 reg = 0;
304	int crit_temp;
305
306	mutex_lock(&chip->lock);
307
308	ret = qpnp_tm_read(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, &reg);
309	if (ret < 0)
310		goto out;
311
312	chip->thresh = reg & SHUTDOWN_CTRL1_THRESHOLD_MASK;
313	chip->temp = DEFAULT_TEMP;
314
315	ret = qpnp_tm_get_temp_stage(chip);
316	if (ret < 0)
317		goto out;
318	chip->stage = ret;
319
320	stage = chip->subtype == QPNP_TM_SUBTYPE_GEN1
321		? chip->stage : alarm_state_map[chip->stage];
322
323	if (stage)
324		chip->temp = qpnp_tm_decode_temp(chip, stage);
325
326	mutex_unlock(&chip->lock);
327
328	ret = thermal_zone_get_crit_temp(chip->tz_dev, &crit_temp);
329	if (ret)
330		crit_temp = THERMAL_TEMP_INVALID;
331
332	mutex_lock(&chip->lock);
333
334	ret = qpnp_tm_update_critical_trip_temp(chip, crit_temp);
335	if (ret < 0)
336		goto out;
337
338	/* Enable the thermal alarm PMIC module in always-on mode. */
339	reg = ALARM_CTRL_FORCE_ENABLE;
340	ret = qpnp_tm_write(chip, QPNP_TM_REG_ALARM_CTRL, reg);
341
342	chip->initialized = true;
343
344out:
345	mutex_unlock(&chip->lock);
346	return ret;
347}
348
349static int qpnp_tm_probe(struct platform_device *pdev)
350{
351	struct qpnp_tm_chip *chip;
352	struct device_node *node;
353	u8 type, subtype, dig_major;
354	u32 res;
355	int ret, irq;
356
357	node = pdev->dev.of_node;
358
359	chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
360	if (!chip)
361		return -ENOMEM;
362
363	dev_set_drvdata(&pdev->dev, chip);
364	chip->dev = &pdev->dev;
365
366	mutex_init(&chip->lock);
367
368	chip->map = dev_get_regmap(pdev->dev.parent, NULL);
369	if (!chip->map)
370		return -ENXIO;
371
372	ret = of_property_read_u32(node, "reg", &res);
373	if (ret < 0)
374		return ret;
375
376	irq = platform_get_irq(pdev, 0);
377	if (irq < 0)
378		return irq;
379
380	/* ADC based measurements are optional */
381	chip->adc = devm_iio_channel_get(&pdev->dev, "thermal");
382	if (IS_ERR(chip->adc)) {
383		ret = PTR_ERR(chip->adc);
384		chip->adc = NULL;
385		if (ret == -EPROBE_DEFER)
386			return ret;
387	}
388
389	chip->base = res;
390
391	ret = qpnp_tm_read(chip, QPNP_TM_REG_TYPE, &type);
392	if (ret < 0)
393		return dev_err_probe(&pdev->dev, ret,
394				     "could not read type\n");
395
396	ret = qpnp_tm_read(chip, QPNP_TM_REG_SUBTYPE, &subtype);
397	if (ret < 0)
398		return dev_err_probe(&pdev->dev, ret,
399				     "could not read subtype\n");
400
401	ret = qpnp_tm_read(chip, QPNP_TM_REG_DIG_MAJOR, &dig_major);
402	if (ret < 0)
403		return dev_err_probe(&pdev->dev, ret,
404				     "could not read dig_major\n");
405
406	if (type != QPNP_TM_TYPE || (subtype != QPNP_TM_SUBTYPE_GEN1
407				     && subtype != QPNP_TM_SUBTYPE_GEN2)) {
408		dev_err(&pdev->dev, "invalid type 0x%02x or subtype 0x%02x\n",
409			type, subtype);
410		return -ENODEV;
411	}
412
413	chip->subtype = subtype;
414	if (subtype == QPNP_TM_SUBTYPE_GEN2 && dig_major >= 1)
415		chip->temp_map = &temp_map_gen2_v1;
416	else
417		chip->temp_map = &temp_map_gen1;
418
419	/*
420	 * Register the sensor before initializing the hardware to be able to
421	 * read the trip points. get_temp() returns the default temperature
422	 * before the hardware initialization is completed.
423	 */
424	chip->tz_dev = devm_thermal_of_zone_register(
425		&pdev->dev, 0, chip, &qpnp_tm_sensor_ops);
426	if (IS_ERR(chip->tz_dev))
427		return dev_err_probe(&pdev->dev, PTR_ERR(chip->tz_dev),
428				     "failed to register sensor\n");
429
430	ret = qpnp_tm_init(chip);
431	if (ret < 0)
432		return dev_err_probe(&pdev->dev, ret, "init failed\n");
433
434	devm_thermal_add_hwmon_sysfs(&pdev->dev, chip->tz_dev);
435
436	ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, qpnp_tm_isr,
437					IRQF_ONESHOT, node->name, chip);
438	if (ret < 0)
439		return ret;
440
441	thermal_zone_device_update(chip->tz_dev, THERMAL_EVENT_UNSPECIFIED);
442
443	return 0;
444}
445
446static const struct of_device_id qpnp_tm_match_table[] = {
447	{ .compatible = "qcom,spmi-temp-alarm" },
448	{ }
449};
450MODULE_DEVICE_TABLE(of, qpnp_tm_match_table);
451
452static struct platform_driver qpnp_tm_driver = {
453	.driver = {
454		.name = "spmi-temp-alarm",
455		.of_match_table = qpnp_tm_match_table,
456	},
457	.probe  = qpnp_tm_probe,
458};
459module_platform_driver(qpnp_tm_driver);
460
461MODULE_ALIAS("platform:spmi-temp-alarm");
462MODULE_DESCRIPTION("QPNP PMIC Temperature Alarm driver");
463MODULE_LICENSE("GPL v2");