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1/*
2 * xor offload engine api
3 *
4 * Copyright © 2006, Intel Corporation.
5 *
6 * Dan Williams <dan.j.williams@intel.com>
7 *
8 * with architecture considerations by:
9 * Neil Brown <neilb@suse.de>
10 * Jeff Garzik <jeff@garzik.org>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms and conditions of the GNU General Public License,
14 * version 2, as published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * more details.
20 *
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc.,
23 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
24 *
25 */
26#include <linux/kernel.h>
27#include <linux/interrupt.h>
28#include <linux/mm.h>
29#include <linux/dma-mapping.h>
30#include <linux/raid/xor.h>
31#include <linux/async_tx.h>
32
33/* do_async_xor - dma map the pages and perform the xor with an engine */
34static __async_inline struct dma_async_tx_descriptor *
35do_async_xor(struct dma_chan *chan, struct page *dest, struct page **src_list,
36 unsigned int offset, int src_cnt, size_t len, dma_addr_t *dma_src,
37 struct async_submit_ctl *submit)
38{
39 struct dma_device *dma = chan->device;
40 struct dma_async_tx_descriptor *tx = NULL;
41 int src_off = 0;
42 int i;
43 dma_async_tx_callback cb_fn_orig = submit->cb_fn;
44 void *cb_param_orig = submit->cb_param;
45 enum async_tx_flags flags_orig = submit->flags;
46 enum dma_ctrl_flags dma_flags;
47 int xor_src_cnt = 0;
48 dma_addr_t dma_dest;
49
50 /* map the dest bidrectional in case it is re-used as a source */
51 dma_dest = dma_map_page(dma->dev, dest, offset, len, DMA_BIDIRECTIONAL);
52 for (i = 0; i < src_cnt; i++) {
53 /* only map the dest once */
54 if (!src_list[i])
55 continue;
56 if (unlikely(src_list[i] == dest)) {
57 dma_src[xor_src_cnt++] = dma_dest;
58 continue;
59 }
60 dma_src[xor_src_cnt++] = dma_map_page(dma->dev, src_list[i], offset,
61 len, DMA_TO_DEVICE);
62 }
63 src_cnt = xor_src_cnt;
64
65 while (src_cnt) {
66 submit->flags = flags_orig;
67 dma_flags = 0;
68 xor_src_cnt = min(src_cnt, (int)dma->max_xor);
69 /* if we are submitting additional xors, leave the chain open,
70 * clear the callback parameters, and leave the destination
71 * buffer mapped
72 */
73 if (src_cnt > xor_src_cnt) {
74 submit->flags &= ~ASYNC_TX_ACK;
75 submit->flags |= ASYNC_TX_FENCE;
76 dma_flags = DMA_COMPL_SKIP_DEST_UNMAP;
77 submit->cb_fn = NULL;
78 submit->cb_param = NULL;
79 } else {
80 submit->cb_fn = cb_fn_orig;
81 submit->cb_param = cb_param_orig;
82 }
83 if (submit->cb_fn)
84 dma_flags |= DMA_PREP_INTERRUPT;
85 if (submit->flags & ASYNC_TX_FENCE)
86 dma_flags |= DMA_PREP_FENCE;
87 /* Since we have clobbered the src_list we are committed
88 * to doing this asynchronously. Drivers force forward progress
89 * in case they can not provide a descriptor
90 */
91 tx = dma->device_prep_dma_xor(chan, dma_dest, &dma_src[src_off],
92 xor_src_cnt, len, dma_flags);
93
94 if (unlikely(!tx))
95 async_tx_quiesce(&submit->depend_tx);
96
97 /* spin wait for the preceding transactions to complete */
98 while (unlikely(!tx)) {
99 dma_async_issue_pending(chan);
100 tx = dma->device_prep_dma_xor(chan, dma_dest,
101 &dma_src[src_off],
102 xor_src_cnt, len,
103 dma_flags);
104 }
105
106 async_tx_submit(chan, tx, submit);
107 submit->depend_tx = tx;
108
109 if (src_cnt > xor_src_cnt) {
110 /* drop completed sources */
111 src_cnt -= xor_src_cnt;
112 src_off += xor_src_cnt;
113
114 /* use the intermediate result a source */
115 dma_src[--src_off] = dma_dest;
116 src_cnt++;
117 } else
118 break;
119 }
120
121 return tx;
122}
123
124static void
125do_sync_xor(struct page *dest, struct page **src_list, unsigned int offset,
126 int src_cnt, size_t len, struct async_submit_ctl *submit)
127{
128 int i;
129 int xor_src_cnt = 0;
130 int src_off = 0;
131 void *dest_buf;
132 void **srcs;
133
134 if (submit->scribble)
135 srcs = submit->scribble;
136 else
137 srcs = (void **) src_list;
138
139 /* convert to buffer pointers */
140 for (i = 0; i < src_cnt; i++)
141 if (src_list[i])
142 srcs[xor_src_cnt++] = page_address(src_list[i]) + offset;
143 src_cnt = xor_src_cnt;
144 /* set destination address */
145 dest_buf = page_address(dest) + offset;
146
147 if (submit->flags & ASYNC_TX_XOR_ZERO_DST)
148 memset(dest_buf, 0, len);
149
150 while (src_cnt > 0) {
151 /* process up to 'MAX_XOR_BLOCKS' sources */
152 xor_src_cnt = min(src_cnt, MAX_XOR_BLOCKS);
153 xor_blocks(xor_src_cnt, len, dest_buf, &srcs[src_off]);
154
155 /* drop completed sources */
156 src_cnt -= xor_src_cnt;
157 src_off += xor_src_cnt;
158 }
159
160 async_tx_sync_epilog(submit);
161}
162
163/**
164 * async_xor - attempt to xor a set of blocks with a dma engine.
165 * @dest: destination page
166 * @src_list: array of source pages
167 * @offset: common src/dst offset to start transaction
168 * @src_cnt: number of source pages
169 * @len: length in bytes
170 * @submit: submission / completion modifiers
171 *
172 * honored flags: ASYNC_TX_ACK, ASYNC_TX_XOR_ZERO_DST, ASYNC_TX_XOR_DROP_DST
173 *
174 * xor_blocks always uses the dest as a source so the
175 * ASYNC_TX_XOR_ZERO_DST flag must be set to not include dest data in
176 * the calculation. The assumption with dma eninges is that they only
177 * use the destination buffer as a source when it is explicity specified
178 * in the source list.
179 *
180 * src_list note: if the dest is also a source it must be at index zero.
181 * The contents of this array will be overwritten if a scribble region
182 * is not specified.
183 */
184struct dma_async_tx_descriptor *
185async_xor(struct page *dest, struct page **src_list, unsigned int offset,
186 int src_cnt, size_t len, struct async_submit_ctl *submit)
187{
188 struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR,
189 &dest, 1, src_list,
190 src_cnt, len);
191 dma_addr_t *dma_src = NULL;
192
193 BUG_ON(src_cnt <= 1);
194
195 if (submit->scribble)
196 dma_src = submit->scribble;
197 else if (sizeof(dma_addr_t) <= sizeof(struct page *))
198 dma_src = (dma_addr_t *) src_list;
199
200 if (dma_src && chan && is_dma_xor_aligned(chan->device, offset, 0, len)) {
201 /* run the xor asynchronously */
202 pr_debug("%s (async): len: %zu\n", __func__, len);
203
204 return do_async_xor(chan, dest, src_list, offset, src_cnt, len,
205 dma_src, submit);
206 } else {
207 /* run the xor synchronously */
208 pr_debug("%s (sync): len: %zu\n", __func__, len);
209 WARN_ONCE(chan, "%s: no space for dma address conversion\n",
210 __func__);
211
212 /* in the sync case the dest is an implied source
213 * (assumes the dest is the first source)
214 */
215 if (submit->flags & ASYNC_TX_XOR_DROP_DST) {
216 src_cnt--;
217 src_list++;
218 }
219
220 /* wait for any prerequisite operations */
221 async_tx_quiesce(&submit->depend_tx);
222
223 do_sync_xor(dest, src_list, offset, src_cnt, len, submit);
224
225 return NULL;
226 }
227}
228EXPORT_SYMBOL_GPL(async_xor);
229
230static int page_is_zero(struct page *p, unsigned int offset, size_t len)
231{
232 char *a = page_address(p) + offset;
233 return ((*(u32 *) a) == 0 &&
234 memcmp(a, a + 4, len - 4) == 0);
235}
236
237static inline struct dma_chan *
238xor_val_chan(struct async_submit_ctl *submit, struct page *dest,
239 struct page **src_list, int src_cnt, size_t len)
240{
241 #ifdef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
242 return NULL;
243 #endif
244 return async_tx_find_channel(submit, DMA_XOR_VAL, &dest, 1, src_list,
245 src_cnt, len);
246}
247
248/**
249 * async_xor_val - attempt a xor parity check with a dma engine.
250 * @dest: destination page used if the xor is performed synchronously
251 * @src_list: array of source pages
252 * @offset: offset in pages to start transaction
253 * @src_cnt: number of source pages
254 * @len: length in bytes
255 * @result: 0 if sum == 0 else non-zero
256 * @submit: submission / completion modifiers
257 *
258 * honored flags: ASYNC_TX_ACK
259 *
260 * src_list note: if the dest is also a source it must be at index zero.
261 * The contents of this array will be overwritten if a scribble region
262 * is not specified.
263 */
264struct dma_async_tx_descriptor *
265async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
266 int src_cnt, size_t len, enum sum_check_flags *result,
267 struct async_submit_ctl *submit)
268{
269 struct dma_chan *chan = xor_val_chan(submit, dest, src_list, src_cnt, len);
270 struct dma_device *device = chan ? chan->device : NULL;
271 struct dma_async_tx_descriptor *tx = NULL;
272 dma_addr_t *dma_src = NULL;
273
274 BUG_ON(src_cnt <= 1);
275
276 if (submit->scribble)
277 dma_src = submit->scribble;
278 else if (sizeof(dma_addr_t) <= sizeof(struct page *))
279 dma_src = (dma_addr_t *) src_list;
280
281 if (dma_src && device && src_cnt <= device->max_xor &&
282 is_dma_xor_aligned(device, offset, 0, len)) {
283 unsigned long dma_prep_flags = 0;
284 int i;
285
286 pr_debug("%s: (async) len: %zu\n", __func__, len);
287
288 if (submit->cb_fn)
289 dma_prep_flags |= DMA_PREP_INTERRUPT;
290 if (submit->flags & ASYNC_TX_FENCE)
291 dma_prep_flags |= DMA_PREP_FENCE;
292 for (i = 0; i < src_cnt; i++)
293 dma_src[i] = dma_map_page(device->dev, src_list[i],
294 offset, len, DMA_TO_DEVICE);
295
296 tx = device->device_prep_dma_xor_val(chan, dma_src, src_cnt,
297 len, result,
298 dma_prep_flags);
299 if (unlikely(!tx)) {
300 async_tx_quiesce(&submit->depend_tx);
301
302 while (!tx) {
303 dma_async_issue_pending(chan);
304 tx = device->device_prep_dma_xor_val(chan,
305 dma_src, src_cnt, len, result,
306 dma_prep_flags);
307 }
308 }
309
310 async_tx_submit(chan, tx, submit);
311 } else {
312 enum async_tx_flags flags_orig = submit->flags;
313
314 pr_debug("%s: (sync) len: %zu\n", __func__, len);
315 WARN_ONCE(device && src_cnt <= device->max_xor,
316 "%s: no space for dma address conversion\n",
317 __func__);
318
319 submit->flags |= ASYNC_TX_XOR_DROP_DST;
320 submit->flags &= ~ASYNC_TX_ACK;
321
322 tx = async_xor(dest, src_list, offset, src_cnt, len, submit);
323
324 async_tx_quiesce(&tx);
325
326 *result = !page_is_zero(dest, offset, len) << SUM_CHECK_P;
327
328 async_tx_sync_epilog(submit);
329 submit->flags = flags_orig;
330 }
331
332 return tx;
333}
334EXPORT_SYMBOL_GPL(async_xor_val);
335
336MODULE_AUTHOR("Intel Corporation");
337MODULE_DESCRIPTION("asynchronous xor/xor-zero-sum api");
338MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * xor offload engine api
4 *
5 * Copyright © 2006, Intel Corporation.
6 *
7 * Dan Williams <dan.j.williams@intel.com>
8 *
9 * with architecture considerations by:
10 * Neil Brown <neilb@suse.de>
11 * Jeff Garzik <jeff@garzik.org>
12 */
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/module.h>
16#include <linux/mm.h>
17#include <linux/dma-mapping.h>
18#include <linux/raid/xor.h>
19#include <linux/async_tx.h>
20
21/* do_async_xor - dma map the pages and perform the xor with an engine */
22static __async_inline struct dma_async_tx_descriptor *
23do_async_xor(struct dma_chan *chan, struct dmaengine_unmap_data *unmap,
24 struct async_submit_ctl *submit)
25{
26 struct dma_device *dma = chan->device;
27 struct dma_async_tx_descriptor *tx = NULL;
28 dma_async_tx_callback cb_fn_orig = submit->cb_fn;
29 void *cb_param_orig = submit->cb_param;
30 enum async_tx_flags flags_orig = submit->flags;
31 enum dma_ctrl_flags dma_flags = 0;
32 int src_cnt = unmap->to_cnt;
33 int xor_src_cnt;
34 dma_addr_t dma_dest = unmap->addr[unmap->to_cnt];
35 dma_addr_t *src_list = unmap->addr;
36
37 while (src_cnt) {
38 dma_addr_t tmp;
39
40 submit->flags = flags_orig;
41 xor_src_cnt = min(src_cnt, (int)dma->max_xor);
42 /* if we are submitting additional xors, leave the chain open
43 * and clear the callback parameters
44 */
45 if (src_cnt > xor_src_cnt) {
46 submit->flags &= ~ASYNC_TX_ACK;
47 submit->flags |= ASYNC_TX_FENCE;
48 submit->cb_fn = NULL;
49 submit->cb_param = NULL;
50 } else {
51 submit->cb_fn = cb_fn_orig;
52 submit->cb_param = cb_param_orig;
53 }
54 if (submit->cb_fn)
55 dma_flags |= DMA_PREP_INTERRUPT;
56 if (submit->flags & ASYNC_TX_FENCE)
57 dma_flags |= DMA_PREP_FENCE;
58
59 /* Drivers force forward progress in case they can not provide a
60 * descriptor
61 */
62 tmp = src_list[0];
63 if (src_list > unmap->addr)
64 src_list[0] = dma_dest;
65 tx = dma->device_prep_dma_xor(chan, dma_dest, src_list,
66 xor_src_cnt, unmap->len,
67 dma_flags);
68
69 if (unlikely(!tx))
70 async_tx_quiesce(&submit->depend_tx);
71
72 /* spin wait for the preceding transactions to complete */
73 while (unlikely(!tx)) {
74 dma_async_issue_pending(chan);
75 tx = dma->device_prep_dma_xor(chan, dma_dest,
76 src_list,
77 xor_src_cnt, unmap->len,
78 dma_flags);
79 }
80 src_list[0] = tmp;
81
82 dma_set_unmap(tx, unmap);
83 async_tx_submit(chan, tx, submit);
84 submit->depend_tx = tx;
85
86 if (src_cnt > xor_src_cnt) {
87 /* drop completed sources */
88 src_cnt -= xor_src_cnt;
89 /* use the intermediate result a source */
90 src_cnt++;
91 src_list += xor_src_cnt - 1;
92 } else
93 break;
94 }
95
96 return tx;
97}
98
99static void
100do_sync_xor_offs(struct page *dest, unsigned int offset,
101 struct page **src_list, unsigned int *src_offs,
102 int src_cnt, size_t len, struct async_submit_ctl *submit)
103{
104 int i;
105 int xor_src_cnt = 0;
106 int src_off = 0;
107 void *dest_buf;
108 void **srcs;
109
110 if (submit->scribble)
111 srcs = submit->scribble;
112 else
113 srcs = (void **) src_list;
114
115 /* convert to buffer pointers */
116 for (i = 0; i < src_cnt; i++)
117 if (src_list[i])
118 srcs[xor_src_cnt++] = page_address(src_list[i]) +
119 (src_offs ? src_offs[i] : offset);
120 src_cnt = xor_src_cnt;
121 /* set destination address */
122 dest_buf = page_address(dest) + offset;
123
124 if (submit->flags & ASYNC_TX_XOR_ZERO_DST)
125 memset(dest_buf, 0, len);
126
127 while (src_cnt > 0) {
128 /* process up to 'MAX_XOR_BLOCKS' sources */
129 xor_src_cnt = min(src_cnt, MAX_XOR_BLOCKS);
130 xor_blocks(xor_src_cnt, len, dest_buf, &srcs[src_off]);
131
132 /* drop completed sources */
133 src_cnt -= xor_src_cnt;
134 src_off += xor_src_cnt;
135 }
136
137 async_tx_sync_epilog(submit);
138}
139
140static inline bool
141dma_xor_aligned_offsets(struct dma_device *device, unsigned int offset,
142 unsigned int *src_offs, int src_cnt, int len)
143{
144 int i;
145
146 if (!is_dma_xor_aligned(device, offset, 0, len))
147 return false;
148
149 if (!src_offs)
150 return true;
151
152 for (i = 0; i < src_cnt; i++) {
153 if (!is_dma_xor_aligned(device, src_offs[i], 0, len))
154 return false;
155 }
156 return true;
157}
158
159/**
160 * async_xor_offs - attempt to xor a set of blocks with a dma engine.
161 * @dest: destination page
162 * @offset: dst offset to start transaction
163 * @src_list: array of source pages
164 * @src_offs: array of source pages offset, NULL means common src/dst offset
165 * @src_cnt: number of source pages
166 * @len: length in bytes
167 * @submit: submission / completion modifiers
168 *
169 * honored flags: ASYNC_TX_ACK, ASYNC_TX_XOR_ZERO_DST, ASYNC_TX_XOR_DROP_DST
170 *
171 * xor_blocks always uses the dest as a source so the
172 * ASYNC_TX_XOR_ZERO_DST flag must be set to not include dest data in
173 * the calculation. The assumption with dma engines is that they only
174 * use the destination buffer as a source when it is explicitly specified
175 * in the source list.
176 *
177 * src_list note: if the dest is also a source it must be at index zero.
178 * The contents of this array will be overwritten if a scribble region
179 * is not specified.
180 */
181struct dma_async_tx_descriptor *
182async_xor_offs(struct page *dest, unsigned int offset,
183 struct page **src_list, unsigned int *src_offs,
184 int src_cnt, size_t len, struct async_submit_ctl *submit)
185{
186 struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR,
187 &dest, 1, src_list,
188 src_cnt, len);
189 struct dma_device *device = chan ? chan->device : NULL;
190 struct dmaengine_unmap_data *unmap = NULL;
191
192 BUG_ON(src_cnt <= 1);
193
194 if (device)
195 unmap = dmaengine_get_unmap_data(device->dev, src_cnt+1, GFP_NOWAIT);
196
197 if (unmap && dma_xor_aligned_offsets(device, offset,
198 src_offs, src_cnt, len)) {
199 struct dma_async_tx_descriptor *tx;
200 int i, j;
201
202 /* run the xor asynchronously */
203 pr_debug("%s (async): len: %zu\n", __func__, len);
204
205 unmap->len = len;
206 for (i = 0, j = 0; i < src_cnt; i++) {
207 if (!src_list[i])
208 continue;
209 unmap->to_cnt++;
210 unmap->addr[j++] = dma_map_page(device->dev, src_list[i],
211 src_offs ? src_offs[i] : offset,
212 len, DMA_TO_DEVICE);
213 }
214
215 /* map it bidirectional as it may be re-used as a source */
216 unmap->addr[j] = dma_map_page(device->dev, dest, offset, len,
217 DMA_BIDIRECTIONAL);
218 unmap->bidi_cnt = 1;
219
220 tx = do_async_xor(chan, unmap, submit);
221 dmaengine_unmap_put(unmap);
222 return tx;
223 } else {
224 dmaengine_unmap_put(unmap);
225 /* run the xor synchronously */
226 pr_debug("%s (sync): len: %zu\n", __func__, len);
227 WARN_ONCE(chan, "%s: no space for dma address conversion\n",
228 __func__);
229
230 /* in the sync case the dest is an implied source
231 * (assumes the dest is the first source)
232 */
233 if (submit->flags & ASYNC_TX_XOR_DROP_DST) {
234 src_cnt--;
235 src_list++;
236 if (src_offs)
237 src_offs++;
238 }
239
240 /* wait for any prerequisite operations */
241 async_tx_quiesce(&submit->depend_tx);
242
243 do_sync_xor_offs(dest, offset, src_list, src_offs,
244 src_cnt, len, submit);
245
246 return NULL;
247 }
248}
249EXPORT_SYMBOL_GPL(async_xor_offs);
250
251/**
252 * async_xor - attempt to xor a set of blocks with a dma engine.
253 * @dest: destination page
254 * @src_list: array of source pages
255 * @offset: common src/dst offset to start transaction
256 * @src_cnt: number of source pages
257 * @len: length in bytes
258 * @submit: submission / completion modifiers
259 *
260 * honored flags: ASYNC_TX_ACK, ASYNC_TX_XOR_ZERO_DST, ASYNC_TX_XOR_DROP_DST
261 *
262 * xor_blocks always uses the dest as a source so the
263 * ASYNC_TX_XOR_ZERO_DST flag must be set to not include dest data in
264 * the calculation. The assumption with dma engines is that they only
265 * use the destination buffer as a source when it is explicitly specified
266 * in the source list.
267 *
268 * src_list note: if the dest is also a source it must be at index zero.
269 * The contents of this array will be overwritten if a scribble region
270 * is not specified.
271 */
272struct dma_async_tx_descriptor *
273async_xor(struct page *dest, struct page **src_list, unsigned int offset,
274 int src_cnt, size_t len, struct async_submit_ctl *submit)
275{
276 return async_xor_offs(dest, offset, src_list, NULL,
277 src_cnt, len, submit);
278}
279EXPORT_SYMBOL_GPL(async_xor);
280
281static int page_is_zero(struct page *p, unsigned int offset, size_t len)
282{
283 return !memchr_inv(page_address(p) + offset, 0, len);
284}
285
286static inline struct dma_chan *
287xor_val_chan(struct async_submit_ctl *submit, struct page *dest,
288 struct page **src_list, int src_cnt, size_t len)
289{
290 #ifdef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
291 return NULL;
292 #endif
293 return async_tx_find_channel(submit, DMA_XOR_VAL, &dest, 1, src_list,
294 src_cnt, len);
295}
296
297/**
298 * async_xor_val_offs - attempt a xor parity check with a dma engine.
299 * @dest: destination page used if the xor is performed synchronously
300 * @offset: des offset in pages to start transaction
301 * @src_list: array of source pages
302 * @src_offs: array of source pages offset, NULL means common src/det offset
303 * @src_cnt: number of source pages
304 * @len: length in bytes
305 * @result: 0 if sum == 0 else non-zero
306 * @submit: submission / completion modifiers
307 *
308 * honored flags: ASYNC_TX_ACK
309 *
310 * src_list note: if the dest is also a source it must be at index zero.
311 * The contents of this array will be overwritten if a scribble region
312 * is not specified.
313 */
314struct dma_async_tx_descriptor *
315async_xor_val_offs(struct page *dest, unsigned int offset,
316 struct page **src_list, unsigned int *src_offs,
317 int src_cnt, size_t len, enum sum_check_flags *result,
318 struct async_submit_ctl *submit)
319{
320 struct dma_chan *chan = xor_val_chan(submit, dest, src_list, src_cnt, len);
321 struct dma_device *device = chan ? chan->device : NULL;
322 struct dma_async_tx_descriptor *tx = NULL;
323 struct dmaengine_unmap_data *unmap = NULL;
324
325 BUG_ON(src_cnt <= 1);
326
327 if (device)
328 unmap = dmaengine_get_unmap_data(device->dev, src_cnt, GFP_NOWAIT);
329
330 if (unmap && src_cnt <= device->max_xor &&
331 dma_xor_aligned_offsets(device, offset, src_offs, src_cnt, len)) {
332 unsigned long dma_prep_flags = 0;
333 int i;
334
335 pr_debug("%s: (async) len: %zu\n", __func__, len);
336
337 if (submit->cb_fn)
338 dma_prep_flags |= DMA_PREP_INTERRUPT;
339 if (submit->flags & ASYNC_TX_FENCE)
340 dma_prep_flags |= DMA_PREP_FENCE;
341
342 for (i = 0; i < src_cnt; i++) {
343 unmap->addr[i] = dma_map_page(device->dev, src_list[i],
344 src_offs ? src_offs[i] : offset,
345 len, DMA_TO_DEVICE);
346 unmap->to_cnt++;
347 }
348 unmap->len = len;
349
350 tx = device->device_prep_dma_xor_val(chan, unmap->addr, src_cnt,
351 len, result,
352 dma_prep_flags);
353 if (unlikely(!tx)) {
354 async_tx_quiesce(&submit->depend_tx);
355
356 while (!tx) {
357 dma_async_issue_pending(chan);
358 tx = device->device_prep_dma_xor_val(chan,
359 unmap->addr, src_cnt, len, result,
360 dma_prep_flags);
361 }
362 }
363 dma_set_unmap(tx, unmap);
364 async_tx_submit(chan, tx, submit);
365 } else {
366 enum async_tx_flags flags_orig = submit->flags;
367
368 pr_debug("%s: (sync) len: %zu\n", __func__, len);
369 WARN_ONCE(device && src_cnt <= device->max_xor,
370 "%s: no space for dma address conversion\n",
371 __func__);
372
373 submit->flags |= ASYNC_TX_XOR_DROP_DST;
374 submit->flags &= ~ASYNC_TX_ACK;
375
376 tx = async_xor_offs(dest, offset, src_list, src_offs,
377 src_cnt, len, submit);
378
379 async_tx_quiesce(&tx);
380
381 *result = !page_is_zero(dest, offset, len) << SUM_CHECK_P;
382
383 async_tx_sync_epilog(submit);
384 submit->flags = flags_orig;
385 }
386 dmaengine_unmap_put(unmap);
387
388 return tx;
389}
390EXPORT_SYMBOL_GPL(async_xor_val_offs);
391
392/**
393 * async_xor_val - attempt a xor parity check with a dma engine.
394 * @dest: destination page used if the xor is performed synchronously
395 * @src_list: array of source pages
396 * @offset: offset in pages to start transaction
397 * @src_cnt: number of source pages
398 * @len: length in bytes
399 * @result: 0 if sum == 0 else non-zero
400 * @submit: submission / completion modifiers
401 *
402 * honored flags: ASYNC_TX_ACK
403 *
404 * src_list note: if the dest is also a source it must be at index zero.
405 * The contents of this array will be overwritten if a scribble region
406 * is not specified.
407 */
408struct dma_async_tx_descriptor *
409async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
410 int src_cnt, size_t len, enum sum_check_flags *result,
411 struct async_submit_ctl *submit)
412{
413 return async_xor_val_offs(dest, offset, src_list, NULL, src_cnt,
414 len, result, submit);
415}
416EXPORT_SYMBOL_GPL(async_xor_val);
417
418MODULE_AUTHOR("Intel Corporation");
419MODULE_DESCRIPTION("asynchronous xor/xor-zero-sum api");
420MODULE_LICENSE("GPL");