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1/*
2 * Driver for CS4231 sound chips found on Sparcs.
3 * Copyright (C) 2002, 2008 David S. Miller <davem@davemloft.net>
4 *
5 * Based entirely upon drivers/sbus/audio/cs4231.c which is:
6 * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
7 * and also sound/isa/cs423x/cs4231_lib.c which is:
8 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
9 */
10
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/delay.h>
14#include <linux/init.h>
15#include <linux/interrupt.h>
16#include <linux/moduleparam.h>
17#include <linux/irq.h>
18#include <linux/io.h>
19#include <linux/of.h>
20#include <linux/of_device.h>
21
22#include <sound/core.h>
23#include <sound/pcm.h>
24#include <sound/info.h>
25#include <sound/control.h>
26#include <sound/timer.h>
27#include <sound/initval.h>
28#include <sound/pcm_params.h>
29
30#ifdef CONFIG_SBUS
31#define SBUS_SUPPORT
32#endif
33
34#if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
35#define EBUS_SUPPORT
36#include <linux/pci.h>
37#include <asm/ebus_dma.h>
38#endif
39
40static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
41static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
42/* Enable this card */
43static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
44
45module_param_array(index, int, NULL, 0444);
46MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
47module_param_array(id, charp, NULL, 0444);
48MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
49module_param_array(enable, bool, NULL, 0444);
50MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
51MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
52MODULE_DESCRIPTION("Sun CS4231");
53MODULE_LICENSE("GPL");
54MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
55
56#ifdef SBUS_SUPPORT
57struct sbus_dma_info {
58 spinlock_t lock; /* DMA access lock */
59 int dir;
60 void __iomem *regs;
61};
62#endif
63
64struct snd_cs4231;
65struct cs4231_dma_control {
66 void (*prepare)(struct cs4231_dma_control *dma_cont,
67 int dir);
68 void (*enable)(struct cs4231_dma_control *dma_cont, int on);
69 int (*request)(struct cs4231_dma_control *dma_cont,
70 dma_addr_t bus_addr, size_t len);
71 unsigned int (*address)(struct cs4231_dma_control *dma_cont);
72#ifdef EBUS_SUPPORT
73 struct ebus_dma_info ebus_info;
74#endif
75#ifdef SBUS_SUPPORT
76 struct sbus_dma_info sbus_info;
77#endif
78};
79
80struct snd_cs4231 {
81 spinlock_t lock; /* registers access lock */
82 void __iomem *port;
83
84 struct cs4231_dma_control p_dma;
85 struct cs4231_dma_control c_dma;
86
87 u32 flags;
88#define CS4231_FLAG_EBUS 0x00000001
89#define CS4231_FLAG_PLAYBACK 0x00000002
90#define CS4231_FLAG_CAPTURE 0x00000004
91
92 struct snd_card *card;
93 struct snd_pcm *pcm;
94 struct snd_pcm_substream *playback_substream;
95 unsigned int p_periods_sent;
96 struct snd_pcm_substream *capture_substream;
97 unsigned int c_periods_sent;
98 struct snd_timer *timer;
99
100 unsigned short mode;
101#define CS4231_MODE_NONE 0x0000
102#define CS4231_MODE_PLAY 0x0001
103#define CS4231_MODE_RECORD 0x0002
104#define CS4231_MODE_TIMER 0x0004
105#define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \
106 CS4231_MODE_TIMER)
107
108 unsigned char image[32]; /* registers image */
109 int mce_bit;
110 int calibrate_mute;
111 struct mutex mce_mutex; /* mutex for mce register */
112 struct mutex open_mutex; /* mutex for ALSA open/close */
113
114 struct platform_device *op;
115 unsigned int irq[2];
116 unsigned int regs_size;
117 struct snd_cs4231 *next;
118};
119
120/* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
121 * now.... -DaveM
122 */
123
124/* IO ports */
125#include <sound/cs4231-regs.h>
126
127/* XXX offsets are different than PC ISA chips... */
128#define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2))
129
130/* SBUS DMA register defines. */
131
132#define APCCSR 0x10UL /* APC DMA CSR */
133#define APCCVA 0x20UL /* APC Capture DMA Address */
134#define APCCC 0x24UL /* APC Capture Count */
135#define APCCNVA 0x28UL /* APC Capture DMA Next Address */
136#define APCCNC 0x2cUL /* APC Capture Next Count */
137#define APCPVA 0x30UL /* APC Play DMA Address */
138#define APCPC 0x34UL /* APC Play Count */
139#define APCPNVA 0x38UL /* APC Play DMA Next Address */
140#define APCPNC 0x3cUL /* APC Play Next Count */
141
142/* Defines for SBUS DMA-routines */
143
144#define APCVA 0x0UL /* APC DMA Address */
145#define APCC 0x4UL /* APC Count */
146#define APCNVA 0x8UL /* APC DMA Next Address */
147#define APCNC 0xcUL /* APC Next Count */
148#define APC_PLAY 0x30UL /* Play registers start at 0x30 */
149#define APC_RECORD 0x20UL /* Record registers start at 0x20 */
150
151/* APCCSR bits */
152
153#define APC_INT_PENDING 0x800000 /* Interrupt Pending */
154#define APC_PLAY_INT 0x400000 /* Playback interrupt */
155#define APC_CAPT_INT 0x200000 /* Capture interrupt */
156#define APC_GENL_INT 0x100000 /* General interrupt */
157#define APC_XINT_ENA 0x80000 /* General ext int. enable */
158#define APC_XINT_PLAY 0x40000 /* Playback ext intr */
159#define APC_XINT_CAPT 0x20000 /* Capture ext intr */
160#define APC_XINT_GENL 0x10000 /* Error ext intr */
161#define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */
162#define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */
163#define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */
164#define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */
165#define APC_XINT_COVF 0x800 /* Cap data dropped on floor */
166#define APC_XINT_CNVA 0x400 /* Capture NVA dirty */
167#define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */
168#define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */
169#define APC_PPAUSE 0x80 /* Pause the play DMA */
170#define APC_CPAUSE 0x40 /* Pause the capture DMA */
171#define APC_CDC_RESET 0x20 /* CODEC RESET */
172#define APC_PDMA_READY 0x08 /* Play DMA Go */
173#define APC_CDMA_READY 0x04 /* Capture DMA Go */
174#define APC_CHIP_RESET 0x01 /* Reset the chip */
175
176/* EBUS DMA register offsets */
177
178#define EBDMA_CSR 0x00UL /* Control/Status */
179#define EBDMA_ADDR 0x04UL /* DMA Address */
180#define EBDMA_COUNT 0x08UL /* DMA Count */
181
182/*
183 * Some variables
184 */
185
186static unsigned char freq_bits[14] = {
187 /* 5510 */ 0x00 | CS4231_XTAL2,
188 /* 6620 */ 0x0E | CS4231_XTAL2,
189 /* 8000 */ 0x00 | CS4231_XTAL1,
190 /* 9600 */ 0x0E | CS4231_XTAL1,
191 /* 11025 */ 0x02 | CS4231_XTAL2,
192 /* 16000 */ 0x02 | CS4231_XTAL1,
193 /* 18900 */ 0x04 | CS4231_XTAL2,
194 /* 22050 */ 0x06 | CS4231_XTAL2,
195 /* 27042 */ 0x04 | CS4231_XTAL1,
196 /* 32000 */ 0x06 | CS4231_XTAL1,
197 /* 33075 */ 0x0C | CS4231_XTAL2,
198 /* 37800 */ 0x08 | CS4231_XTAL2,
199 /* 44100 */ 0x0A | CS4231_XTAL2,
200 /* 48000 */ 0x0C | CS4231_XTAL1
201};
202
203static unsigned int rates[14] = {
204 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
205 27042, 32000, 33075, 37800, 44100, 48000
206};
207
208static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
209 .count = ARRAY_SIZE(rates),
210 .list = rates,
211};
212
213static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
214{
215 return snd_pcm_hw_constraint_list(runtime, 0,
216 SNDRV_PCM_HW_PARAM_RATE,
217 &hw_constraints_rates);
218}
219
220static unsigned char snd_cs4231_original_image[32] =
221{
222 0x00, /* 00/00 - lic */
223 0x00, /* 01/01 - ric */
224 0x9f, /* 02/02 - la1ic */
225 0x9f, /* 03/03 - ra1ic */
226 0x9f, /* 04/04 - la2ic */
227 0x9f, /* 05/05 - ra2ic */
228 0xbf, /* 06/06 - loc */
229 0xbf, /* 07/07 - roc */
230 0x20, /* 08/08 - pdfr */
231 CS4231_AUTOCALIB, /* 09/09 - ic */
232 0x00, /* 0a/10 - pc */
233 0x00, /* 0b/11 - ti */
234 CS4231_MODE2, /* 0c/12 - mi */
235 0x00, /* 0d/13 - lbc */
236 0x00, /* 0e/14 - pbru */
237 0x00, /* 0f/15 - pbrl */
238 0x80, /* 10/16 - afei */
239 0x01, /* 11/17 - afeii */
240 0x9f, /* 12/18 - llic */
241 0x9f, /* 13/19 - rlic */
242 0x00, /* 14/20 - tlb */
243 0x00, /* 15/21 - thb */
244 0x00, /* 16/22 - la3mic/reserved */
245 0x00, /* 17/23 - ra3mic/reserved */
246 0x00, /* 18/24 - afs */
247 0x00, /* 19/25 - lamoc/version */
248 0x00, /* 1a/26 - mioc */
249 0x00, /* 1b/27 - ramoc/reserved */
250 0x20, /* 1c/28 - cdfr */
251 0x00, /* 1d/29 - res4 */
252 0x00, /* 1e/30 - cbru */
253 0x00, /* 1f/31 - cbrl */
254};
255
256static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr)
257{
258 if (cp->flags & CS4231_FLAG_EBUS)
259 return readb(reg_addr);
260 else
261 return sbus_readb(reg_addr);
262}
263
264static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val,
265 void __iomem *reg_addr)
266{
267 if (cp->flags & CS4231_FLAG_EBUS)
268 return writeb(val, reg_addr);
269 else
270 return sbus_writeb(val, reg_addr);
271}
272
273/*
274 * Basic I/O functions
275 */
276
277static void snd_cs4231_ready(struct snd_cs4231 *chip)
278{
279 int timeout;
280
281 for (timeout = 250; timeout > 0; timeout--) {
282 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
283 if ((val & CS4231_INIT) == 0)
284 break;
285 udelay(100);
286 }
287}
288
289static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg,
290 unsigned char value)
291{
292 snd_cs4231_ready(chip);
293#ifdef CONFIG_SND_DEBUG
294 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
295 snd_printdd("out: auto calibration time out - reg = 0x%x, "
296 "value = 0x%x\n",
297 reg, value);
298#endif
299 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
300 wmb();
301 __cs4231_writeb(chip, value, CS4231U(chip, REG));
302 mb();
303}
304
305static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
306 unsigned char mask, unsigned char value)
307{
308 unsigned char tmp = (chip->image[reg] & mask) | value;
309
310 chip->image[reg] = tmp;
311 if (!chip->calibrate_mute)
312 snd_cs4231_dout(chip, reg, tmp);
313}
314
315static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg,
316 unsigned char value)
317{
318 snd_cs4231_dout(chip, reg, value);
319 chip->image[reg] = value;
320 mb();
321}
322
323static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
324{
325 snd_cs4231_ready(chip);
326#ifdef CONFIG_SND_DEBUG
327 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
328 snd_printdd("in: auto calibration time out - reg = 0x%x\n",
329 reg);
330#endif
331 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
332 mb();
333 return __cs4231_readb(chip, CS4231U(chip, REG));
334}
335
336/*
337 * CS4231 detection / MCE routines
338 */
339
340static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
341{
342 int timeout;
343
344 /* looks like this sequence is proper for CS4231A chip (GUS MAX) */
345 for (timeout = 5; timeout > 0; timeout--)
346 __cs4231_readb(chip, CS4231U(chip, REGSEL));
347
348 /* end of cleanup sequence */
349 for (timeout = 500; timeout > 0; timeout--) {
350 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
351 if ((val & CS4231_INIT) == 0)
352 break;
353 msleep(1);
354 }
355}
356
357static void snd_cs4231_mce_up(struct snd_cs4231 *chip)
358{
359 unsigned long flags;
360 int timeout;
361
362 spin_lock_irqsave(&chip->lock, flags);
363 snd_cs4231_ready(chip);
364#ifdef CONFIG_SND_DEBUG
365 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
366 snd_printdd("mce_up - auto calibration time out (0)\n");
367#endif
368 chip->mce_bit |= CS4231_MCE;
369 timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL));
370 if (timeout == 0x80)
371 snd_printdd("mce_up [%p]: serious init problem - "
372 "codec still busy\n",
373 chip->port);
374 if (!(timeout & CS4231_MCE))
375 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f),
376 CS4231U(chip, REGSEL));
377 spin_unlock_irqrestore(&chip->lock, flags);
378}
379
380static void snd_cs4231_mce_down(struct snd_cs4231 *chip)
381{
382 unsigned long flags, timeout;
383 int reg;
384
385 snd_cs4231_busy_wait(chip);
386 spin_lock_irqsave(&chip->lock, flags);
387#ifdef CONFIG_SND_DEBUG
388 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
389 snd_printdd("mce_down [%p] - auto calibration time out (0)\n",
390 CS4231U(chip, REGSEL));
391#endif
392 chip->mce_bit &= ~CS4231_MCE;
393 reg = __cs4231_readb(chip, CS4231U(chip, REGSEL));
394 __cs4231_writeb(chip, chip->mce_bit | (reg & 0x1f),
395 CS4231U(chip, REGSEL));
396 if (reg == 0x80)
397 snd_printdd("mce_down [%p]: serious init problem "
398 "- codec still busy\n", chip->port);
399 if ((reg & CS4231_MCE) == 0) {
400 spin_unlock_irqrestore(&chip->lock, flags);
401 return;
402 }
403
404 /*
405 * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low.
406 */
407 timeout = jiffies + msecs_to_jiffies(250);
408 do {
409 spin_unlock_irqrestore(&chip->lock, flags);
410 msleep(1);
411 spin_lock_irqsave(&chip->lock, flags);
412 reg = snd_cs4231_in(chip, CS4231_TEST_INIT);
413 reg &= CS4231_CALIB_IN_PROGRESS;
414 } while (reg && time_before(jiffies, timeout));
415 spin_unlock_irqrestore(&chip->lock, flags);
416
417 if (reg)
418 snd_printk(KERN_ERR
419 "mce_down - auto calibration time out (2)\n");
420}
421
422static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont,
423 struct snd_pcm_substream *substream,
424 unsigned int *periods_sent)
425{
426 struct snd_pcm_runtime *runtime = substream->runtime;
427
428 while (1) {
429 unsigned int period_size = snd_pcm_lib_period_bytes(substream);
430 unsigned int offset = period_size * (*periods_sent);
431
432 BUG_ON(period_size >= (1 << 24));
433
434 if (dma_cont->request(dma_cont,
435 runtime->dma_addr + offset, period_size))
436 return;
437 (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
438 }
439}
440
441static void cs4231_dma_trigger(struct snd_pcm_substream *substream,
442 unsigned int what, int on)
443{
444 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
445 struct cs4231_dma_control *dma_cont;
446
447 if (what & CS4231_PLAYBACK_ENABLE) {
448 dma_cont = &chip->p_dma;
449 if (on) {
450 dma_cont->prepare(dma_cont, 0);
451 dma_cont->enable(dma_cont, 1);
452 snd_cs4231_advance_dma(dma_cont,
453 chip->playback_substream,
454 &chip->p_periods_sent);
455 } else {
456 dma_cont->enable(dma_cont, 0);
457 }
458 }
459 if (what & CS4231_RECORD_ENABLE) {
460 dma_cont = &chip->c_dma;
461 if (on) {
462 dma_cont->prepare(dma_cont, 1);
463 dma_cont->enable(dma_cont, 1);
464 snd_cs4231_advance_dma(dma_cont,
465 chip->capture_substream,
466 &chip->c_periods_sent);
467 } else {
468 dma_cont->enable(dma_cont, 0);
469 }
470 }
471}
472
473static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd)
474{
475 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
476 int result = 0;
477
478 switch (cmd) {
479 case SNDRV_PCM_TRIGGER_START:
480 case SNDRV_PCM_TRIGGER_STOP:
481 {
482 unsigned int what = 0;
483 struct snd_pcm_substream *s;
484 unsigned long flags;
485
486 snd_pcm_group_for_each_entry(s, substream) {
487 if (s == chip->playback_substream) {
488 what |= CS4231_PLAYBACK_ENABLE;
489 snd_pcm_trigger_done(s, substream);
490 } else if (s == chip->capture_substream) {
491 what |= CS4231_RECORD_ENABLE;
492 snd_pcm_trigger_done(s, substream);
493 }
494 }
495
496 spin_lock_irqsave(&chip->lock, flags);
497 if (cmd == SNDRV_PCM_TRIGGER_START) {
498 cs4231_dma_trigger(substream, what, 1);
499 chip->image[CS4231_IFACE_CTRL] |= what;
500 } else {
501 cs4231_dma_trigger(substream, what, 0);
502 chip->image[CS4231_IFACE_CTRL] &= ~what;
503 }
504 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
505 chip->image[CS4231_IFACE_CTRL]);
506 spin_unlock_irqrestore(&chip->lock, flags);
507 break;
508 }
509 default:
510 result = -EINVAL;
511 break;
512 }
513
514 return result;
515}
516
517/*
518 * CODEC I/O
519 */
520
521static unsigned char snd_cs4231_get_rate(unsigned int rate)
522{
523 int i;
524
525 for (i = 0; i < 14; i++)
526 if (rate == rates[i])
527 return freq_bits[i];
528
529 return freq_bits[13];
530}
531
532static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format,
533 int channels)
534{
535 unsigned char rformat;
536
537 rformat = CS4231_LINEAR_8;
538 switch (format) {
539 case SNDRV_PCM_FORMAT_MU_LAW:
540 rformat = CS4231_ULAW_8;
541 break;
542 case SNDRV_PCM_FORMAT_A_LAW:
543 rformat = CS4231_ALAW_8;
544 break;
545 case SNDRV_PCM_FORMAT_S16_LE:
546 rformat = CS4231_LINEAR_16;
547 break;
548 case SNDRV_PCM_FORMAT_S16_BE:
549 rformat = CS4231_LINEAR_16_BIG;
550 break;
551 case SNDRV_PCM_FORMAT_IMA_ADPCM:
552 rformat = CS4231_ADPCM_16;
553 break;
554 }
555 if (channels > 1)
556 rformat |= CS4231_STEREO;
557 return rformat;
558}
559
560static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
561{
562 unsigned long flags;
563
564 mute = mute ? 1 : 0;
565 spin_lock_irqsave(&chip->lock, flags);
566 if (chip->calibrate_mute == mute) {
567 spin_unlock_irqrestore(&chip->lock, flags);
568 return;
569 }
570 if (!mute) {
571 snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
572 chip->image[CS4231_LEFT_INPUT]);
573 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
574 chip->image[CS4231_RIGHT_INPUT]);
575 snd_cs4231_dout(chip, CS4231_LOOPBACK,
576 chip->image[CS4231_LOOPBACK]);
577 }
578 snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
579 mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
580 snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
581 mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
582 snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
583 mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
584 snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
585 mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
586 snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
587 mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
588 snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
589 mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
590 snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
591 mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
592 snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
593 mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
594 snd_cs4231_dout(chip, CS4231_MONO_CTRL,
595 mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
596 chip->calibrate_mute = mute;
597 spin_unlock_irqrestore(&chip->lock, flags);
598}
599
600static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
601 struct snd_pcm_hw_params *params,
602 unsigned char pdfr)
603{
604 unsigned long flags;
605
606 mutex_lock(&chip->mce_mutex);
607 snd_cs4231_calibrate_mute(chip, 1);
608
609 snd_cs4231_mce_up(chip);
610
611 spin_lock_irqsave(&chip->lock, flags);
612 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
613 (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
614 (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
615 pdfr);
616 spin_unlock_irqrestore(&chip->lock, flags);
617
618 snd_cs4231_mce_down(chip);
619
620 snd_cs4231_calibrate_mute(chip, 0);
621 mutex_unlock(&chip->mce_mutex);
622}
623
624static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
625 struct snd_pcm_hw_params *params,
626 unsigned char cdfr)
627{
628 unsigned long flags;
629
630 mutex_lock(&chip->mce_mutex);
631 snd_cs4231_calibrate_mute(chip, 1);
632
633 snd_cs4231_mce_up(chip);
634
635 spin_lock_irqsave(&chip->lock, flags);
636 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
637 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
638 ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
639 (cdfr & 0x0f));
640 spin_unlock_irqrestore(&chip->lock, flags);
641 snd_cs4231_mce_down(chip);
642 snd_cs4231_mce_up(chip);
643 spin_lock_irqsave(&chip->lock, flags);
644 }
645 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
646 spin_unlock_irqrestore(&chip->lock, flags);
647
648 snd_cs4231_mce_down(chip);
649
650 snd_cs4231_calibrate_mute(chip, 0);
651 mutex_unlock(&chip->mce_mutex);
652}
653
654/*
655 * Timer interface
656 */
657
658static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer)
659{
660 struct snd_cs4231 *chip = snd_timer_chip(timer);
661
662 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
663}
664
665static int snd_cs4231_timer_start(struct snd_timer *timer)
666{
667 unsigned long flags;
668 unsigned int ticks;
669 struct snd_cs4231 *chip = snd_timer_chip(timer);
670
671 spin_lock_irqsave(&chip->lock, flags);
672 ticks = timer->sticks;
673 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
674 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
675 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
676 snd_cs4231_out(chip, CS4231_TIMER_HIGH,
677 chip->image[CS4231_TIMER_HIGH] =
678 (unsigned char) (ticks >> 8));
679 snd_cs4231_out(chip, CS4231_TIMER_LOW,
680 chip->image[CS4231_TIMER_LOW] =
681 (unsigned char) ticks);
682 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
683 chip->image[CS4231_ALT_FEATURE_1] |
684 CS4231_TIMER_ENABLE);
685 }
686 spin_unlock_irqrestore(&chip->lock, flags);
687
688 return 0;
689}
690
691static int snd_cs4231_timer_stop(struct snd_timer *timer)
692{
693 unsigned long flags;
694 struct snd_cs4231 *chip = snd_timer_chip(timer);
695
696 spin_lock_irqsave(&chip->lock, flags);
697 chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE;
698 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
699 chip->image[CS4231_ALT_FEATURE_1]);
700 spin_unlock_irqrestore(&chip->lock, flags);
701
702 return 0;
703}
704
705static void __devinit snd_cs4231_init(struct snd_cs4231 *chip)
706{
707 unsigned long flags;
708
709 snd_cs4231_mce_down(chip);
710
711#ifdef SNDRV_DEBUG_MCE
712 snd_printdd("init: (1)\n");
713#endif
714 snd_cs4231_mce_up(chip);
715 spin_lock_irqsave(&chip->lock, flags);
716 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
717 CS4231_PLAYBACK_PIO |
718 CS4231_RECORD_ENABLE |
719 CS4231_RECORD_PIO |
720 CS4231_CALIB_MODE);
721 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
722 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
723 spin_unlock_irqrestore(&chip->lock, flags);
724 snd_cs4231_mce_down(chip);
725
726#ifdef SNDRV_DEBUG_MCE
727 snd_printdd("init: (2)\n");
728#endif
729
730 snd_cs4231_mce_up(chip);
731 spin_lock_irqsave(&chip->lock, flags);
732 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
733 chip->image[CS4231_ALT_FEATURE_1]);
734 spin_unlock_irqrestore(&chip->lock, flags);
735 snd_cs4231_mce_down(chip);
736
737#ifdef SNDRV_DEBUG_MCE
738 snd_printdd("init: (3) - afei = 0x%x\n",
739 chip->image[CS4231_ALT_FEATURE_1]);
740#endif
741
742 spin_lock_irqsave(&chip->lock, flags);
743 snd_cs4231_out(chip, CS4231_ALT_FEATURE_2,
744 chip->image[CS4231_ALT_FEATURE_2]);
745 spin_unlock_irqrestore(&chip->lock, flags);
746
747 snd_cs4231_mce_up(chip);
748 spin_lock_irqsave(&chip->lock, flags);
749 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
750 chip->image[CS4231_PLAYBK_FORMAT]);
751 spin_unlock_irqrestore(&chip->lock, flags);
752 snd_cs4231_mce_down(chip);
753
754#ifdef SNDRV_DEBUG_MCE
755 snd_printdd("init: (4)\n");
756#endif
757
758 snd_cs4231_mce_up(chip);
759 spin_lock_irqsave(&chip->lock, flags);
760 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
761 spin_unlock_irqrestore(&chip->lock, flags);
762 snd_cs4231_mce_down(chip);
763
764#ifdef SNDRV_DEBUG_MCE
765 snd_printdd("init: (5)\n");
766#endif
767}
768
769static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
770{
771 unsigned long flags;
772
773 mutex_lock(&chip->open_mutex);
774 if ((chip->mode & mode)) {
775 mutex_unlock(&chip->open_mutex);
776 return -EAGAIN;
777 }
778 if (chip->mode & CS4231_MODE_OPEN) {
779 chip->mode |= mode;
780 mutex_unlock(&chip->open_mutex);
781 return 0;
782 }
783 /* ok. now enable and ack CODEC IRQ */
784 spin_lock_irqsave(&chip->lock, flags);
785 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
786 CS4231_RECORD_IRQ |
787 CS4231_TIMER_IRQ);
788 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
789 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
790 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
791
792 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
793 CS4231_RECORD_IRQ |
794 CS4231_TIMER_IRQ);
795 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
796
797 spin_unlock_irqrestore(&chip->lock, flags);
798
799 chip->mode = mode;
800 mutex_unlock(&chip->open_mutex);
801 return 0;
802}
803
804static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
805{
806 unsigned long flags;
807
808 mutex_lock(&chip->open_mutex);
809 chip->mode &= ~mode;
810 if (chip->mode & CS4231_MODE_OPEN) {
811 mutex_unlock(&chip->open_mutex);
812 return;
813 }
814 snd_cs4231_calibrate_mute(chip, 1);
815
816 /* disable IRQ */
817 spin_lock_irqsave(&chip->lock, flags);
818 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
819 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
820 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
821
822 /* now disable record & playback */
823
824 if (chip->image[CS4231_IFACE_CTRL] &
825 (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
826 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
827 spin_unlock_irqrestore(&chip->lock, flags);
828 snd_cs4231_mce_up(chip);
829 spin_lock_irqsave(&chip->lock, flags);
830 chip->image[CS4231_IFACE_CTRL] &=
831 ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
832 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
833 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
834 chip->image[CS4231_IFACE_CTRL]);
835 spin_unlock_irqrestore(&chip->lock, flags);
836 snd_cs4231_mce_down(chip);
837 spin_lock_irqsave(&chip->lock, flags);
838 }
839
840 /* clear IRQ again */
841 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
842 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
843 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
844 spin_unlock_irqrestore(&chip->lock, flags);
845
846 snd_cs4231_calibrate_mute(chip, 0);
847
848 chip->mode = 0;
849 mutex_unlock(&chip->open_mutex);
850}
851
852/*
853 * timer open/close
854 */
855
856static int snd_cs4231_timer_open(struct snd_timer *timer)
857{
858 struct snd_cs4231 *chip = snd_timer_chip(timer);
859 snd_cs4231_open(chip, CS4231_MODE_TIMER);
860 return 0;
861}
862
863static int snd_cs4231_timer_close(struct snd_timer *timer)
864{
865 struct snd_cs4231 *chip = snd_timer_chip(timer);
866 snd_cs4231_close(chip, CS4231_MODE_TIMER);
867 return 0;
868}
869
870static struct snd_timer_hardware snd_cs4231_timer_table = {
871 .flags = SNDRV_TIMER_HW_AUTO,
872 .resolution = 9945,
873 .ticks = 65535,
874 .open = snd_cs4231_timer_open,
875 .close = snd_cs4231_timer_close,
876 .c_resolution = snd_cs4231_timer_resolution,
877 .start = snd_cs4231_timer_start,
878 .stop = snd_cs4231_timer_stop,
879};
880
881/*
882 * ok.. exported functions..
883 */
884
885static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
886 struct snd_pcm_hw_params *hw_params)
887{
888 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
889 unsigned char new_pdfr;
890 int err;
891
892 err = snd_pcm_lib_malloc_pages(substream,
893 params_buffer_bytes(hw_params));
894 if (err < 0)
895 return err;
896 new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
897 params_channels(hw_params)) |
898 snd_cs4231_get_rate(params_rate(hw_params));
899 snd_cs4231_playback_format(chip, hw_params, new_pdfr);
900
901 return 0;
902}
903
904static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
905{
906 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
907 struct snd_pcm_runtime *runtime = substream->runtime;
908 unsigned long flags;
909
910 spin_lock_irqsave(&chip->lock, flags);
911
912 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
913 CS4231_PLAYBACK_PIO);
914
915 BUG_ON(runtime->period_size > 0xffff + 1);
916
917 chip->p_periods_sent = 0;
918 spin_unlock_irqrestore(&chip->lock, flags);
919
920 return 0;
921}
922
923static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
924 struct snd_pcm_hw_params *hw_params)
925{
926 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
927 unsigned char new_cdfr;
928 int err;
929
930 err = snd_pcm_lib_malloc_pages(substream,
931 params_buffer_bytes(hw_params));
932 if (err < 0)
933 return err;
934 new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
935 params_channels(hw_params)) |
936 snd_cs4231_get_rate(params_rate(hw_params));
937 snd_cs4231_capture_format(chip, hw_params, new_cdfr);
938
939 return 0;
940}
941
942static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
943{
944 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
945 unsigned long flags;
946
947 spin_lock_irqsave(&chip->lock, flags);
948 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
949 CS4231_RECORD_PIO);
950
951
952 chip->c_periods_sent = 0;
953 spin_unlock_irqrestore(&chip->lock, flags);
954
955 return 0;
956}
957
958static void snd_cs4231_overrange(struct snd_cs4231 *chip)
959{
960 unsigned long flags;
961 unsigned char res;
962
963 spin_lock_irqsave(&chip->lock, flags);
964 res = snd_cs4231_in(chip, CS4231_TEST_INIT);
965 spin_unlock_irqrestore(&chip->lock, flags);
966
967 /* detect overrange only above 0dB; may be user selectable? */
968 if (res & (0x08 | 0x02))
969 chip->capture_substream->runtime->overrange++;
970}
971
972static void snd_cs4231_play_callback(struct snd_cs4231 *chip)
973{
974 if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
975 snd_pcm_period_elapsed(chip->playback_substream);
976 snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream,
977 &chip->p_periods_sent);
978 }
979}
980
981static void snd_cs4231_capture_callback(struct snd_cs4231 *chip)
982{
983 if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
984 snd_pcm_period_elapsed(chip->capture_substream);
985 snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream,
986 &chip->c_periods_sent);
987 }
988}
989
990static snd_pcm_uframes_t snd_cs4231_playback_pointer(
991 struct snd_pcm_substream *substream)
992{
993 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
994 struct cs4231_dma_control *dma_cont = &chip->p_dma;
995 size_t ptr;
996
997 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
998 return 0;
999 ptr = dma_cont->address(dma_cont);
1000 if (ptr != 0)
1001 ptr -= substream->runtime->dma_addr;
1002
1003 return bytes_to_frames(substream->runtime, ptr);
1004}
1005
1006static snd_pcm_uframes_t snd_cs4231_capture_pointer(
1007 struct snd_pcm_substream *substream)
1008{
1009 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1010 struct cs4231_dma_control *dma_cont = &chip->c_dma;
1011 size_t ptr;
1012
1013 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1014 return 0;
1015 ptr = dma_cont->address(dma_cont);
1016 if (ptr != 0)
1017 ptr -= substream->runtime->dma_addr;
1018
1019 return bytes_to_frames(substream->runtime, ptr);
1020}
1021
1022static int __devinit snd_cs4231_probe(struct snd_cs4231 *chip)
1023{
1024 unsigned long flags;
1025 int i;
1026 int id = 0;
1027 int vers = 0;
1028 unsigned char *ptr;
1029
1030 for (i = 0; i < 50; i++) {
1031 mb();
1032 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
1033 msleep(2);
1034 else {
1035 spin_lock_irqsave(&chip->lock, flags);
1036 snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1037 id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1038 vers = snd_cs4231_in(chip, CS4231_VERSION);
1039 spin_unlock_irqrestore(&chip->lock, flags);
1040 if (id == 0x0a)
1041 break; /* this is valid value */
1042 }
1043 }
1044 snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id);
1045 if (id != 0x0a)
1046 return -ENODEV; /* no valid device found */
1047
1048 spin_lock_irqsave(&chip->lock, flags);
1049
1050 /* clear any pendings IRQ */
1051 __cs4231_readb(chip, CS4231U(chip, STATUS));
1052 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS));
1053 mb();
1054
1055 spin_unlock_irqrestore(&chip->lock, flags);
1056
1057 chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1058 chip->image[CS4231_IFACE_CTRL] =
1059 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
1060 chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1061 chip->image[CS4231_ALT_FEATURE_2] = 0x01;
1062 if (vers & 0x20)
1063 chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
1064
1065 ptr = (unsigned char *) &chip->image;
1066
1067 snd_cs4231_mce_down(chip);
1068
1069 spin_lock_irqsave(&chip->lock, flags);
1070
1071 for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
1072 snd_cs4231_out(chip, i, *ptr++);
1073
1074 spin_unlock_irqrestore(&chip->lock, flags);
1075
1076 snd_cs4231_mce_up(chip);
1077
1078 snd_cs4231_mce_down(chip);
1079
1080 mdelay(2);
1081
1082 return 0; /* all things are ok.. */
1083}
1084
1085static struct snd_pcm_hardware snd_cs4231_playback = {
1086 .info = SNDRV_PCM_INFO_MMAP |
1087 SNDRV_PCM_INFO_INTERLEAVED |
1088 SNDRV_PCM_INFO_MMAP_VALID |
1089 SNDRV_PCM_INFO_SYNC_START,
1090 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1091 SNDRV_PCM_FMTBIT_A_LAW |
1092 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1093 SNDRV_PCM_FMTBIT_U8 |
1094 SNDRV_PCM_FMTBIT_S16_LE |
1095 SNDRV_PCM_FMTBIT_S16_BE,
1096 .rates = SNDRV_PCM_RATE_KNOT |
1097 SNDRV_PCM_RATE_8000_48000,
1098 .rate_min = 5510,
1099 .rate_max = 48000,
1100 .channels_min = 1,
1101 .channels_max = 2,
1102 .buffer_bytes_max = 32 * 1024,
1103 .period_bytes_min = 64,
1104 .period_bytes_max = 32 * 1024,
1105 .periods_min = 1,
1106 .periods_max = 1024,
1107};
1108
1109static struct snd_pcm_hardware snd_cs4231_capture = {
1110 .info = SNDRV_PCM_INFO_MMAP |
1111 SNDRV_PCM_INFO_INTERLEAVED |
1112 SNDRV_PCM_INFO_MMAP_VALID |
1113 SNDRV_PCM_INFO_SYNC_START,
1114 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1115 SNDRV_PCM_FMTBIT_A_LAW |
1116 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1117 SNDRV_PCM_FMTBIT_U8 |
1118 SNDRV_PCM_FMTBIT_S16_LE |
1119 SNDRV_PCM_FMTBIT_S16_BE,
1120 .rates = SNDRV_PCM_RATE_KNOT |
1121 SNDRV_PCM_RATE_8000_48000,
1122 .rate_min = 5510,
1123 .rate_max = 48000,
1124 .channels_min = 1,
1125 .channels_max = 2,
1126 .buffer_bytes_max = 32 * 1024,
1127 .period_bytes_min = 64,
1128 .period_bytes_max = 32 * 1024,
1129 .periods_min = 1,
1130 .periods_max = 1024,
1131};
1132
1133static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1134{
1135 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1136 struct snd_pcm_runtime *runtime = substream->runtime;
1137 int err;
1138
1139 runtime->hw = snd_cs4231_playback;
1140
1141 err = snd_cs4231_open(chip, CS4231_MODE_PLAY);
1142 if (err < 0) {
1143 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1144 return err;
1145 }
1146 chip->playback_substream = substream;
1147 chip->p_periods_sent = 0;
1148 snd_pcm_set_sync(substream);
1149 snd_cs4231_xrate(runtime);
1150
1151 return 0;
1152}
1153
1154static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1155{
1156 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1157 struct snd_pcm_runtime *runtime = substream->runtime;
1158 int err;
1159
1160 runtime->hw = snd_cs4231_capture;
1161
1162 err = snd_cs4231_open(chip, CS4231_MODE_RECORD);
1163 if (err < 0) {
1164 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1165 return err;
1166 }
1167 chip->capture_substream = substream;
1168 chip->c_periods_sent = 0;
1169 snd_pcm_set_sync(substream);
1170 snd_cs4231_xrate(runtime);
1171
1172 return 0;
1173}
1174
1175static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1176{
1177 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1178
1179 snd_cs4231_close(chip, CS4231_MODE_PLAY);
1180 chip->playback_substream = NULL;
1181
1182 return 0;
1183}
1184
1185static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1186{
1187 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1188
1189 snd_cs4231_close(chip, CS4231_MODE_RECORD);
1190 chip->capture_substream = NULL;
1191
1192 return 0;
1193}
1194
1195/* XXX We can do some power-management, in particular on EBUS using
1196 * XXX the audio AUXIO register...
1197 */
1198
1199static struct snd_pcm_ops snd_cs4231_playback_ops = {
1200 .open = snd_cs4231_playback_open,
1201 .close = snd_cs4231_playback_close,
1202 .ioctl = snd_pcm_lib_ioctl,
1203 .hw_params = snd_cs4231_playback_hw_params,
1204 .hw_free = snd_pcm_lib_free_pages,
1205 .prepare = snd_cs4231_playback_prepare,
1206 .trigger = snd_cs4231_trigger,
1207 .pointer = snd_cs4231_playback_pointer,
1208};
1209
1210static struct snd_pcm_ops snd_cs4231_capture_ops = {
1211 .open = snd_cs4231_capture_open,
1212 .close = snd_cs4231_capture_close,
1213 .ioctl = snd_pcm_lib_ioctl,
1214 .hw_params = snd_cs4231_capture_hw_params,
1215 .hw_free = snd_pcm_lib_free_pages,
1216 .prepare = snd_cs4231_capture_prepare,
1217 .trigger = snd_cs4231_trigger,
1218 .pointer = snd_cs4231_capture_pointer,
1219};
1220
1221static int __devinit snd_cs4231_pcm(struct snd_card *card)
1222{
1223 struct snd_cs4231 *chip = card->private_data;
1224 struct snd_pcm *pcm;
1225 int err;
1226
1227 err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm);
1228 if (err < 0)
1229 return err;
1230
1231 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1232 &snd_cs4231_playback_ops);
1233 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1234 &snd_cs4231_capture_ops);
1235
1236 /* global setup */
1237 pcm->private_data = chip;
1238 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1239 strcpy(pcm->name, "CS4231");
1240
1241 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1242 &chip->op->dev,
1243 64 * 1024, 128 * 1024);
1244
1245 chip->pcm = pcm;
1246
1247 return 0;
1248}
1249
1250static int __devinit snd_cs4231_timer(struct snd_card *card)
1251{
1252 struct snd_cs4231 *chip = card->private_data;
1253 struct snd_timer *timer;
1254 struct snd_timer_id tid;
1255 int err;
1256
1257 /* Timer initialization */
1258 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1259 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1260 tid.card = card->number;
1261 tid.device = 0;
1262 tid.subdevice = 0;
1263 err = snd_timer_new(card, "CS4231", &tid, &timer);
1264 if (err < 0)
1265 return err;
1266 strcpy(timer->name, "CS4231");
1267 timer->private_data = chip;
1268 timer->hw = snd_cs4231_timer_table;
1269 chip->timer = timer;
1270
1271 return 0;
1272}
1273
1274/*
1275 * MIXER part
1276 */
1277
1278static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol,
1279 struct snd_ctl_elem_info *uinfo)
1280{
1281 static char *texts[4] = {
1282 "Line", "CD", "Mic", "Mix"
1283 };
1284
1285 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1286 uinfo->count = 2;
1287 uinfo->value.enumerated.items = 4;
1288 if (uinfo->value.enumerated.item > 3)
1289 uinfo->value.enumerated.item = 3;
1290 strcpy(uinfo->value.enumerated.name,
1291 texts[uinfo->value.enumerated.item]);
1292
1293 return 0;
1294}
1295
1296static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol,
1297 struct snd_ctl_elem_value *ucontrol)
1298{
1299 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1300 unsigned long flags;
1301
1302 spin_lock_irqsave(&chip->lock, flags);
1303 ucontrol->value.enumerated.item[0] =
1304 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1305 ucontrol->value.enumerated.item[1] =
1306 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1307 spin_unlock_irqrestore(&chip->lock, flags);
1308
1309 return 0;
1310}
1311
1312static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol,
1313 struct snd_ctl_elem_value *ucontrol)
1314{
1315 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1316 unsigned long flags;
1317 unsigned short left, right;
1318 int change;
1319
1320 if (ucontrol->value.enumerated.item[0] > 3 ||
1321 ucontrol->value.enumerated.item[1] > 3)
1322 return -EINVAL;
1323 left = ucontrol->value.enumerated.item[0] << 6;
1324 right = ucontrol->value.enumerated.item[1] << 6;
1325
1326 spin_lock_irqsave(&chip->lock, flags);
1327
1328 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1329 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1330 change = left != chip->image[CS4231_LEFT_INPUT] ||
1331 right != chip->image[CS4231_RIGHT_INPUT];
1332 snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1333 snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1334
1335 spin_unlock_irqrestore(&chip->lock, flags);
1336
1337 return change;
1338}
1339
1340static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol,
1341 struct snd_ctl_elem_info *uinfo)
1342{
1343 int mask = (kcontrol->private_value >> 16) & 0xff;
1344
1345 uinfo->type = (mask == 1) ?
1346 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1347 uinfo->count = 1;
1348 uinfo->value.integer.min = 0;
1349 uinfo->value.integer.max = mask;
1350
1351 return 0;
1352}
1353
1354static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol,
1355 struct snd_ctl_elem_value *ucontrol)
1356{
1357 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1358 unsigned long flags;
1359 int reg = kcontrol->private_value & 0xff;
1360 int shift = (kcontrol->private_value >> 8) & 0xff;
1361 int mask = (kcontrol->private_value >> 16) & 0xff;
1362 int invert = (kcontrol->private_value >> 24) & 0xff;
1363
1364 spin_lock_irqsave(&chip->lock, flags);
1365
1366 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1367
1368 spin_unlock_irqrestore(&chip->lock, flags);
1369
1370 if (invert)
1371 ucontrol->value.integer.value[0] =
1372 (mask - ucontrol->value.integer.value[0]);
1373
1374 return 0;
1375}
1376
1377static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol,
1378 struct snd_ctl_elem_value *ucontrol)
1379{
1380 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1381 unsigned long flags;
1382 int reg = kcontrol->private_value & 0xff;
1383 int shift = (kcontrol->private_value >> 8) & 0xff;
1384 int mask = (kcontrol->private_value >> 16) & 0xff;
1385 int invert = (kcontrol->private_value >> 24) & 0xff;
1386 int change;
1387 unsigned short val;
1388
1389 val = (ucontrol->value.integer.value[0] & mask);
1390 if (invert)
1391 val = mask - val;
1392 val <<= shift;
1393
1394 spin_lock_irqsave(&chip->lock, flags);
1395
1396 val = (chip->image[reg] & ~(mask << shift)) | val;
1397 change = val != chip->image[reg];
1398 snd_cs4231_out(chip, reg, val);
1399
1400 spin_unlock_irqrestore(&chip->lock, flags);
1401
1402 return change;
1403}
1404
1405static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol,
1406 struct snd_ctl_elem_info *uinfo)
1407{
1408 int mask = (kcontrol->private_value >> 24) & 0xff;
1409
1410 uinfo->type = mask == 1 ?
1411 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1412 uinfo->count = 2;
1413 uinfo->value.integer.min = 0;
1414 uinfo->value.integer.max = mask;
1415
1416 return 0;
1417}
1418
1419static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol,
1420 struct snd_ctl_elem_value *ucontrol)
1421{
1422 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1423 unsigned long flags;
1424 int left_reg = kcontrol->private_value & 0xff;
1425 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1426 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1427 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1428 int mask = (kcontrol->private_value >> 24) & 0xff;
1429 int invert = (kcontrol->private_value >> 22) & 1;
1430
1431 spin_lock_irqsave(&chip->lock, flags);
1432
1433 ucontrol->value.integer.value[0] =
1434 (chip->image[left_reg] >> shift_left) & mask;
1435 ucontrol->value.integer.value[1] =
1436 (chip->image[right_reg] >> shift_right) & mask;
1437
1438 spin_unlock_irqrestore(&chip->lock, flags);
1439
1440 if (invert) {
1441 ucontrol->value.integer.value[0] =
1442 (mask - ucontrol->value.integer.value[0]);
1443 ucontrol->value.integer.value[1] =
1444 (mask - ucontrol->value.integer.value[1]);
1445 }
1446
1447 return 0;
1448}
1449
1450static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol,
1451 struct snd_ctl_elem_value *ucontrol)
1452{
1453 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1454 unsigned long flags;
1455 int left_reg = kcontrol->private_value & 0xff;
1456 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1457 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1458 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1459 int mask = (kcontrol->private_value >> 24) & 0xff;
1460 int invert = (kcontrol->private_value >> 22) & 1;
1461 int change;
1462 unsigned short val1, val2;
1463
1464 val1 = ucontrol->value.integer.value[0] & mask;
1465 val2 = ucontrol->value.integer.value[1] & mask;
1466 if (invert) {
1467 val1 = mask - val1;
1468 val2 = mask - val2;
1469 }
1470 val1 <<= shift_left;
1471 val2 <<= shift_right;
1472
1473 spin_lock_irqsave(&chip->lock, flags);
1474
1475 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1476 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1477 change = val1 != chip->image[left_reg];
1478 change |= val2 != chip->image[right_reg];
1479 snd_cs4231_out(chip, left_reg, val1);
1480 snd_cs4231_out(chip, right_reg, val2);
1481
1482 spin_unlock_irqrestore(&chip->lock, flags);
1483
1484 return change;
1485}
1486
1487#define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
1488{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1489 .info = snd_cs4231_info_single, \
1490 .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
1491 .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) }
1492
1493#define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \
1494 shift_right, mask, invert) \
1495{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1496 .info = snd_cs4231_info_double, \
1497 .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
1498 .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \
1499 ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) }
1500
1501static struct snd_kcontrol_new snd_cs4231_controls[] __devinitdata = {
1502CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT,
1503 CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1504CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT,
1505 CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1506CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN,
1507 CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1508CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN,
1509 CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1510CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT,
1511 CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1512CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT,
1513 CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1514CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT,
1515 CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1516CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT,
1517 CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1518CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1519CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1520CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1521CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1522CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0,
1523 15, 0),
1524{
1525 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1526 .name = "Capture Source",
1527 .info = snd_cs4231_info_mux,
1528 .get = snd_cs4231_get_mux,
1529 .put = snd_cs4231_put_mux,
1530},
1531CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5,
1532 1, 0),
1533CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1534CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
1535/* SPARC specific uses of XCTL{0,1} general purpose outputs. */
1536CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
1537CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
1538};
1539
1540static int __devinit snd_cs4231_mixer(struct snd_card *card)
1541{
1542 struct snd_cs4231 *chip = card->private_data;
1543 int err, idx;
1544
1545 if (snd_BUG_ON(!chip || !chip->pcm))
1546 return -EINVAL;
1547
1548 strcpy(card->mixername, chip->pcm->name);
1549
1550 for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1551 err = snd_ctl_add(card,
1552 snd_ctl_new1(&snd_cs4231_controls[idx], chip));
1553 if (err < 0)
1554 return err;
1555 }
1556 return 0;
1557}
1558
1559static int dev;
1560
1561static int __devinit cs4231_attach_begin(struct snd_card **rcard)
1562{
1563 struct snd_card *card;
1564 struct snd_cs4231 *chip;
1565 int err;
1566
1567 *rcard = NULL;
1568
1569 if (dev >= SNDRV_CARDS)
1570 return -ENODEV;
1571
1572 if (!enable[dev]) {
1573 dev++;
1574 return -ENOENT;
1575 }
1576
1577 err = snd_card_create(index[dev], id[dev], THIS_MODULE,
1578 sizeof(struct snd_cs4231), &card);
1579 if (err < 0)
1580 return err;
1581
1582 strcpy(card->driver, "CS4231");
1583 strcpy(card->shortname, "Sun CS4231");
1584
1585 chip = card->private_data;
1586 chip->card = card;
1587
1588 *rcard = card;
1589 return 0;
1590}
1591
1592static int __devinit cs4231_attach_finish(struct snd_card *card)
1593{
1594 struct snd_cs4231 *chip = card->private_data;
1595 int err;
1596
1597 err = snd_cs4231_pcm(card);
1598 if (err < 0)
1599 goto out_err;
1600
1601 err = snd_cs4231_mixer(card);
1602 if (err < 0)
1603 goto out_err;
1604
1605 err = snd_cs4231_timer(card);
1606 if (err < 0)
1607 goto out_err;
1608
1609 err = snd_card_register(card);
1610 if (err < 0)
1611 goto out_err;
1612
1613 dev_set_drvdata(&chip->op->dev, chip);
1614
1615 dev++;
1616 return 0;
1617
1618out_err:
1619 snd_card_free(card);
1620 return err;
1621}
1622
1623#ifdef SBUS_SUPPORT
1624
1625static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id)
1626{
1627 unsigned long flags;
1628 unsigned char status;
1629 u32 csr;
1630 struct snd_cs4231 *chip = dev_id;
1631
1632 /*This is IRQ is not raised by the cs4231*/
1633 if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ))
1634 return IRQ_NONE;
1635
1636 /* ACK the APC interrupt. */
1637 csr = sbus_readl(chip->port + APCCSR);
1638
1639 sbus_writel(csr, chip->port + APCCSR);
1640
1641 if ((csr & APC_PDMA_READY) &&
1642 (csr & APC_PLAY_INT) &&
1643 (csr & APC_XINT_PNVA) &&
1644 !(csr & APC_XINT_EMPT))
1645 snd_cs4231_play_callback(chip);
1646
1647 if ((csr & APC_CDMA_READY) &&
1648 (csr & APC_CAPT_INT) &&
1649 (csr & APC_XINT_CNVA) &&
1650 !(csr & APC_XINT_EMPT))
1651 snd_cs4231_capture_callback(chip);
1652
1653 status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
1654
1655 if (status & CS4231_TIMER_IRQ) {
1656 if (chip->timer)
1657 snd_timer_interrupt(chip->timer, chip->timer->sticks);
1658 }
1659
1660 if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY))
1661 snd_cs4231_overrange(chip);
1662
1663 /* ACK the CS4231 interrupt. */
1664 spin_lock_irqsave(&chip->lock, flags);
1665 snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1666 spin_unlock_irqrestore(&chip->lock, flags);
1667
1668 return IRQ_HANDLED;
1669}
1670
1671/*
1672 * SBUS DMA routines
1673 */
1674
1675static int sbus_dma_request(struct cs4231_dma_control *dma_cont,
1676 dma_addr_t bus_addr, size_t len)
1677{
1678 unsigned long flags;
1679 u32 test, csr;
1680 int err;
1681 struct sbus_dma_info *base = &dma_cont->sbus_info;
1682
1683 if (len >= (1 << 24))
1684 return -EINVAL;
1685 spin_lock_irqsave(&base->lock, flags);
1686 csr = sbus_readl(base->regs + APCCSR);
1687 err = -EINVAL;
1688 test = APC_CDMA_READY;
1689 if (base->dir == APC_PLAY)
1690 test = APC_PDMA_READY;
1691 if (!(csr & test))
1692 goto out;
1693 err = -EBUSY;
1694 test = APC_XINT_CNVA;
1695 if (base->dir == APC_PLAY)
1696 test = APC_XINT_PNVA;
1697 if (!(csr & test))
1698 goto out;
1699 err = 0;
1700 sbus_writel(bus_addr, base->regs + base->dir + APCNVA);
1701 sbus_writel(len, base->regs + base->dir + APCNC);
1702out:
1703 spin_unlock_irqrestore(&base->lock, flags);
1704 return err;
1705}
1706
1707static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d)
1708{
1709 unsigned long flags;
1710 u32 csr, test;
1711 struct sbus_dma_info *base = &dma_cont->sbus_info;
1712
1713 spin_lock_irqsave(&base->lock, flags);
1714 csr = sbus_readl(base->regs + APCCSR);
1715 test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA |
1716 APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL |
1717 APC_XINT_PENA;
1718 if (base->dir == APC_RECORD)
1719 test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA |
1720 APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL;
1721 csr |= test;
1722 sbus_writel(csr, base->regs + APCCSR);
1723 spin_unlock_irqrestore(&base->lock, flags);
1724}
1725
1726static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1727{
1728 unsigned long flags;
1729 u32 csr, shift;
1730 struct sbus_dma_info *base = &dma_cont->sbus_info;
1731
1732 spin_lock_irqsave(&base->lock, flags);
1733 if (!on) {
1734 sbus_writel(0, base->regs + base->dir + APCNC);
1735 sbus_writel(0, base->regs + base->dir + APCNVA);
1736 if (base->dir == APC_PLAY) {
1737 sbus_writel(0, base->regs + base->dir + APCC);
1738 sbus_writel(0, base->regs + base->dir + APCVA);
1739 }
1740
1741 udelay(1200);
1742 }
1743 csr = sbus_readl(base->regs + APCCSR);
1744 shift = 0;
1745 if (base->dir == APC_PLAY)
1746 shift = 1;
1747 if (on)
1748 csr &= ~(APC_CPAUSE << shift);
1749 else
1750 csr |= (APC_CPAUSE << shift);
1751 sbus_writel(csr, base->regs + APCCSR);
1752 if (on)
1753 csr |= (APC_CDMA_READY << shift);
1754 else
1755 csr &= ~(APC_CDMA_READY << shift);
1756 sbus_writel(csr, base->regs + APCCSR);
1757
1758 spin_unlock_irqrestore(&base->lock, flags);
1759}
1760
1761static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont)
1762{
1763 struct sbus_dma_info *base = &dma_cont->sbus_info;
1764
1765 return sbus_readl(base->regs + base->dir + APCVA);
1766}
1767
1768/*
1769 * Init and exit routines
1770 */
1771
1772static int snd_cs4231_sbus_free(struct snd_cs4231 *chip)
1773{
1774 struct platform_device *op = chip->op;
1775
1776 if (chip->irq[0])
1777 free_irq(chip->irq[0], chip);
1778
1779 if (chip->port)
1780 of_iounmap(&op->resource[0], chip->port, chip->regs_size);
1781
1782 return 0;
1783}
1784
1785static int snd_cs4231_sbus_dev_free(struct snd_device *device)
1786{
1787 struct snd_cs4231 *cp = device->device_data;
1788
1789 return snd_cs4231_sbus_free(cp);
1790}
1791
1792static struct snd_device_ops snd_cs4231_sbus_dev_ops = {
1793 .dev_free = snd_cs4231_sbus_dev_free,
1794};
1795
1796static int __devinit snd_cs4231_sbus_create(struct snd_card *card,
1797 struct platform_device *op,
1798 int dev)
1799{
1800 struct snd_cs4231 *chip = card->private_data;
1801 int err;
1802
1803 spin_lock_init(&chip->lock);
1804 spin_lock_init(&chip->c_dma.sbus_info.lock);
1805 spin_lock_init(&chip->p_dma.sbus_info.lock);
1806 mutex_init(&chip->mce_mutex);
1807 mutex_init(&chip->open_mutex);
1808 chip->op = op;
1809 chip->regs_size = resource_size(&op->resource[0]);
1810 memcpy(&chip->image, &snd_cs4231_original_image,
1811 sizeof(snd_cs4231_original_image));
1812
1813 chip->port = of_ioremap(&op->resource[0], 0,
1814 chip->regs_size, "cs4231");
1815 if (!chip->port) {
1816 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1817 return -EIO;
1818 }
1819
1820 chip->c_dma.sbus_info.regs = chip->port;
1821 chip->p_dma.sbus_info.regs = chip->port;
1822 chip->c_dma.sbus_info.dir = APC_RECORD;
1823 chip->p_dma.sbus_info.dir = APC_PLAY;
1824
1825 chip->p_dma.prepare = sbus_dma_prepare;
1826 chip->p_dma.enable = sbus_dma_enable;
1827 chip->p_dma.request = sbus_dma_request;
1828 chip->p_dma.address = sbus_dma_addr;
1829
1830 chip->c_dma.prepare = sbus_dma_prepare;
1831 chip->c_dma.enable = sbus_dma_enable;
1832 chip->c_dma.request = sbus_dma_request;
1833 chip->c_dma.address = sbus_dma_addr;
1834
1835 if (request_irq(op->archdata.irqs[0], snd_cs4231_sbus_interrupt,
1836 IRQF_SHARED, "cs4231", chip)) {
1837 snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n",
1838 dev, op->archdata.irqs[0]);
1839 snd_cs4231_sbus_free(chip);
1840 return -EBUSY;
1841 }
1842 chip->irq[0] = op->archdata.irqs[0];
1843
1844 if (snd_cs4231_probe(chip) < 0) {
1845 snd_cs4231_sbus_free(chip);
1846 return -ENODEV;
1847 }
1848 snd_cs4231_init(chip);
1849
1850 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
1851 chip, &snd_cs4231_sbus_dev_ops)) < 0) {
1852 snd_cs4231_sbus_free(chip);
1853 return err;
1854 }
1855
1856 return 0;
1857}
1858
1859static int __devinit cs4231_sbus_probe(struct platform_device *op)
1860{
1861 struct resource *rp = &op->resource[0];
1862 struct snd_card *card;
1863 int err;
1864
1865 err = cs4231_attach_begin(&card);
1866 if (err)
1867 return err;
1868
1869 sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d",
1870 card->shortname,
1871 rp->flags & 0xffL,
1872 (unsigned long long)rp->start,
1873 op->archdata.irqs[0]);
1874
1875 err = snd_cs4231_sbus_create(card, op, dev);
1876 if (err < 0) {
1877 snd_card_free(card);
1878 return err;
1879 }
1880
1881 return cs4231_attach_finish(card);
1882}
1883#endif
1884
1885#ifdef EBUS_SUPPORT
1886
1887static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event,
1888 void *cookie)
1889{
1890 struct snd_cs4231 *chip = cookie;
1891
1892 snd_cs4231_play_callback(chip);
1893}
1894
1895static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p,
1896 int event, void *cookie)
1897{
1898 struct snd_cs4231 *chip = cookie;
1899
1900 snd_cs4231_capture_callback(chip);
1901}
1902
1903/*
1904 * EBUS DMA wrappers
1905 */
1906
1907static int _ebus_dma_request(struct cs4231_dma_control *dma_cont,
1908 dma_addr_t bus_addr, size_t len)
1909{
1910 return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len);
1911}
1912
1913static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1914{
1915 ebus_dma_enable(&dma_cont->ebus_info, on);
1916}
1917
1918static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir)
1919{
1920 ebus_dma_prepare(&dma_cont->ebus_info, dir);
1921}
1922
1923static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont)
1924{
1925 return ebus_dma_addr(&dma_cont->ebus_info);
1926}
1927
1928/*
1929 * Init and exit routines
1930 */
1931
1932static int snd_cs4231_ebus_free(struct snd_cs4231 *chip)
1933{
1934 struct platform_device *op = chip->op;
1935
1936 if (chip->c_dma.ebus_info.regs) {
1937 ebus_dma_unregister(&chip->c_dma.ebus_info);
1938 of_iounmap(&op->resource[2], chip->c_dma.ebus_info.regs, 0x10);
1939 }
1940 if (chip->p_dma.ebus_info.regs) {
1941 ebus_dma_unregister(&chip->p_dma.ebus_info);
1942 of_iounmap(&op->resource[1], chip->p_dma.ebus_info.regs, 0x10);
1943 }
1944
1945 if (chip->port)
1946 of_iounmap(&op->resource[0], chip->port, 0x10);
1947
1948 return 0;
1949}
1950
1951static int snd_cs4231_ebus_dev_free(struct snd_device *device)
1952{
1953 struct snd_cs4231 *cp = device->device_data;
1954
1955 return snd_cs4231_ebus_free(cp);
1956}
1957
1958static struct snd_device_ops snd_cs4231_ebus_dev_ops = {
1959 .dev_free = snd_cs4231_ebus_dev_free,
1960};
1961
1962static int __devinit snd_cs4231_ebus_create(struct snd_card *card,
1963 struct platform_device *op,
1964 int dev)
1965{
1966 struct snd_cs4231 *chip = card->private_data;
1967 int err;
1968
1969 spin_lock_init(&chip->lock);
1970 spin_lock_init(&chip->c_dma.ebus_info.lock);
1971 spin_lock_init(&chip->p_dma.ebus_info.lock);
1972 mutex_init(&chip->mce_mutex);
1973 mutex_init(&chip->open_mutex);
1974 chip->flags |= CS4231_FLAG_EBUS;
1975 chip->op = op;
1976 memcpy(&chip->image, &snd_cs4231_original_image,
1977 sizeof(snd_cs4231_original_image));
1978 strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)");
1979 chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1980 chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback;
1981 chip->c_dma.ebus_info.client_cookie = chip;
1982 chip->c_dma.ebus_info.irq = op->archdata.irqs[0];
1983 strcpy(chip->p_dma.ebus_info.name, "cs4231(play)");
1984 chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1985 chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback;
1986 chip->p_dma.ebus_info.client_cookie = chip;
1987 chip->p_dma.ebus_info.irq = op->archdata.irqs[1];
1988
1989 chip->p_dma.prepare = _ebus_dma_prepare;
1990 chip->p_dma.enable = _ebus_dma_enable;
1991 chip->p_dma.request = _ebus_dma_request;
1992 chip->p_dma.address = _ebus_dma_addr;
1993
1994 chip->c_dma.prepare = _ebus_dma_prepare;
1995 chip->c_dma.enable = _ebus_dma_enable;
1996 chip->c_dma.request = _ebus_dma_request;
1997 chip->c_dma.address = _ebus_dma_addr;
1998
1999 chip->port = of_ioremap(&op->resource[0], 0, 0x10, "cs4231");
2000 chip->p_dma.ebus_info.regs =
2001 of_ioremap(&op->resource[1], 0, 0x10, "cs4231_pdma");
2002 chip->c_dma.ebus_info.regs =
2003 of_ioremap(&op->resource[2], 0, 0x10, "cs4231_cdma");
2004 if (!chip->port || !chip->p_dma.ebus_info.regs ||
2005 !chip->c_dma.ebus_info.regs) {
2006 snd_cs4231_ebus_free(chip);
2007 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
2008 return -EIO;
2009 }
2010
2011 if (ebus_dma_register(&chip->c_dma.ebus_info)) {
2012 snd_cs4231_ebus_free(chip);
2013 snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n",
2014 dev);
2015 return -EBUSY;
2016 }
2017 if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) {
2018 snd_cs4231_ebus_free(chip);
2019 snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n",
2020 dev);
2021 return -EBUSY;
2022 }
2023
2024 if (ebus_dma_register(&chip->p_dma.ebus_info)) {
2025 snd_cs4231_ebus_free(chip);
2026 snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n",
2027 dev);
2028 return -EBUSY;
2029 }
2030 if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) {
2031 snd_cs4231_ebus_free(chip);
2032 snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
2033 return -EBUSY;
2034 }
2035
2036 if (snd_cs4231_probe(chip) < 0) {
2037 snd_cs4231_ebus_free(chip);
2038 return -ENODEV;
2039 }
2040 snd_cs4231_init(chip);
2041
2042 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2043 chip, &snd_cs4231_ebus_dev_ops)) < 0) {
2044 snd_cs4231_ebus_free(chip);
2045 return err;
2046 }
2047
2048 return 0;
2049}
2050
2051static int __devinit cs4231_ebus_probe(struct platform_device *op)
2052{
2053 struct snd_card *card;
2054 int err;
2055
2056 err = cs4231_attach_begin(&card);
2057 if (err)
2058 return err;
2059
2060 sprintf(card->longname, "%s at 0x%llx, irq %d",
2061 card->shortname,
2062 op->resource[0].start,
2063 op->archdata.irqs[0]);
2064
2065 err = snd_cs4231_ebus_create(card, op, dev);
2066 if (err < 0) {
2067 snd_card_free(card);
2068 return err;
2069 }
2070
2071 return cs4231_attach_finish(card);
2072}
2073#endif
2074
2075static int __devinit cs4231_probe(struct platform_device *op)
2076{
2077#ifdef EBUS_SUPPORT
2078 if (!strcmp(op->dev.of_node->parent->name, "ebus"))
2079 return cs4231_ebus_probe(op);
2080#endif
2081#ifdef SBUS_SUPPORT
2082 if (!strcmp(op->dev.of_node->parent->name, "sbus") ||
2083 !strcmp(op->dev.of_node->parent->name, "sbi"))
2084 return cs4231_sbus_probe(op);
2085#endif
2086 return -ENODEV;
2087}
2088
2089static int __devexit cs4231_remove(struct platform_device *op)
2090{
2091 struct snd_cs4231 *chip = dev_get_drvdata(&op->dev);
2092
2093 snd_card_free(chip->card);
2094
2095 return 0;
2096}
2097
2098static const struct of_device_id cs4231_match[] = {
2099 {
2100 .name = "SUNW,CS4231",
2101 },
2102 {
2103 .name = "audio",
2104 .compatible = "SUNW,CS4231",
2105 },
2106 {},
2107};
2108
2109MODULE_DEVICE_TABLE(of, cs4231_match);
2110
2111static struct platform_driver cs4231_driver = {
2112 .driver = {
2113 .name = "audio",
2114 .owner = THIS_MODULE,
2115 .of_match_table = cs4231_match,
2116 },
2117 .probe = cs4231_probe,
2118 .remove = __devexit_p(cs4231_remove),
2119};
2120
2121static int __init cs4231_init(void)
2122{
2123 return platform_driver_register(&cs4231_driver);
2124}
2125
2126static void __exit cs4231_exit(void)
2127{
2128 platform_driver_unregister(&cs4231_driver);
2129}
2130
2131module_init(cs4231_init);
2132module_exit(cs4231_exit);
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Driver for CS4231 sound chips found on Sparcs.
4 * Copyright (C) 2002, 2008 David S. Miller <davem@davemloft.net>
5 *
6 * Based entirely upon drivers/sbus/audio/cs4231.c which is:
7 * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
8 * and also sound/isa/cs423x/cs4231_lib.c which is:
9 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
10 */
11
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/delay.h>
15#include <linux/init.h>
16#include <linux/interrupt.h>
17#include <linux/moduleparam.h>
18#include <linux/irq.h>
19#include <linux/io.h>
20#include <linux/of.h>
21#include <linux/platform_device.h>
22
23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/info.h>
26#include <sound/control.h>
27#include <sound/timer.h>
28#include <sound/initval.h>
29#include <sound/pcm_params.h>
30
31#ifdef CONFIG_SBUS
32#define SBUS_SUPPORT
33#endif
34
35#if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
36#define EBUS_SUPPORT
37#include <linux/pci.h>
38#include <asm/ebus_dma.h>
39#endif
40
41static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
42static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
43/* Enable this card */
44static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
45
46module_param_array(index, int, NULL, 0444);
47MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
48module_param_array(id, charp, NULL, 0444);
49MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
50module_param_array(enable, bool, NULL, 0444);
51MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
52MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
53MODULE_DESCRIPTION("Sun CS4231");
54MODULE_LICENSE("GPL");
55
56#ifdef SBUS_SUPPORT
57struct sbus_dma_info {
58 spinlock_t lock; /* DMA access lock */
59 int dir;
60 void __iomem *regs;
61};
62#endif
63
64struct snd_cs4231;
65struct cs4231_dma_control {
66 void (*prepare)(struct cs4231_dma_control *dma_cont,
67 int dir);
68 void (*enable)(struct cs4231_dma_control *dma_cont, int on);
69 int (*request)(struct cs4231_dma_control *dma_cont,
70 dma_addr_t bus_addr, size_t len);
71 unsigned int (*address)(struct cs4231_dma_control *dma_cont);
72#ifdef EBUS_SUPPORT
73 struct ebus_dma_info ebus_info;
74#endif
75#ifdef SBUS_SUPPORT
76 struct sbus_dma_info sbus_info;
77#endif
78};
79
80struct snd_cs4231 {
81 spinlock_t lock; /* registers access lock */
82 void __iomem *port;
83
84 struct cs4231_dma_control p_dma;
85 struct cs4231_dma_control c_dma;
86
87 u32 flags;
88#define CS4231_FLAG_EBUS 0x00000001
89#define CS4231_FLAG_PLAYBACK 0x00000002
90#define CS4231_FLAG_CAPTURE 0x00000004
91
92 struct snd_card *card;
93 struct snd_pcm *pcm;
94 struct snd_pcm_substream *playback_substream;
95 unsigned int p_periods_sent;
96 struct snd_pcm_substream *capture_substream;
97 unsigned int c_periods_sent;
98 struct snd_timer *timer;
99
100 unsigned short mode;
101#define CS4231_MODE_NONE 0x0000
102#define CS4231_MODE_PLAY 0x0001
103#define CS4231_MODE_RECORD 0x0002
104#define CS4231_MODE_TIMER 0x0004
105#define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \
106 CS4231_MODE_TIMER)
107
108 unsigned char image[32]; /* registers image */
109 int mce_bit;
110 int calibrate_mute;
111 struct mutex mce_mutex; /* mutex for mce register */
112 struct mutex open_mutex; /* mutex for ALSA open/close */
113
114 struct platform_device *op;
115 unsigned int irq[2];
116 unsigned int regs_size;
117 struct snd_cs4231 *next;
118};
119
120/* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
121 * now.... -DaveM
122 */
123
124/* IO ports */
125#include <sound/cs4231-regs.h>
126
127/* XXX offsets are different than PC ISA chips... */
128#define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2))
129
130/* SBUS DMA register defines. */
131
132#define APCCSR 0x10UL /* APC DMA CSR */
133#define APCCVA 0x20UL /* APC Capture DMA Address */
134#define APCCC 0x24UL /* APC Capture Count */
135#define APCCNVA 0x28UL /* APC Capture DMA Next Address */
136#define APCCNC 0x2cUL /* APC Capture Next Count */
137#define APCPVA 0x30UL /* APC Play DMA Address */
138#define APCPC 0x34UL /* APC Play Count */
139#define APCPNVA 0x38UL /* APC Play DMA Next Address */
140#define APCPNC 0x3cUL /* APC Play Next Count */
141
142/* Defines for SBUS DMA-routines */
143
144#define APCVA 0x0UL /* APC DMA Address */
145#define APCC 0x4UL /* APC Count */
146#define APCNVA 0x8UL /* APC DMA Next Address */
147#define APCNC 0xcUL /* APC Next Count */
148#define APC_PLAY 0x30UL /* Play registers start at 0x30 */
149#define APC_RECORD 0x20UL /* Record registers start at 0x20 */
150
151/* APCCSR bits */
152
153#define APC_INT_PENDING 0x800000 /* Interrupt Pending */
154#define APC_PLAY_INT 0x400000 /* Playback interrupt */
155#define APC_CAPT_INT 0x200000 /* Capture interrupt */
156#define APC_GENL_INT 0x100000 /* General interrupt */
157#define APC_XINT_ENA 0x80000 /* General ext int. enable */
158#define APC_XINT_PLAY 0x40000 /* Playback ext intr */
159#define APC_XINT_CAPT 0x20000 /* Capture ext intr */
160#define APC_XINT_GENL 0x10000 /* Error ext intr */
161#define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */
162#define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */
163#define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */
164#define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */
165#define APC_XINT_COVF 0x800 /* Cap data dropped on floor */
166#define APC_XINT_CNVA 0x400 /* Capture NVA dirty */
167#define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */
168#define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */
169#define APC_PPAUSE 0x80 /* Pause the play DMA */
170#define APC_CPAUSE 0x40 /* Pause the capture DMA */
171#define APC_CDC_RESET 0x20 /* CODEC RESET */
172#define APC_PDMA_READY 0x08 /* Play DMA Go */
173#define APC_CDMA_READY 0x04 /* Capture DMA Go */
174#define APC_CHIP_RESET 0x01 /* Reset the chip */
175
176/* EBUS DMA register offsets */
177
178#define EBDMA_CSR 0x00UL /* Control/Status */
179#define EBDMA_ADDR 0x04UL /* DMA Address */
180#define EBDMA_COUNT 0x08UL /* DMA Count */
181
182/*
183 * Some variables
184 */
185
186static const unsigned char freq_bits[14] = {
187 /* 5510 */ 0x00 | CS4231_XTAL2,
188 /* 6620 */ 0x0E | CS4231_XTAL2,
189 /* 8000 */ 0x00 | CS4231_XTAL1,
190 /* 9600 */ 0x0E | CS4231_XTAL1,
191 /* 11025 */ 0x02 | CS4231_XTAL2,
192 /* 16000 */ 0x02 | CS4231_XTAL1,
193 /* 18900 */ 0x04 | CS4231_XTAL2,
194 /* 22050 */ 0x06 | CS4231_XTAL2,
195 /* 27042 */ 0x04 | CS4231_XTAL1,
196 /* 32000 */ 0x06 | CS4231_XTAL1,
197 /* 33075 */ 0x0C | CS4231_XTAL2,
198 /* 37800 */ 0x08 | CS4231_XTAL2,
199 /* 44100 */ 0x0A | CS4231_XTAL2,
200 /* 48000 */ 0x0C | CS4231_XTAL1
201};
202
203static const unsigned int rates[14] = {
204 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
205 27042, 32000, 33075, 37800, 44100, 48000
206};
207
208static const struct snd_pcm_hw_constraint_list hw_constraints_rates = {
209 .count = ARRAY_SIZE(rates),
210 .list = rates,
211};
212
213static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
214{
215 return snd_pcm_hw_constraint_list(runtime, 0,
216 SNDRV_PCM_HW_PARAM_RATE,
217 &hw_constraints_rates);
218}
219
220static const unsigned char snd_cs4231_original_image[32] =
221{
222 0x00, /* 00/00 - lic */
223 0x00, /* 01/01 - ric */
224 0x9f, /* 02/02 - la1ic */
225 0x9f, /* 03/03 - ra1ic */
226 0x9f, /* 04/04 - la2ic */
227 0x9f, /* 05/05 - ra2ic */
228 0xbf, /* 06/06 - loc */
229 0xbf, /* 07/07 - roc */
230 0x20, /* 08/08 - pdfr */
231 CS4231_AUTOCALIB, /* 09/09 - ic */
232 0x00, /* 0a/10 - pc */
233 0x00, /* 0b/11 - ti */
234 CS4231_MODE2, /* 0c/12 - mi */
235 0x00, /* 0d/13 - lbc */
236 0x00, /* 0e/14 - pbru */
237 0x00, /* 0f/15 - pbrl */
238 0x80, /* 10/16 - afei */
239 0x01, /* 11/17 - afeii */
240 0x9f, /* 12/18 - llic */
241 0x9f, /* 13/19 - rlic */
242 0x00, /* 14/20 - tlb */
243 0x00, /* 15/21 - thb */
244 0x00, /* 16/22 - la3mic/reserved */
245 0x00, /* 17/23 - ra3mic/reserved */
246 0x00, /* 18/24 - afs */
247 0x00, /* 19/25 - lamoc/version */
248 0x00, /* 1a/26 - mioc */
249 0x00, /* 1b/27 - ramoc/reserved */
250 0x20, /* 1c/28 - cdfr */
251 0x00, /* 1d/29 - res4 */
252 0x00, /* 1e/30 - cbru */
253 0x00, /* 1f/31 - cbrl */
254};
255
256static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr)
257{
258 if (cp->flags & CS4231_FLAG_EBUS)
259 return readb(reg_addr);
260 else
261 return sbus_readb(reg_addr);
262}
263
264static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val,
265 void __iomem *reg_addr)
266{
267 if (cp->flags & CS4231_FLAG_EBUS)
268 return writeb(val, reg_addr);
269 else
270 return sbus_writeb(val, reg_addr);
271}
272
273/*
274 * Basic I/O functions
275 */
276
277static void snd_cs4231_ready(struct snd_cs4231 *chip)
278{
279 int timeout;
280
281 for (timeout = 250; timeout > 0; timeout--) {
282 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
283 if ((val & CS4231_INIT) == 0)
284 break;
285 udelay(100);
286 }
287}
288
289static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg,
290 unsigned char value)
291{
292 snd_cs4231_ready(chip);
293#ifdef CONFIG_SND_DEBUG
294 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
295 dev_dbg(chip->card->dev,
296 "out: auto calibration time out - reg = 0x%x, value = 0x%x\n",
297 reg, value);
298#endif
299 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
300 wmb();
301 __cs4231_writeb(chip, value, CS4231U(chip, REG));
302 mb();
303}
304
305static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
306 unsigned char mask, unsigned char value)
307{
308 unsigned char tmp = (chip->image[reg] & mask) | value;
309
310 chip->image[reg] = tmp;
311 if (!chip->calibrate_mute)
312 snd_cs4231_dout(chip, reg, tmp);
313}
314
315static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg,
316 unsigned char value)
317{
318 snd_cs4231_dout(chip, reg, value);
319 chip->image[reg] = value;
320 mb();
321}
322
323static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
324{
325 snd_cs4231_ready(chip);
326#ifdef CONFIG_SND_DEBUG
327 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
328 dev_dbg(chip->card->dev,
329 "in: auto calibration time out - reg = 0x%x\n",
330 reg);
331#endif
332 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
333 mb();
334 return __cs4231_readb(chip, CS4231U(chip, REG));
335}
336
337/*
338 * CS4231 detection / MCE routines
339 */
340
341static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
342{
343 int timeout;
344
345 /* looks like this sequence is proper for CS4231A chip (GUS MAX) */
346 for (timeout = 5; timeout > 0; timeout--)
347 __cs4231_readb(chip, CS4231U(chip, REGSEL));
348
349 /* end of cleanup sequence */
350 for (timeout = 500; timeout > 0; timeout--) {
351 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
352 if ((val & CS4231_INIT) == 0)
353 break;
354 msleep(1);
355 }
356}
357
358static void snd_cs4231_mce_up(struct snd_cs4231 *chip)
359{
360 unsigned long flags;
361 int timeout;
362
363 spin_lock_irqsave(&chip->lock, flags);
364 snd_cs4231_ready(chip);
365#ifdef CONFIG_SND_DEBUG
366 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
367 dev_dbg(chip->card->dev,
368 "mce_up - auto calibration time out (0)\n");
369#endif
370 chip->mce_bit |= CS4231_MCE;
371 timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL));
372 if (timeout == 0x80)
373 dev_dbg(chip->card->dev,
374 "mce_up [%p]: serious init problem - codec still busy\n",
375 chip->port);
376 if (!(timeout & CS4231_MCE))
377 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f),
378 CS4231U(chip, REGSEL));
379 spin_unlock_irqrestore(&chip->lock, flags);
380}
381
382static void snd_cs4231_mce_down(struct snd_cs4231 *chip)
383{
384 unsigned long flags, timeout;
385 int reg;
386
387 snd_cs4231_busy_wait(chip);
388 spin_lock_irqsave(&chip->lock, flags);
389#ifdef CONFIG_SND_DEBUG
390 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
391 dev_dbg(chip->card->dev,
392 "mce_down [%p] - auto calibration time out (0)\n",
393 CS4231U(chip, REGSEL));
394#endif
395 chip->mce_bit &= ~CS4231_MCE;
396 reg = __cs4231_readb(chip, CS4231U(chip, REGSEL));
397 __cs4231_writeb(chip, chip->mce_bit | (reg & 0x1f),
398 CS4231U(chip, REGSEL));
399 if (reg == 0x80)
400 dev_dbg(chip->card->dev,
401 "mce_down [%p]: serious init problem - codec still busy\n",
402 chip->port);
403 if ((reg & CS4231_MCE) == 0) {
404 spin_unlock_irqrestore(&chip->lock, flags);
405 return;
406 }
407
408 /*
409 * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low.
410 */
411 timeout = jiffies + msecs_to_jiffies(250);
412 do {
413 spin_unlock_irqrestore(&chip->lock, flags);
414 msleep(1);
415 spin_lock_irqsave(&chip->lock, flags);
416 reg = snd_cs4231_in(chip, CS4231_TEST_INIT);
417 reg &= CS4231_CALIB_IN_PROGRESS;
418 } while (reg && time_before(jiffies, timeout));
419 spin_unlock_irqrestore(&chip->lock, flags);
420
421 if (reg)
422 dev_err(chip->card->dev,
423 "mce_down - auto calibration time out (2)\n");
424}
425
426static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont,
427 struct snd_pcm_substream *substream,
428 unsigned int *periods_sent)
429{
430 struct snd_pcm_runtime *runtime = substream->runtime;
431
432 while (1) {
433 unsigned int period_size = snd_pcm_lib_period_bytes(substream);
434 unsigned int offset = period_size * (*periods_sent);
435
436 if (WARN_ON(period_size >= (1 << 24)))
437 return;
438
439 if (dma_cont->request(dma_cont,
440 runtime->dma_addr + offset, period_size))
441 return;
442 (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
443 }
444}
445
446static void cs4231_dma_trigger(struct snd_pcm_substream *substream,
447 unsigned int what, int on)
448{
449 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
450 struct cs4231_dma_control *dma_cont;
451
452 if (what & CS4231_PLAYBACK_ENABLE) {
453 dma_cont = &chip->p_dma;
454 if (on) {
455 dma_cont->prepare(dma_cont, 0);
456 dma_cont->enable(dma_cont, 1);
457 snd_cs4231_advance_dma(dma_cont,
458 chip->playback_substream,
459 &chip->p_periods_sent);
460 } else {
461 dma_cont->enable(dma_cont, 0);
462 }
463 }
464 if (what & CS4231_RECORD_ENABLE) {
465 dma_cont = &chip->c_dma;
466 if (on) {
467 dma_cont->prepare(dma_cont, 1);
468 dma_cont->enable(dma_cont, 1);
469 snd_cs4231_advance_dma(dma_cont,
470 chip->capture_substream,
471 &chip->c_periods_sent);
472 } else {
473 dma_cont->enable(dma_cont, 0);
474 }
475 }
476}
477
478static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd)
479{
480 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
481 int result = 0;
482
483 switch (cmd) {
484 case SNDRV_PCM_TRIGGER_START:
485 case SNDRV_PCM_TRIGGER_STOP:
486 {
487 unsigned int what = 0;
488 struct snd_pcm_substream *s;
489 unsigned long flags;
490
491 snd_pcm_group_for_each_entry(s, substream) {
492 if (s == chip->playback_substream) {
493 what |= CS4231_PLAYBACK_ENABLE;
494 snd_pcm_trigger_done(s, substream);
495 } else if (s == chip->capture_substream) {
496 what |= CS4231_RECORD_ENABLE;
497 snd_pcm_trigger_done(s, substream);
498 }
499 }
500
501 spin_lock_irqsave(&chip->lock, flags);
502 if (cmd == SNDRV_PCM_TRIGGER_START) {
503 cs4231_dma_trigger(substream, what, 1);
504 chip->image[CS4231_IFACE_CTRL] |= what;
505 } else {
506 cs4231_dma_trigger(substream, what, 0);
507 chip->image[CS4231_IFACE_CTRL] &= ~what;
508 }
509 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
510 chip->image[CS4231_IFACE_CTRL]);
511 spin_unlock_irqrestore(&chip->lock, flags);
512 break;
513 }
514 default:
515 result = -EINVAL;
516 break;
517 }
518
519 return result;
520}
521
522/*
523 * CODEC I/O
524 */
525
526static unsigned char snd_cs4231_get_rate(unsigned int rate)
527{
528 int i;
529
530 for (i = 0; i < 14; i++)
531 if (rate == rates[i])
532 return freq_bits[i];
533
534 return freq_bits[13];
535}
536
537static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format,
538 int channels)
539{
540 unsigned char rformat;
541
542 rformat = CS4231_LINEAR_8;
543 switch (format) {
544 case SNDRV_PCM_FORMAT_MU_LAW:
545 rformat = CS4231_ULAW_8;
546 break;
547 case SNDRV_PCM_FORMAT_A_LAW:
548 rformat = CS4231_ALAW_8;
549 break;
550 case SNDRV_PCM_FORMAT_S16_LE:
551 rformat = CS4231_LINEAR_16;
552 break;
553 case SNDRV_PCM_FORMAT_S16_BE:
554 rformat = CS4231_LINEAR_16_BIG;
555 break;
556 case SNDRV_PCM_FORMAT_IMA_ADPCM:
557 rformat = CS4231_ADPCM_16;
558 break;
559 }
560 if (channels > 1)
561 rformat |= CS4231_STEREO;
562 return rformat;
563}
564
565static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
566{
567 unsigned long flags;
568
569 mute = mute ? 1 : 0;
570 spin_lock_irqsave(&chip->lock, flags);
571 if (chip->calibrate_mute == mute) {
572 spin_unlock_irqrestore(&chip->lock, flags);
573 return;
574 }
575 if (!mute) {
576 snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
577 chip->image[CS4231_LEFT_INPUT]);
578 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
579 chip->image[CS4231_RIGHT_INPUT]);
580 snd_cs4231_dout(chip, CS4231_LOOPBACK,
581 chip->image[CS4231_LOOPBACK]);
582 }
583 snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
584 mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
585 snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
586 mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
587 snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
588 mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
589 snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
590 mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
591 snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
592 mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
593 snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
594 mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
595 snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
596 mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
597 snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
598 mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
599 snd_cs4231_dout(chip, CS4231_MONO_CTRL,
600 mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
601 chip->calibrate_mute = mute;
602 spin_unlock_irqrestore(&chip->lock, flags);
603}
604
605static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
606 struct snd_pcm_hw_params *params,
607 unsigned char pdfr)
608{
609 unsigned long flags;
610
611 mutex_lock(&chip->mce_mutex);
612 snd_cs4231_calibrate_mute(chip, 1);
613
614 snd_cs4231_mce_up(chip);
615
616 spin_lock_irqsave(&chip->lock, flags);
617 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
618 (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
619 (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
620 pdfr);
621 spin_unlock_irqrestore(&chip->lock, flags);
622
623 snd_cs4231_mce_down(chip);
624
625 snd_cs4231_calibrate_mute(chip, 0);
626 mutex_unlock(&chip->mce_mutex);
627}
628
629static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
630 struct snd_pcm_hw_params *params,
631 unsigned char cdfr)
632{
633 unsigned long flags;
634
635 mutex_lock(&chip->mce_mutex);
636 snd_cs4231_calibrate_mute(chip, 1);
637
638 snd_cs4231_mce_up(chip);
639
640 spin_lock_irqsave(&chip->lock, flags);
641 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
642 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
643 ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
644 (cdfr & 0x0f));
645 spin_unlock_irqrestore(&chip->lock, flags);
646 snd_cs4231_mce_down(chip);
647 snd_cs4231_mce_up(chip);
648 spin_lock_irqsave(&chip->lock, flags);
649 }
650 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
651 spin_unlock_irqrestore(&chip->lock, flags);
652
653 snd_cs4231_mce_down(chip);
654
655 snd_cs4231_calibrate_mute(chip, 0);
656 mutex_unlock(&chip->mce_mutex);
657}
658
659/*
660 * Timer interface
661 */
662
663static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer)
664{
665 struct snd_cs4231 *chip = snd_timer_chip(timer);
666
667 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
668}
669
670static int snd_cs4231_timer_start(struct snd_timer *timer)
671{
672 unsigned long flags;
673 unsigned int ticks;
674 struct snd_cs4231 *chip = snd_timer_chip(timer);
675
676 spin_lock_irqsave(&chip->lock, flags);
677 ticks = timer->sticks;
678 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
679 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
680 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
681 snd_cs4231_out(chip, CS4231_TIMER_HIGH,
682 chip->image[CS4231_TIMER_HIGH] =
683 (unsigned char) (ticks >> 8));
684 snd_cs4231_out(chip, CS4231_TIMER_LOW,
685 chip->image[CS4231_TIMER_LOW] =
686 (unsigned char) ticks);
687 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
688 chip->image[CS4231_ALT_FEATURE_1] |
689 CS4231_TIMER_ENABLE);
690 }
691 spin_unlock_irqrestore(&chip->lock, flags);
692
693 return 0;
694}
695
696static int snd_cs4231_timer_stop(struct snd_timer *timer)
697{
698 unsigned long flags;
699 struct snd_cs4231 *chip = snd_timer_chip(timer);
700
701 spin_lock_irqsave(&chip->lock, flags);
702 chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE;
703 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
704 chip->image[CS4231_ALT_FEATURE_1]);
705 spin_unlock_irqrestore(&chip->lock, flags);
706
707 return 0;
708}
709
710static void snd_cs4231_init(struct snd_cs4231 *chip)
711{
712 unsigned long flags;
713
714 snd_cs4231_mce_down(chip);
715
716#ifdef SNDRV_DEBUG_MCE
717 pr_debug("init: (1)\n");
718#endif
719 snd_cs4231_mce_up(chip);
720 spin_lock_irqsave(&chip->lock, flags);
721 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
722 CS4231_PLAYBACK_PIO |
723 CS4231_RECORD_ENABLE |
724 CS4231_RECORD_PIO |
725 CS4231_CALIB_MODE);
726 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
727 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
728 spin_unlock_irqrestore(&chip->lock, flags);
729 snd_cs4231_mce_down(chip);
730
731#ifdef SNDRV_DEBUG_MCE
732 pr_debug("init: (2)\n");
733#endif
734
735 snd_cs4231_mce_up(chip);
736 spin_lock_irqsave(&chip->lock, flags);
737 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
738 chip->image[CS4231_ALT_FEATURE_1]);
739 spin_unlock_irqrestore(&chip->lock, flags);
740 snd_cs4231_mce_down(chip);
741
742#ifdef SNDRV_DEBUG_MCE
743 pr_debug("init: (3) - afei = 0x%x\n",
744 chip->image[CS4231_ALT_FEATURE_1]);
745#endif
746
747 spin_lock_irqsave(&chip->lock, flags);
748 snd_cs4231_out(chip, CS4231_ALT_FEATURE_2,
749 chip->image[CS4231_ALT_FEATURE_2]);
750 spin_unlock_irqrestore(&chip->lock, flags);
751
752 snd_cs4231_mce_up(chip);
753 spin_lock_irqsave(&chip->lock, flags);
754 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
755 chip->image[CS4231_PLAYBK_FORMAT]);
756 spin_unlock_irqrestore(&chip->lock, flags);
757 snd_cs4231_mce_down(chip);
758
759#ifdef SNDRV_DEBUG_MCE
760 pr_debug("init: (4)\n");
761#endif
762
763 snd_cs4231_mce_up(chip);
764 spin_lock_irqsave(&chip->lock, flags);
765 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
766 spin_unlock_irqrestore(&chip->lock, flags);
767 snd_cs4231_mce_down(chip);
768
769#ifdef SNDRV_DEBUG_MCE
770 pr_debug("init: (5)\n");
771#endif
772}
773
774static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
775{
776 unsigned long flags;
777
778 mutex_lock(&chip->open_mutex);
779 if ((chip->mode & mode)) {
780 mutex_unlock(&chip->open_mutex);
781 return -EAGAIN;
782 }
783 if (chip->mode & CS4231_MODE_OPEN) {
784 chip->mode |= mode;
785 mutex_unlock(&chip->open_mutex);
786 return 0;
787 }
788 /* ok. now enable and ack CODEC IRQ */
789 spin_lock_irqsave(&chip->lock, flags);
790 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
791 CS4231_RECORD_IRQ |
792 CS4231_TIMER_IRQ);
793 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
794 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
795 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
796
797 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
798 CS4231_RECORD_IRQ |
799 CS4231_TIMER_IRQ);
800 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
801
802 spin_unlock_irqrestore(&chip->lock, flags);
803
804 chip->mode = mode;
805 mutex_unlock(&chip->open_mutex);
806 return 0;
807}
808
809static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
810{
811 unsigned long flags;
812
813 mutex_lock(&chip->open_mutex);
814 chip->mode &= ~mode;
815 if (chip->mode & CS4231_MODE_OPEN) {
816 mutex_unlock(&chip->open_mutex);
817 return;
818 }
819 snd_cs4231_calibrate_mute(chip, 1);
820
821 /* disable IRQ */
822 spin_lock_irqsave(&chip->lock, flags);
823 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
824 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
825 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
826
827 /* now disable record & playback */
828
829 if (chip->image[CS4231_IFACE_CTRL] &
830 (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
831 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
832 spin_unlock_irqrestore(&chip->lock, flags);
833 snd_cs4231_mce_up(chip);
834 spin_lock_irqsave(&chip->lock, flags);
835 chip->image[CS4231_IFACE_CTRL] &=
836 ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
837 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
838 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
839 chip->image[CS4231_IFACE_CTRL]);
840 spin_unlock_irqrestore(&chip->lock, flags);
841 snd_cs4231_mce_down(chip);
842 spin_lock_irqsave(&chip->lock, flags);
843 }
844
845 /* clear IRQ again */
846 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
847 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
848 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
849 spin_unlock_irqrestore(&chip->lock, flags);
850
851 snd_cs4231_calibrate_mute(chip, 0);
852
853 chip->mode = 0;
854 mutex_unlock(&chip->open_mutex);
855}
856
857/*
858 * timer open/close
859 */
860
861static int snd_cs4231_timer_open(struct snd_timer *timer)
862{
863 struct snd_cs4231 *chip = snd_timer_chip(timer);
864 snd_cs4231_open(chip, CS4231_MODE_TIMER);
865 return 0;
866}
867
868static int snd_cs4231_timer_close(struct snd_timer *timer)
869{
870 struct snd_cs4231 *chip = snd_timer_chip(timer);
871 snd_cs4231_close(chip, CS4231_MODE_TIMER);
872 return 0;
873}
874
875static const struct snd_timer_hardware snd_cs4231_timer_table = {
876 .flags = SNDRV_TIMER_HW_AUTO,
877 .resolution = 9945,
878 .ticks = 65535,
879 .open = snd_cs4231_timer_open,
880 .close = snd_cs4231_timer_close,
881 .c_resolution = snd_cs4231_timer_resolution,
882 .start = snd_cs4231_timer_start,
883 .stop = snd_cs4231_timer_stop,
884};
885
886/*
887 * ok.. exported functions..
888 */
889
890static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
891 struct snd_pcm_hw_params *hw_params)
892{
893 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
894 unsigned char new_pdfr;
895
896 new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
897 params_channels(hw_params)) |
898 snd_cs4231_get_rate(params_rate(hw_params));
899 snd_cs4231_playback_format(chip, hw_params, new_pdfr);
900
901 return 0;
902}
903
904static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
905{
906 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
907 struct snd_pcm_runtime *runtime = substream->runtime;
908 unsigned long flags;
909 int ret = 0;
910
911 spin_lock_irqsave(&chip->lock, flags);
912
913 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
914 CS4231_PLAYBACK_PIO);
915
916 if (WARN_ON(runtime->period_size > 0xffff + 1)) {
917 ret = -EINVAL;
918 goto out;
919 }
920
921 chip->p_periods_sent = 0;
922
923out:
924 spin_unlock_irqrestore(&chip->lock, flags);
925
926 return ret;
927}
928
929static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
930 struct snd_pcm_hw_params *hw_params)
931{
932 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
933 unsigned char new_cdfr;
934
935 new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
936 params_channels(hw_params)) |
937 snd_cs4231_get_rate(params_rate(hw_params));
938 snd_cs4231_capture_format(chip, hw_params, new_cdfr);
939
940 return 0;
941}
942
943static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
944{
945 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
946 unsigned long flags;
947
948 spin_lock_irqsave(&chip->lock, flags);
949 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
950 CS4231_RECORD_PIO);
951
952
953 chip->c_periods_sent = 0;
954 spin_unlock_irqrestore(&chip->lock, flags);
955
956 return 0;
957}
958
959static void snd_cs4231_overrange(struct snd_cs4231 *chip)
960{
961 unsigned long flags;
962 unsigned char res;
963
964 spin_lock_irqsave(&chip->lock, flags);
965 res = snd_cs4231_in(chip, CS4231_TEST_INIT);
966 spin_unlock_irqrestore(&chip->lock, flags);
967
968 /* detect overrange only above 0dB; may be user selectable? */
969 if (res & (0x08 | 0x02))
970 chip->capture_substream->runtime->overrange++;
971}
972
973static void snd_cs4231_play_callback(struct snd_cs4231 *chip)
974{
975 if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
976 snd_pcm_period_elapsed(chip->playback_substream);
977 snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream,
978 &chip->p_periods_sent);
979 }
980}
981
982static void snd_cs4231_capture_callback(struct snd_cs4231 *chip)
983{
984 if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
985 snd_pcm_period_elapsed(chip->capture_substream);
986 snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream,
987 &chip->c_periods_sent);
988 }
989}
990
991static snd_pcm_uframes_t snd_cs4231_playback_pointer(
992 struct snd_pcm_substream *substream)
993{
994 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
995 struct cs4231_dma_control *dma_cont = &chip->p_dma;
996 size_t ptr;
997
998 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
999 return 0;
1000 ptr = dma_cont->address(dma_cont);
1001 if (ptr != 0)
1002 ptr -= substream->runtime->dma_addr;
1003
1004 return bytes_to_frames(substream->runtime, ptr);
1005}
1006
1007static snd_pcm_uframes_t snd_cs4231_capture_pointer(
1008 struct snd_pcm_substream *substream)
1009{
1010 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1011 struct cs4231_dma_control *dma_cont = &chip->c_dma;
1012 size_t ptr;
1013
1014 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1015 return 0;
1016 ptr = dma_cont->address(dma_cont);
1017 if (ptr != 0)
1018 ptr -= substream->runtime->dma_addr;
1019
1020 return bytes_to_frames(substream->runtime, ptr);
1021}
1022
1023static int snd_cs4231_probe(struct snd_cs4231 *chip)
1024{
1025 unsigned long flags;
1026 int i;
1027 int id = 0;
1028 int vers = 0;
1029 unsigned char *ptr;
1030
1031 for (i = 0; i < 50; i++) {
1032 mb();
1033 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
1034 msleep(2);
1035 else {
1036 spin_lock_irqsave(&chip->lock, flags);
1037 snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1038 id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1039 vers = snd_cs4231_in(chip, CS4231_VERSION);
1040 spin_unlock_irqrestore(&chip->lock, flags);
1041 if (id == 0x0a)
1042 break; /* this is valid value */
1043 }
1044 }
1045 dev_dbg(chip->card->dev,
1046 "cs4231: port = %p, id = 0x%x\n", chip->port, id);
1047 if (id != 0x0a)
1048 return -ENODEV; /* no valid device found */
1049
1050 spin_lock_irqsave(&chip->lock, flags);
1051
1052 /* clear any pendings IRQ */
1053 __cs4231_readb(chip, CS4231U(chip, STATUS));
1054 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS));
1055 mb();
1056
1057 spin_unlock_irqrestore(&chip->lock, flags);
1058
1059 chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1060 chip->image[CS4231_IFACE_CTRL] =
1061 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
1062 chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1063 chip->image[CS4231_ALT_FEATURE_2] = 0x01;
1064 if (vers & 0x20)
1065 chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
1066
1067 ptr = (unsigned char *) &chip->image;
1068
1069 snd_cs4231_mce_down(chip);
1070
1071 spin_lock_irqsave(&chip->lock, flags);
1072
1073 for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
1074 snd_cs4231_out(chip, i, *ptr++);
1075
1076 spin_unlock_irqrestore(&chip->lock, flags);
1077
1078 snd_cs4231_mce_up(chip);
1079
1080 snd_cs4231_mce_down(chip);
1081
1082 mdelay(2);
1083
1084 return 0; /* all things are ok.. */
1085}
1086
1087static const struct snd_pcm_hardware snd_cs4231_playback = {
1088 .info = SNDRV_PCM_INFO_MMAP |
1089 SNDRV_PCM_INFO_INTERLEAVED |
1090 SNDRV_PCM_INFO_MMAP_VALID |
1091 SNDRV_PCM_INFO_SYNC_START,
1092 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1093 SNDRV_PCM_FMTBIT_A_LAW |
1094 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1095 SNDRV_PCM_FMTBIT_U8 |
1096 SNDRV_PCM_FMTBIT_S16_LE |
1097 SNDRV_PCM_FMTBIT_S16_BE,
1098 .rates = SNDRV_PCM_RATE_KNOT |
1099 SNDRV_PCM_RATE_8000_48000,
1100 .rate_min = 5510,
1101 .rate_max = 48000,
1102 .channels_min = 1,
1103 .channels_max = 2,
1104 .buffer_bytes_max = 32 * 1024,
1105 .period_bytes_min = 64,
1106 .period_bytes_max = 32 * 1024,
1107 .periods_min = 1,
1108 .periods_max = 1024,
1109};
1110
1111static const struct snd_pcm_hardware snd_cs4231_capture = {
1112 .info = SNDRV_PCM_INFO_MMAP |
1113 SNDRV_PCM_INFO_INTERLEAVED |
1114 SNDRV_PCM_INFO_MMAP_VALID |
1115 SNDRV_PCM_INFO_SYNC_START,
1116 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1117 SNDRV_PCM_FMTBIT_A_LAW |
1118 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1119 SNDRV_PCM_FMTBIT_U8 |
1120 SNDRV_PCM_FMTBIT_S16_LE |
1121 SNDRV_PCM_FMTBIT_S16_BE,
1122 .rates = SNDRV_PCM_RATE_KNOT |
1123 SNDRV_PCM_RATE_8000_48000,
1124 .rate_min = 5510,
1125 .rate_max = 48000,
1126 .channels_min = 1,
1127 .channels_max = 2,
1128 .buffer_bytes_max = 32 * 1024,
1129 .period_bytes_min = 64,
1130 .period_bytes_max = 32 * 1024,
1131 .periods_min = 1,
1132 .periods_max = 1024,
1133};
1134
1135static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1136{
1137 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1138 struct snd_pcm_runtime *runtime = substream->runtime;
1139 int err;
1140
1141 runtime->hw = snd_cs4231_playback;
1142
1143 err = snd_cs4231_open(chip, CS4231_MODE_PLAY);
1144 if (err < 0)
1145 return err;
1146 chip->playback_substream = substream;
1147 chip->p_periods_sent = 0;
1148 snd_pcm_set_sync(substream);
1149 snd_cs4231_xrate(runtime);
1150
1151 return 0;
1152}
1153
1154static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1155{
1156 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1157 struct snd_pcm_runtime *runtime = substream->runtime;
1158 int err;
1159
1160 runtime->hw = snd_cs4231_capture;
1161
1162 err = snd_cs4231_open(chip, CS4231_MODE_RECORD);
1163 if (err < 0)
1164 return err;
1165 chip->capture_substream = substream;
1166 chip->c_periods_sent = 0;
1167 snd_pcm_set_sync(substream);
1168 snd_cs4231_xrate(runtime);
1169
1170 return 0;
1171}
1172
1173static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1174{
1175 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1176
1177 snd_cs4231_close(chip, CS4231_MODE_PLAY);
1178 chip->playback_substream = NULL;
1179
1180 return 0;
1181}
1182
1183static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1184{
1185 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1186
1187 snd_cs4231_close(chip, CS4231_MODE_RECORD);
1188 chip->capture_substream = NULL;
1189
1190 return 0;
1191}
1192
1193/* XXX We can do some power-management, in particular on EBUS using
1194 * XXX the audio AUXIO register...
1195 */
1196
1197static const struct snd_pcm_ops snd_cs4231_playback_ops = {
1198 .open = snd_cs4231_playback_open,
1199 .close = snd_cs4231_playback_close,
1200 .hw_params = snd_cs4231_playback_hw_params,
1201 .prepare = snd_cs4231_playback_prepare,
1202 .trigger = snd_cs4231_trigger,
1203 .pointer = snd_cs4231_playback_pointer,
1204};
1205
1206static const struct snd_pcm_ops snd_cs4231_capture_ops = {
1207 .open = snd_cs4231_capture_open,
1208 .close = snd_cs4231_capture_close,
1209 .hw_params = snd_cs4231_capture_hw_params,
1210 .prepare = snd_cs4231_capture_prepare,
1211 .trigger = snd_cs4231_trigger,
1212 .pointer = snd_cs4231_capture_pointer,
1213};
1214
1215static int snd_cs4231_pcm(struct snd_card *card)
1216{
1217 struct snd_cs4231 *chip = card->private_data;
1218 struct snd_pcm *pcm;
1219 int err;
1220
1221 err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm);
1222 if (err < 0)
1223 return err;
1224
1225 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1226 &snd_cs4231_playback_ops);
1227 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1228 &snd_cs4231_capture_ops);
1229
1230 /* global setup */
1231 pcm->private_data = chip;
1232 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1233 strcpy(pcm->name, "CS4231");
1234
1235 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1236 &chip->op->dev, 64 * 1024, 128 * 1024);
1237
1238 chip->pcm = pcm;
1239
1240 return 0;
1241}
1242
1243static int snd_cs4231_timer(struct snd_card *card)
1244{
1245 struct snd_cs4231 *chip = card->private_data;
1246 struct snd_timer *timer;
1247 struct snd_timer_id tid;
1248 int err;
1249
1250 /* Timer initialization */
1251 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1252 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1253 tid.card = card->number;
1254 tid.device = 0;
1255 tid.subdevice = 0;
1256 err = snd_timer_new(card, "CS4231", &tid, &timer);
1257 if (err < 0)
1258 return err;
1259 strcpy(timer->name, "CS4231");
1260 timer->private_data = chip;
1261 timer->hw = snd_cs4231_timer_table;
1262 chip->timer = timer;
1263
1264 return 0;
1265}
1266
1267/*
1268 * MIXER part
1269 */
1270
1271static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol,
1272 struct snd_ctl_elem_info *uinfo)
1273{
1274 static const char * const texts[4] = {
1275 "Line", "CD", "Mic", "Mix"
1276 };
1277
1278 return snd_ctl_enum_info(uinfo, 2, 4, texts);
1279}
1280
1281static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol,
1282 struct snd_ctl_elem_value *ucontrol)
1283{
1284 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1285 unsigned long flags;
1286
1287 spin_lock_irqsave(&chip->lock, flags);
1288 ucontrol->value.enumerated.item[0] =
1289 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1290 ucontrol->value.enumerated.item[1] =
1291 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1292 spin_unlock_irqrestore(&chip->lock, flags);
1293
1294 return 0;
1295}
1296
1297static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol,
1298 struct snd_ctl_elem_value *ucontrol)
1299{
1300 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1301 unsigned long flags;
1302 unsigned short left, right;
1303 int change;
1304
1305 if (ucontrol->value.enumerated.item[0] > 3 ||
1306 ucontrol->value.enumerated.item[1] > 3)
1307 return -EINVAL;
1308 left = ucontrol->value.enumerated.item[0] << 6;
1309 right = ucontrol->value.enumerated.item[1] << 6;
1310
1311 spin_lock_irqsave(&chip->lock, flags);
1312
1313 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1314 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1315 change = left != chip->image[CS4231_LEFT_INPUT] ||
1316 right != chip->image[CS4231_RIGHT_INPUT];
1317 snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1318 snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1319
1320 spin_unlock_irqrestore(&chip->lock, flags);
1321
1322 return change;
1323}
1324
1325static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol,
1326 struct snd_ctl_elem_info *uinfo)
1327{
1328 int mask = (kcontrol->private_value >> 16) & 0xff;
1329
1330 uinfo->type = (mask == 1) ?
1331 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1332 uinfo->count = 1;
1333 uinfo->value.integer.min = 0;
1334 uinfo->value.integer.max = mask;
1335
1336 return 0;
1337}
1338
1339static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol,
1340 struct snd_ctl_elem_value *ucontrol)
1341{
1342 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1343 unsigned long flags;
1344 int reg = kcontrol->private_value & 0xff;
1345 int shift = (kcontrol->private_value >> 8) & 0xff;
1346 int mask = (kcontrol->private_value >> 16) & 0xff;
1347 int invert = (kcontrol->private_value >> 24) & 0xff;
1348
1349 spin_lock_irqsave(&chip->lock, flags);
1350
1351 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1352
1353 spin_unlock_irqrestore(&chip->lock, flags);
1354
1355 if (invert)
1356 ucontrol->value.integer.value[0] =
1357 (mask - ucontrol->value.integer.value[0]);
1358
1359 return 0;
1360}
1361
1362static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol,
1363 struct snd_ctl_elem_value *ucontrol)
1364{
1365 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1366 unsigned long flags;
1367 int reg = kcontrol->private_value & 0xff;
1368 int shift = (kcontrol->private_value >> 8) & 0xff;
1369 int mask = (kcontrol->private_value >> 16) & 0xff;
1370 int invert = (kcontrol->private_value >> 24) & 0xff;
1371 int change;
1372 unsigned short val;
1373
1374 val = (ucontrol->value.integer.value[0] & mask);
1375 if (invert)
1376 val = mask - val;
1377 val <<= shift;
1378
1379 spin_lock_irqsave(&chip->lock, flags);
1380
1381 val = (chip->image[reg] & ~(mask << shift)) | val;
1382 change = val != chip->image[reg];
1383 snd_cs4231_out(chip, reg, val);
1384
1385 spin_unlock_irqrestore(&chip->lock, flags);
1386
1387 return change;
1388}
1389
1390static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol,
1391 struct snd_ctl_elem_info *uinfo)
1392{
1393 int mask = (kcontrol->private_value >> 24) & 0xff;
1394
1395 uinfo->type = mask == 1 ?
1396 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1397 uinfo->count = 2;
1398 uinfo->value.integer.min = 0;
1399 uinfo->value.integer.max = mask;
1400
1401 return 0;
1402}
1403
1404static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol,
1405 struct snd_ctl_elem_value *ucontrol)
1406{
1407 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1408 unsigned long flags;
1409 int left_reg = kcontrol->private_value & 0xff;
1410 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1411 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1412 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1413 int mask = (kcontrol->private_value >> 24) & 0xff;
1414 int invert = (kcontrol->private_value >> 22) & 1;
1415
1416 spin_lock_irqsave(&chip->lock, flags);
1417
1418 ucontrol->value.integer.value[0] =
1419 (chip->image[left_reg] >> shift_left) & mask;
1420 ucontrol->value.integer.value[1] =
1421 (chip->image[right_reg] >> shift_right) & mask;
1422
1423 spin_unlock_irqrestore(&chip->lock, flags);
1424
1425 if (invert) {
1426 ucontrol->value.integer.value[0] =
1427 (mask - ucontrol->value.integer.value[0]);
1428 ucontrol->value.integer.value[1] =
1429 (mask - ucontrol->value.integer.value[1]);
1430 }
1431
1432 return 0;
1433}
1434
1435static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol,
1436 struct snd_ctl_elem_value *ucontrol)
1437{
1438 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1439 unsigned long flags;
1440 int left_reg = kcontrol->private_value & 0xff;
1441 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1442 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1443 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1444 int mask = (kcontrol->private_value >> 24) & 0xff;
1445 int invert = (kcontrol->private_value >> 22) & 1;
1446 int change;
1447 unsigned short val1, val2;
1448
1449 val1 = ucontrol->value.integer.value[0] & mask;
1450 val2 = ucontrol->value.integer.value[1] & mask;
1451 if (invert) {
1452 val1 = mask - val1;
1453 val2 = mask - val2;
1454 }
1455 val1 <<= shift_left;
1456 val2 <<= shift_right;
1457
1458 spin_lock_irqsave(&chip->lock, flags);
1459
1460 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1461 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1462 change = val1 != chip->image[left_reg];
1463 change |= val2 != chip->image[right_reg];
1464 snd_cs4231_out(chip, left_reg, val1);
1465 snd_cs4231_out(chip, right_reg, val2);
1466
1467 spin_unlock_irqrestore(&chip->lock, flags);
1468
1469 return change;
1470}
1471
1472#define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
1473{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1474 .info = snd_cs4231_info_single, \
1475 .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
1476 .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) }
1477
1478#define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \
1479 shift_right, mask, invert) \
1480{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1481 .info = snd_cs4231_info_double, \
1482 .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
1483 .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \
1484 ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) }
1485
1486static const struct snd_kcontrol_new snd_cs4231_controls[] = {
1487CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT,
1488 CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1489CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT,
1490 CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1491CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN,
1492 CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1493CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN,
1494 CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1495CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT,
1496 CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1497CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT,
1498 CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1499CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT,
1500 CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1501CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT,
1502 CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1503CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1504CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1505CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1506CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1507CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0,
1508 15, 0),
1509{
1510 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1511 .name = "Capture Source",
1512 .info = snd_cs4231_info_mux,
1513 .get = snd_cs4231_get_mux,
1514 .put = snd_cs4231_put_mux,
1515},
1516CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5,
1517 1, 0),
1518CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1519CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
1520/* SPARC specific uses of XCTL{0,1} general purpose outputs. */
1521CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
1522CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
1523};
1524
1525static int snd_cs4231_mixer(struct snd_card *card)
1526{
1527 struct snd_cs4231 *chip = card->private_data;
1528 int err, idx;
1529
1530 if (snd_BUG_ON(!chip || !chip->pcm))
1531 return -EINVAL;
1532
1533 strcpy(card->mixername, chip->pcm->name);
1534
1535 for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1536 err = snd_ctl_add(card,
1537 snd_ctl_new1(&snd_cs4231_controls[idx], chip));
1538 if (err < 0)
1539 return err;
1540 }
1541 return 0;
1542}
1543
1544static int dev;
1545
1546static int cs4231_attach_begin(struct platform_device *op,
1547 struct snd_card **rcard)
1548{
1549 struct snd_card *card;
1550 struct snd_cs4231 *chip;
1551 int err;
1552
1553 *rcard = NULL;
1554
1555 if (dev >= SNDRV_CARDS)
1556 return -ENODEV;
1557
1558 if (!enable[dev]) {
1559 dev++;
1560 return -ENOENT;
1561 }
1562
1563 err = snd_card_new(&op->dev, index[dev], id[dev], THIS_MODULE,
1564 sizeof(struct snd_cs4231), &card);
1565 if (err < 0)
1566 return err;
1567
1568 strcpy(card->driver, "CS4231");
1569 strcpy(card->shortname, "Sun CS4231");
1570
1571 chip = card->private_data;
1572 chip->card = card;
1573
1574 *rcard = card;
1575 return 0;
1576}
1577
1578static int cs4231_attach_finish(struct snd_card *card)
1579{
1580 struct snd_cs4231 *chip = card->private_data;
1581 int err;
1582
1583 err = snd_cs4231_pcm(card);
1584 if (err < 0)
1585 goto out_err;
1586
1587 err = snd_cs4231_mixer(card);
1588 if (err < 0)
1589 goto out_err;
1590
1591 err = snd_cs4231_timer(card);
1592 if (err < 0)
1593 goto out_err;
1594
1595 err = snd_card_register(card);
1596 if (err < 0)
1597 goto out_err;
1598
1599 dev_set_drvdata(&chip->op->dev, chip);
1600
1601 dev++;
1602 return 0;
1603
1604out_err:
1605 snd_card_free(card);
1606 return err;
1607}
1608
1609#ifdef SBUS_SUPPORT
1610
1611static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id)
1612{
1613 unsigned long flags;
1614 unsigned char status;
1615 u32 csr;
1616 struct snd_cs4231 *chip = dev_id;
1617
1618 /*This is IRQ is not raised by the cs4231*/
1619 if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ))
1620 return IRQ_NONE;
1621
1622 /* ACK the APC interrupt. */
1623 csr = sbus_readl(chip->port + APCCSR);
1624
1625 sbus_writel(csr, chip->port + APCCSR);
1626
1627 if ((csr & APC_PDMA_READY) &&
1628 (csr & APC_PLAY_INT) &&
1629 (csr & APC_XINT_PNVA) &&
1630 !(csr & APC_XINT_EMPT))
1631 snd_cs4231_play_callback(chip);
1632
1633 if ((csr & APC_CDMA_READY) &&
1634 (csr & APC_CAPT_INT) &&
1635 (csr & APC_XINT_CNVA) &&
1636 !(csr & APC_XINT_EMPT))
1637 snd_cs4231_capture_callback(chip);
1638
1639 status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
1640
1641 if (status & CS4231_TIMER_IRQ) {
1642 if (chip->timer)
1643 snd_timer_interrupt(chip->timer, chip->timer->sticks);
1644 }
1645
1646 if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY))
1647 snd_cs4231_overrange(chip);
1648
1649 /* ACK the CS4231 interrupt. */
1650 spin_lock_irqsave(&chip->lock, flags);
1651 snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1652 spin_unlock_irqrestore(&chip->lock, flags);
1653
1654 return IRQ_HANDLED;
1655}
1656
1657/*
1658 * SBUS DMA routines
1659 */
1660
1661static int sbus_dma_request(struct cs4231_dma_control *dma_cont,
1662 dma_addr_t bus_addr, size_t len)
1663{
1664 unsigned long flags;
1665 u32 test, csr;
1666 int err;
1667 struct sbus_dma_info *base = &dma_cont->sbus_info;
1668
1669 if (len >= (1 << 24))
1670 return -EINVAL;
1671 spin_lock_irqsave(&base->lock, flags);
1672 csr = sbus_readl(base->regs + APCCSR);
1673 err = -EINVAL;
1674 test = APC_CDMA_READY;
1675 if (base->dir == APC_PLAY)
1676 test = APC_PDMA_READY;
1677 if (!(csr & test))
1678 goto out;
1679 err = -EBUSY;
1680 test = APC_XINT_CNVA;
1681 if (base->dir == APC_PLAY)
1682 test = APC_XINT_PNVA;
1683 if (!(csr & test))
1684 goto out;
1685 err = 0;
1686 sbus_writel(bus_addr, base->regs + base->dir + APCNVA);
1687 sbus_writel(len, base->regs + base->dir + APCNC);
1688out:
1689 spin_unlock_irqrestore(&base->lock, flags);
1690 return err;
1691}
1692
1693static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d)
1694{
1695 unsigned long flags;
1696 u32 csr, test;
1697 struct sbus_dma_info *base = &dma_cont->sbus_info;
1698
1699 spin_lock_irqsave(&base->lock, flags);
1700 csr = sbus_readl(base->regs + APCCSR);
1701 test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA |
1702 APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL |
1703 APC_XINT_PENA;
1704 if (base->dir == APC_RECORD)
1705 test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA |
1706 APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL;
1707 csr |= test;
1708 sbus_writel(csr, base->regs + APCCSR);
1709 spin_unlock_irqrestore(&base->lock, flags);
1710}
1711
1712static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1713{
1714 unsigned long flags;
1715 u32 csr, shift;
1716 struct sbus_dma_info *base = &dma_cont->sbus_info;
1717
1718 spin_lock_irqsave(&base->lock, flags);
1719 if (!on) {
1720 sbus_writel(0, base->regs + base->dir + APCNC);
1721 sbus_writel(0, base->regs + base->dir + APCNVA);
1722 if (base->dir == APC_PLAY) {
1723 sbus_writel(0, base->regs + base->dir + APCC);
1724 sbus_writel(0, base->regs + base->dir + APCVA);
1725 }
1726
1727 udelay(1200);
1728 }
1729 csr = sbus_readl(base->regs + APCCSR);
1730 shift = 0;
1731 if (base->dir == APC_PLAY)
1732 shift = 1;
1733 if (on)
1734 csr &= ~(APC_CPAUSE << shift);
1735 else
1736 csr |= (APC_CPAUSE << shift);
1737 sbus_writel(csr, base->regs + APCCSR);
1738 if (on)
1739 csr |= (APC_CDMA_READY << shift);
1740 else
1741 csr &= ~(APC_CDMA_READY << shift);
1742 sbus_writel(csr, base->regs + APCCSR);
1743
1744 spin_unlock_irqrestore(&base->lock, flags);
1745}
1746
1747static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont)
1748{
1749 struct sbus_dma_info *base = &dma_cont->sbus_info;
1750
1751 return sbus_readl(base->regs + base->dir + APCVA);
1752}
1753
1754/*
1755 * Init and exit routines
1756 */
1757
1758static int snd_cs4231_sbus_free(struct snd_cs4231 *chip)
1759{
1760 struct platform_device *op = chip->op;
1761
1762 if (chip->irq[0])
1763 free_irq(chip->irq[0], chip);
1764
1765 if (chip->port)
1766 of_iounmap(&op->resource[0], chip->port, chip->regs_size);
1767
1768 return 0;
1769}
1770
1771static int snd_cs4231_sbus_dev_free(struct snd_device *device)
1772{
1773 struct snd_cs4231 *cp = device->device_data;
1774
1775 return snd_cs4231_sbus_free(cp);
1776}
1777
1778static const struct snd_device_ops snd_cs4231_sbus_dev_ops = {
1779 .dev_free = snd_cs4231_sbus_dev_free,
1780};
1781
1782static int snd_cs4231_sbus_create(struct snd_card *card,
1783 struct platform_device *op,
1784 int dev)
1785{
1786 struct snd_cs4231 *chip = card->private_data;
1787 int err;
1788
1789 spin_lock_init(&chip->lock);
1790 spin_lock_init(&chip->c_dma.sbus_info.lock);
1791 spin_lock_init(&chip->p_dma.sbus_info.lock);
1792 mutex_init(&chip->mce_mutex);
1793 mutex_init(&chip->open_mutex);
1794 chip->op = op;
1795 chip->regs_size = resource_size(&op->resource[0]);
1796 memcpy(&chip->image, &snd_cs4231_original_image,
1797 sizeof(snd_cs4231_original_image));
1798
1799 chip->port = of_ioremap(&op->resource[0], 0,
1800 chip->regs_size, "cs4231");
1801 if (!chip->port) {
1802 dev_dbg(chip->card->dev,
1803 "cs4231-%d: Unable to map chip registers.\n", dev);
1804 return -EIO;
1805 }
1806
1807 chip->c_dma.sbus_info.regs = chip->port;
1808 chip->p_dma.sbus_info.regs = chip->port;
1809 chip->c_dma.sbus_info.dir = APC_RECORD;
1810 chip->p_dma.sbus_info.dir = APC_PLAY;
1811
1812 chip->p_dma.prepare = sbus_dma_prepare;
1813 chip->p_dma.enable = sbus_dma_enable;
1814 chip->p_dma.request = sbus_dma_request;
1815 chip->p_dma.address = sbus_dma_addr;
1816
1817 chip->c_dma.prepare = sbus_dma_prepare;
1818 chip->c_dma.enable = sbus_dma_enable;
1819 chip->c_dma.request = sbus_dma_request;
1820 chip->c_dma.address = sbus_dma_addr;
1821
1822 if (request_irq(op->archdata.irqs[0], snd_cs4231_sbus_interrupt,
1823 IRQF_SHARED, "cs4231", chip)) {
1824 dev_dbg(chip->card->dev,
1825 "cs4231-%d: Unable to grab SBUS IRQ %d\n",
1826 dev, op->archdata.irqs[0]);
1827 snd_cs4231_sbus_free(chip);
1828 return -EBUSY;
1829 }
1830 chip->irq[0] = op->archdata.irqs[0];
1831
1832 if (snd_cs4231_probe(chip) < 0) {
1833 snd_cs4231_sbus_free(chip);
1834 return -ENODEV;
1835 }
1836 snd_cs4231_init(chip);
1837
1838 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
1839 chip, &snd_cs4231_sbus_dev_ops);
1840 if (err < 0) {
1841 snd_cs4231_sbus_free(chip);
1842 return err;
1843 }
1844
1845 return 0;
1846}
1847
1848static int cs4231_sbus_probe(struct platform_device *op)
1849{
1850 struct resource *rp = &op->resource[0];
1851 struct snd_card *card;
1852 int err;
1853
1854 err = cs4231_attach_begin(op, &card);
1855 if (err)
1856 return err;
1857
1858 sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d",
1859 card->shortname,
1860 rp->flags & 0xffL,
1861 (unsigned long long)rp->start,
1862 op->archdata.irqs[0]);
1863
1864 err = snd_cs4231_sbus_create(card, op, dev);
1865 if (err < 0) {
1866 snd_card_free(card);
1867 return err;
1868 }
1869
1870 return cs4231_attach_finish(card);
1871}
1872#endif
1873
1874#ifdef EBUS_SUPPORT
1875
1876static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event,
1877 void *cookie)
1878{
1879 struct snd_cs4231 *chip = cookie;
1880
1881 snd_cs4231_play_callback(chip);
1882}
1883
1884static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p,
1885 int event, void *cookie)
1886{
1887 struct snd_cs4231 *chip = cookie;
1888
1889 snd_cs4231_capture_callback(chip);
1890}
1891
1892/*
1893 * EBUS DMA wrappers
1894 */
1895
1896static int _ebus_dma_request(struct cs4231_dma_control *dma_cont,
1897 dma_addr_t bus_addr, size_t len)
1898{
1899 return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len);
1900}
1901
1902static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1903{
1904 ebus_dma_enable(&dma_cont->ebus_info, on);
1905}
1906
1907static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir)
1908{
1909 ebus_dma_prepare(&dma_cont->ebus_info, dir);
1910}
1911
1912static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont)
1913{
1914 return ebus_dma_addr(&dma_cont->ebus_info);
1915}
1916
1917/*
1918 * Init and exit routines
1919 */
1920
1921static int snd_cs4231_ebus_free(struct snd_cs4231 *chip)
1922{
1923 struct platform_device *op = chip->op;
1924
1925 if (chip->c_dma.ebus_info.regs) {
1926 ebus_dma_unregister(&chip->c_dma.ebus_info);
1927 of_iounmap(&op->resource[2], chip->c_dma.ebus_info.regs, 0x10);
1928 }
1929 if (chip->p_dma.ebus_info.regs) {
1930 ebus_dma_unregister(&chip->p_dma.ebus_info);
1931 of_iounmap(&op->resource[1], chip->p_dma.ebus_info.regs, 0x10);
1932 }
1933
1934 if (chip->port)
1935 of_iounmap(&op->resource[0], chip->port, 0x10);
1936
1937 return 0;
1938}
1939
1940static int snd_cs4231_ebus_dev_free(struct snd_device *device)
1941{
1942 struct snd_cs4231 *cp = device->device_data;
1943
1944 return snd_cs4231_ebus_free(cp);
1945}
1946
1947static const struct snd_device_ops snd_cs4231_ebus_dev_ops = {
1948 .dev_free = snd_cs4231_ebus_dev_free,
1949};
1950
1951static int snd_cs4231_ebus_create(struct snd_card *card,
1952 struct platform_device *op,
1953 int dev)
1954{
1955 struct snd_cs4231 *chip = card->private_data;
1956 int err;
1957
1958 spin_lock_init(&chip->lock);
1959 spin_lock_init(&chip->c_dma.ebus_info.lock);
1960 spin_lock_init(&chip->p_dma.ebus_info.lock);
1961 mutex_init(&chip->mce_mutex);
1962 mutex_init(&chip->open_mutex);
1963 chip->flags |= CS4231_FLAG_EBUS;
1964 chip->op = op;
1965 memcpy(&chip->image, &snd_cs4231_original_image,
1966 sizeof(snd_cs4231_original_image));
1967 strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)");
1968 chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1969 chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback;
1970 chip->c_dma.ebus_info.client_cookie = chip;
1971 chip->c_dma.ebus_info.irq = op->archdata.irqs[0];
1972 strcpy(chip->p_dma.ebus_info.name, "cs4231(play)");
1973 chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1974 chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback;
1975 chip->p_dma.ebus_info.client_cookie = chip;
1976 chip->p_dma.ebus_info.irq = op->archdata.irqs[1];
1977
1978 chip->p_dma.prepare = _ebus_dma_prepare;
1979 chip->p_dma.enable = _ebus_dma_enable;
1980 chip->p_dma.request = _ebus_dma_request;
1981 chip->p_dma.address = _ebus_dma_addr;
1982
1983 chip->c_dma.prepare = _ebus_dma_prepare;
1984 chip->c_dma.enable = _ebus_dma_enable;
1985 chip->c_dma.request = _ebus_dma_request;
1986 chip->c_dma.address = _ebus_dma_addr;
1987
1988 chip->port = of_ioremap(&op->resource[0], 0, 0x10, "cs4231");
1989 chip->p_dma.ebus_info.regs =
1990 of_ioremap(&op->resource[1], 0, 0x10, "cs4231_pdma");
1991 chip->c_dma.ebus_info.regs =
1992 of_ioremap(&op->resource[2], 0, 0x10, "cs4231_cdma");
1993 if (!chip->port || !chip->p_dma.ebus_info.regs ||
1994 !chip->c_dma.ebus_info.regs) {
1995 snd_cs4231_ebus_free(chip);
1996 dev_dbg(chip->card->dev,
1997 "cs4231-%d: Unable to map chip registers.\n", dev);
1998 return -EIO;
1999 }
2000
2001 if (ebus_dma_register(&chip->c_dma.ebus_info)) {
2002 snd_cs4231_ebus_free(chip);
2003 dev_dbg(chip->card->dev,
2004 "cs4231-%d: Unable to register EBUS capture DMA\n",
2005 dev);
2006 return -EBUSY;
2007 }
2008 if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) {
2009 snd_cs4231_ebus_free(chip);
2010 dev_dbg(chip->card->dev,
2011 "cs4231-%d: Unable to enable EBUS capture IRQ\n",
2012 dev);
2013 return -EBUSY;
2014 }
2015
2016 if (ebus_dma_register(&chip->p_dma.ebus_info)) {
2017 snd_cs4231_ebus_free(chip);
2018 dev_dbg(chip->card->dev,
2019 "cs4231-%d: Unable to register EBUS play DMA\n",
2020 dev);
2021 return -EBUSY;
2022 }
2023 if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) {
2024 snd_cs4231_ebus_free(chip);
2025 dev_dbg(chip->card->dev,
2026 "cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
2027 return -EBUSY;
2028 }
2029
2030 if (snd_cs4231_probe(chip) < 0) {
2031 snd_cs4231_ebus_free(chip);
2032 return -ENODEV;
2033 }
2034 snd_cs4231_init(chip);
2035
2036 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2037 chip, &snd_cs4231_ebus_dev_ops);
2038 if (err < 0) {
2039 snd_cs4231_ebus_free(chip);
2040 return err;
2041 }
2042
2043 return 0;
2044}
2045
2046static int cs4231_ebus_probe(struct platform_device *op)
2047{
2048 struct snd_card *card;
2049 int err;
2050
2051 err = cs4231_attach_begin(op, &card);
2052 if (err)
2053 return err;
2054
2055 sprintf(card->longname, "%s at 0x%llx, irq %d",
2056 card->shortname,
2057 op->resource[0].start,
2058 op->archdata.irqs[0]);
2059
2060 err = snd_cs4231_ebus_create(card, op, dev);
2061 if (err < 0) {
2062 snd_card_free(card);
2063 return err;
2064 }
2065
2066 return cs4231_attach_finish(card);
2067}
2068#endif
2069
2070static int cs4231_probe(struct platform_device *op)
2071{
2072#ifdef EBUS_SUPPORT
2073 if (of_node_name_eq(op->dev.of_node->parent, "ebus"))
2074 return cs4231_ebus_probe(op);
2075#endif
2076#ifdef SBUS_SUPPORT
2077 if (of_node_name_eq(op->dev.of_node->parent, "sbus") ||
2078 of_node_name_eq(op->dev.of_node->parent, "sbi"))
2079 return cs4231_sbus_probe(op);
2080#endif
2081 return -ENODEV;
2082}
2083
2084static void cs4231_remove(struct platform_device *op)
2085{
2086 struct snd_cs4231 *chip = dev_get_drvdata(&op->dev);
2087
2088 snd_card_free(chip->card);
2089}
2090
2091static const struct of_device_id cs4231_match[] = {
2092 {
2093 .name = "SUNW,CS4231",
2094 },
2095 {
2096 .name = "audio",
2097 .compatible = "SUNW,CS4231",
2098 },
2099 {},
2100};
2101
2102MODULE_DEVICE_TABLE(of, cs4231_match);
2103
2104static struct platform_driver cs4231_driver = {
2105 .driver = {
2106 .name = "audio",
2107 .of_match_table = cs4231_match,
2108 },
2109 .probe = cs4231_probe,
2110 .remove = cs4231_remove,
2111};
2112
2113module_platform_driver(cs4231_driver);