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1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _WD719X_H_
3#define _WD719X_H_
4
5#define WD719X_SG 255 /* Scatter/gather size */
6
7struct wd719x_sglist {
8 __le32 ptr;
9 __le32 length;
10} __packed;
11
12enum wd719x_card_type {
13 WD719X_TYPE_UNKNOWN = 0,
14 WD719X_TYPE_7193,
15 WD719X_TYPE_7197,
16 WD719X_TYPE_7296,
17};
18
19union wd719x_regs {
20 __le32 all; /* All Status at once */
21 struct {
22 u8 OPC; /* Opcode register */
23 u8 SCSI; /* SCSI Errors */
24 u8 SUE; /* Spider unique Errors */
25 u8 INT; /* Interrupt Status */
26 } bytes;
27};
28
29/* Spider Command Block (SCB) */
30struct wd719x_scb {
31 __le32 Int_SCB; /* 00-03 Internal SCB link pointer (must be cleared) */
32 u8 SCB_opcode; /* 04 SCB Command opcode */
33 u8 CDB_tag; /* 05 SCSI Tag byte for CDB queues (0 if untagged) */
34 u8 lun; /* 06 SCSI LUN */
35 u8 devid; /* 07 SCSI Device ID */
36 u8 CDB[16]; /* 08-23 SCSI CDB (16 bytes as defined by ANSI spec. */
37 __le32 data_p; /* 24-27 Data transfer address (or SG list address) */
38 __le32 data_length; /* 28-31 Data transfer Length (or SG list length) */
39 __le32 CDB_link; /* 32-35 SCSI CDB Link Ptr */
40 __le32 sense_buf; /* 36-39 Auto request sense buffer address */
41 u8 sense_buf_length;/* 40 Auto request sense transfer length */
42 u8 reserved; /* 41 reserved */
43 u8 SCB_options; /* 42 SCB-options */
44 u8 SCB_tag_msg; /* 43 Tagged messages options */
45 /* Not filled in by host */
46 __le32 req_ptr; /* 44-47 Ptr to Host Request returned on interrupt */
47 u8 host_opcode; /* 48 Host Command Opcode (same as AMR_00) */
48 u8 scsi_stat; /* 49 SCSI Status returned */
49 u8 ret_error; /* 50 SPIDER Unique Error Code returned (SUE) */
50 u8 int_stat; /* 51 Message u8 / Interrupt Status byte returned */
51 __le32 transferred; /* 52-55 Bytes Transferred */
52 u8 last_trans[3]; /* 56-58 Bytes Transferred in last session */
53 u8 length; /* 59 SCSI Messages Length (1-8) */
54 u8 sync_offset; /* 60 Synchronous offset */
55 u8 sync_rate; /* 61 Synchronous rate */
56 u8 flags[2]; /* 62-63 SCB specific flags (local to each thread) */
57 /* everything below is for driver use (not used by card) */
58 dma_addr_t phys; /* bus address of the SCB */
59 dma_addr_t dma_handle;
60 struct scsi_cmnd *cmd; /* a copy of the pointer we were passed */
61 struct list_head list;
62 struct wd719x_sglist sg_list[WD719X_SG] __aligned(8); /* SG list */
63} __packed;
64
65struct wd719x {
66 struct Scsi_Host *sh; /* pointer to host structure */
67 struct pci_dev *pdev;
68 void __iomem *base;
69 enum wd719x_card_type type; /* type of card */
70 void *fw_virt; /* firmware buffer CPU address */
71 dma_addr_t fw_phys; /* firmware buffer bus address */
72 size_t fw_size; /* firmware buffer size */
73 struct wd719x_host_param *params; /* host parameters (EEPROM) */
74 dma_addr_t params_phys; /* host parameters bus address */
75 void *hash_virt; /* hash table CPU address */
76 dma_addr_t hash_phys; /* hash table bus address */
77 struct list_head active_scbs;
78};
79
80/* timeout delays in microsecs */
81#define WD719X_WAIT_FOR_CMD_READY 500
82#define WD719X_WAIT_FOR_RISC 2000
83#define WD719X_WAIT_FOR_SCSI_RESET 3000000
84
85/* All commands except 0x00 generate an interrupt */
86#define WD719X_CMD_READY 0x00 /* Command register ready (or noop) */
87#define WD719X_CMD_INIT_RISC 0x01 /* Initialize RISC */
88/* 0x02 is reserved */
89#define WD719X_CMD_BUSRESET 0x03 /* Assert SCSI bus reset */
90#define WD719X_CMD_READ_FIRMVER 0x04 /* Read the Firmware Revision */
91#define WD719X_CMD_ECHO_BYTES 0x05 /* Echo command bytes (DW) */
92/* 0x06 is reserved */
93/* 0x07 is reserved */
94#define WD719X_CMD_GET_PARAM 0x08 /* Get programmable parameters */
95#define WD719X_CMD_SET_PARAM 0x09 /* Set programmable parameters */
96#define WD719X_CMD_SLEEP 0x0a /* Put SPIDER to sleep */
97#define WD719X_CMD_READ_INIT 0x0b /* Read initialization parameters */
98#define WD719X_CMD_RESTORE_INIT 0x0c /* Restore initialization parameters */
99/* 0x0d is reserved */
100/* 0x0e is reserved */
101/* 0x0f is reserved */
102#define WD719X_CMD_ABORT_TAG 0x10 /* Send Abort tag message to target */
103#define WD719X_CMD_ABORT 0x11 /* Send Abort message to target */
104#define WD719X_CMD_RESET 0x12 /* Send Reset message to target */
105#define WD719X_CMD_INIT_SCAM 0x13 /* Initiate SCAM */
106#define WD719X_CMD_GET_SYNC 0x14 /* Get synchronous rates */
107#define WD719X_CMD_SET_SYNC 0x15 /* Set synchronous rates */
108#define WD719X_CMD_GET_WIDTH 0x16 /* Get SCSI bus width */
109#define WD719X_CMD_SET_WIDTH 0x17 /* Set SCSI bus width */
110#define WD719X_CMD_GET_TAGS 0x18 /* Get tag flags */
111#define WD719X_CMD_SET_TAGS 0x19 /* Set tag flags */
112#define WD719X_CMD_GET_PARAM2 0x1a /* Get programmable params (format 2) */
113#define WD719X_CMD_SET_PARAM2 0x1b /* Set programmable params (format 2) */
114/* Commands with request pointers (mailbox) */
115#define WD719X_CMD_PROCESS_SCB 0x80 /* Process SCSI Control Block (SCB) */
116/* No interrupt generated on acceptance of SCB pointer */
117
118/* interrupt status defines */
119#define WD719X_INT_NONE 0x00 /* No interrupt pending */
120#define WD719X_INT_NOERRORS 0x01 /* Command completed with no errors */
121#define WD719X_INT_LINKNOERRORS 0x02 /* link cmd completed with no errors */
122#define WD719X_INT_LINKNOSTATUS 0x03 /* link cmd completed with no flag set */
123#define WD719X_INT_ERRORSLOGGED 0x04 /* cmd completed with errors logged */
124#define WD719X_INT_SPIDERFAILED 0x05 /* cmd failed without valid SCSI status */
125#define WD719X_INT_BADINT 0x80 /* unsolicited interrupt */
126#define WD719X_INT_PIOREADY 0xf0 /* data ready for PIO output */
127
128/* Spider Unique Error Codes (SUE) */
129#define WD719X_SUE_NOERRORS 0x00 /* No errors detected by SPIDER */
130#define WD719X_SUE_REJECTED 0x01 /* Command Rejected (bad opcode/param) */
131#define WD719X_SUE_SCBQFULL 0x02 /* SCB queue full */
132/* 0x03 is reserved */
133#define WD719X_SUE_TERM 0x04 /* Host terminated SCB via primative cmd */
134#define WD719X_SUE_CHAN1PAR 0x05 /* PCI Channel 1 parity error occurred */
135#define WD719X_SUE_CHAN1ABORT 0x06 /* PCI Channel 1 system abort occurred */
136#define WD719X_SUE_CHAN23PAR 0x07 /* PCI Channel 2/3 parity error occurred */
137#define WD719X_SUE_CHAN23ABORT 0x08 /* PCI Channel 2/3 system abort occurred */
138#define WD719X_SUE_TIMEOUT 0x10 /* Selection/reselection timeout */
139#define WD719X_SUE_RESET 0x11 /* SCSI bus reset occurred */
140#define WD719X_SUE_BUSERROR 0x12 /* SCSI bus error */
141#define WD719X_SUE_WRONGWAY 0x13 /* Wrong data transfer dir set by target */
142#define WD719X_SUE_BADPHASE 0x14 /* SCSI phase illegal or unexpected */
143#define WD719X_SUE_TOOLONG 0x15 /* target requested too much data */
144#define WD719X_SUE_BUSFREE 0x16 /* Unexpected SCSI bus free */
145#define WD719X_SUE_ARSDONE 0x17 /* Auto request sense executed */
146#define WD719X_SUE_IGNORED 0x18 /* SCSI message was ignored by target */
147#define WD719X_SUE_WRONGTAGS 0x19 /* Tagged SCB & tags off (or vice versa) */
148#define WD719X_SUE_BADTAGS 0x1a /* Wrong tag message type for target */
149#define WD719X_SUE_NOSCAMID 0x1b /* No SCAM soft ID available */
150
151/* code sizes */
152#define WD719X_HASH_TABLE_SIZE 4096
153
154/* Advanced Mode Registers */
155/* Regs 0x00..0x1f are for Advanced Mode of the card (RISC is running). */
156#define WD719X_AMR_COMMAND 0x00
157#define WD719X_AMR_CMD_PARAM 0x01
158#define WD719X_AMR_CMD_PARAM_2 0x02
159#define WD719X_AMR_CMD_PARAM_3 0x03
160#define WD719X_AMR_SCB_IN 0x04
161
162#define WD719X_AMR_BIOS_SHARE_INT 0x0f
163
164#define WD719X_AMR_SCB_OUT 0x18
165#define WD719X_AMR_OP_CODE 0x1c
166#define WD719X_AMR_SCSI_STATUS 0x1d
167#define WD719X_AMR_SCB_ERROR 0x1e
168#define WD719X_AMR_INT_STATUS 0x1f
169
170#define WD719X_DISABLE_INT 0x80
171
172/* SCB flags */
173#define WD719X_SCB_FLAGS_CHECK_DIRECTION 0x01
174#define WD719X_SCB_FLAGS_PCI_TO_SCSI 0x02
175#define WD719X_SCB_FLAGS_AUTO_REQUEST_SENSE 0x10
176#define WD719X_SCB_FLAGS_DO_SCATTER_GATHER 0x20
177#define WD719X_SCB_FLAGS_NO_DISCONNECT 0x40
178
179/* PCI Registers used for reset, initial code download */
180/* Regs 0x20..0x3f are for Normal (DOS) mode (RISC is asleep). */
181#define WD719X_PCI_GPIO_CONTROL 0x3C
182#define WD719X_PCI_GPIO_DATA 0x3D
183#define WD719X_PCI_PORT_RESET 0x3E
184#define WD719X_PCI_MODE_SELECT 0x3F
185
186#define WD719X_PCI_EXTERNAL_ADDR 0x60
187#define WD719X_PCI_INTERNAL_ADDR 0x64
188#define WD719X_PCI_DMA_TRANSFER_SIZE 0x66
189#define WD719X_PCI_CHANNEL2_3CMD 0x68
190#define WD719X_PCI_CHANNEL2_3STATUS 0x69
191
192#define WD719X_GPIO_ID_BITS 0x0a
193#define WD719X_PRAM_BASE_ADDR 0x00
194
195/* codes written to or read from the card */
196#define WD719X_PCI_RESET 0x01
197#define WD719X_ENABLE_ADVANCE_MODE 0x01
198
199#define WD719X_START_CHANNEL2_3DMA 0x17
200#define WD719X_START_CHANNEL2_3DONE 0x01
201#define WD719X_START_CHANNEL2_3ABORT 0x20
202
203/* 33C296 GPIO bits for EEPROM pins */
204#define WD719X_EE_DI (1 << 1)
205#define WD719X_EE_CS (1 << 2)
206#define WD719X_EE_CLK (1 << 3)
207#define WD719X_EE_DO (1 << 4)
208
209/* EEPROM contents */
210struct wd719x_eeprom_header {
211 u8 sig1;
212 u8 sig2;
213 u8 version;
214 u8 checksum;
215 u8 cfg_offset;
216 u8 cfg_size;
217 u8 setup_offset;
218 u8 setup_size;
219} __packed;
220
221#define WD719X_EE_SIG1 0
222#define WD719X_EE_SIG2 1
223#define WD719X_EE_VERSION 2
224#define WD719X_EE_CHECKSUM 3
225#define WD719X_EE_CFG_OFFSET 4
226#define WD719X_EE_CFG_SIZE 5
227#define WD719X_EE_SETUP_OFFSET 6
228#define WD719X_EE_SETUP_SIZE 7
229
230#define WD719X_EE_SCSI_ID_MASK 0xf
231
232/* SPIDER Host Parameters Block (=EEPROM configuration block) */
233struct wd719x_host_param {
234 u8 ch_1_th; /* FIFO threshold */
235 u8 scsi_conf; /* SCSI configuration */
236 u8 own_scsi_id; /* controller SCSI ID */
237 u8 sel_timeout; /* selection timeout*/
238 u8 sleep_timer; /* seep timer */
239 __le16 cdb_size;/* CDB size groups */
240 __le16 tag_en; /* Tag msg enables (ID 0-15) */
241 u8 scsi_pad; /* SCSI pad control */
242 __le32 wide; /* WIDE msg options (ID 0-15) */
243 __le32 sync; /* SYNC msg options (ID 0-15) */
244 u8 soft_mask; /* soft error mask */
245 u8 unsol_mask; /* unsolicited error mask */
246} __packed;
247
248#endif /* _WD719X_H_ */