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1// SPDX-License-Identifier: GPL-2.0-only
2/****************************************************************************
3 * Driver for Solarflare network controllers and boards
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2013 Solarflare Communications Inc.
6 */
7
8#include <linux/pci.h>
9#include <linux/tcp.h>
10#include <linux/ip.h>
11#include <linux/in.h>
12#include <linux/ipv6.h>
13#include <linux/slab.h>
14#include <net/ipv6.h>
15#include <linux/if_ether.h>
16#include <linux/highmem.h>
17#include <linux/cache.h>
18#include "net_driver.h"
19#include "efx.h"
20#include "io.h"
21#include "nic.h"
22#include "tx.h"
23#include "tx_common.h"
24#include "workarounds.h"
25#include "ef10_regs.h"
26
27#ifdef EFX_USE_PIO
28
29#define EFX_PIOBUF_SIZE_DEF ALIGN(256, L1_CACHE_BYTES)
30unsigned int efx_piobuf_size __read_mostly = EFX_PIOBUF_SIZE_DEF;
31
32#endif /* EFX_USE_PIO */
33
34static inline u8 *efx_tx_get_copy_buffer(struct efx_tx_queue *tx_queue,
35 struct efx_tx_buffer *buffer)
36{
37 unsigned int index = efx_tx_queue_get_insert_index(tx_queue);
38 struct efx_buffer *page_buf =
39 &tx_queue->cb_page[index >> (PAGE_SHIFT - EFX_TX_CB_ORDER)];
40 unsigned int offset =
41 ((index << EFX_TX_CB_ORDER) + NET_IP_ALIGN) & (PAGE_SIZE - 1);
42
43 if (unlikely(!page_buf->addr) &&
44 efx_nic_alloc_buffer(tx_queue->efx, page_buf, PAGE_SIZE,
45 GFP_ATOMIC))
46 return NULL;
47 buffer->dma_addr = page_buf->dma_addr + offset;
48 buffer->unmap_len = 0;
49 return (u8 *)page_buf->addr + offset;
50}
51
52static void efx_tx_maybe_stop_queue(struct efx_tx_queue *txq1)
53{
54 /* We need to consider all queues that the net core sees as one */
55 struct efx_nic *efx = txq1->efx;
56 struct efx_tx_queue *txq2;
57 unsigned int fill_level;
58
59 fill_level = efx_channel_tx_old_fill_level(txq1->channel);
60 if (likely(fill_level < efx->txq_stop_thresh))
61 return;
62
63 /* We used the stale old_read_count above, which gives us a
64 * pessimistic estimate of the fill level (which may even
65 * validly be >= efx->txq_entries). Now try again using
66 * read_count (more likely to be a cache miss).
67 *
68 * If we read read_count and then conditionally stop the
69 * queue, it is possible for the completion path to race with
70 * us and complete all outstanding descriptors in the middle,
71 * after which there will be no more completions to wake it.
72 * Therefore we stop the queue first, then read read_count
73 * (with a memory barrier to ensure the ordering), then
74 * restart the queue if the fill level turns out to be low
75 * enough.
76 */
77 netif_tx_stop_queue(txq1->core_txq);
78 smp_mb();
79 efx_for_each_channel_tx_queue(txq2, txq1->channel)
80 txq2->old_read_count = READ_ONCE(txq2->read_count);
81
82 fill_level = efx_channel_tx_old_fill_level(txq1->channel);
83 EFX_WARN_ON_ONCE_PARANOID(fill_level >= efx->txq_entries);
84 if (likely(fill_level < efx->txq_stop_thresh)) {
85 smp_mb();
86 if (likely(!efx->loopback_selftest))
87 netif_tx_start_queue(txq1->core_txq);
88 }
89}
90
91static int efx_enqueue_skb_copy(struct efx_tx_queue *tx_queue,
92 struct sk_buff *skb)
93{
94 unsigned int copy_len = skb->len;
95 struct efx_tx_buffer *buffer;
96 u8 *copy_buffer;
97 int rc;
98
99 EFX_WARN_ON_ONCE_PARANOID(copy_len > EFX_TX_CB_SIZE);
100
101 buffer = efx_tx_queue_get_insert_buffer(tx_queue);
102
103 copy_buffer = efx_tx_get_copy_buffer(tx_queue, buffer);
104 if (unlikely(!copy_buffer))
105 return -ENOMEM;
106
107 rc = skb_copy_bits(skb, 0, copy_buffer, copy_len);
108 EFX_WARN_ON_PARANOID(rc);
109 buffer->len = copy_len;
110
111 buffer->skb = skb;
112 buffer->flags = EFX_TX_BUF_SKB;
113
114 ++tx_queue->insert_count;
115 return rc;
116}
117
118#ifdef EFX_USE_PIO
119
120struct efx_short_copy_buffer {
121 int used;
122 u8 buf[L1_CACHE_BYTES];
123};
124
125/* Copy to PIO, respecting that writes to PIO buffers must be dword aligned.
126 * Advances piobuf pointer. Leaves additional data in the copy buffer.
127 */
128static void efx_memcpy_toio_aligned(struct efx_nic *efx, u8 __iomem **piobuf,
129 u8 *data, int len,
130 struct efx_short_copy_buffer *copy_buf)
131{
132 int block_len = len & ~(sizeof(copy_buf->buf) - 1);
133
134 __iowrite64_copy(*piobuf, data, block_len >> 3);
135 *piobuf += block_len;
136 len -= block_len;
137
138 if (len) {
139 data += block_len;
140 BUG_ON(copy_buf->used);
141 BUG_ON(len > sizeof(copy_buf->buf));
142 memcpy(copy_buf->buf, data, len);
143 copy_buf->used = len;
144 }
145}
146
147/* Copy to PIO, respecting dword alignment, popping data from copy buffer first.
148 * Advances piobuf pointer. Leaves additional data in the copy buffer.
149 */
150static void efx_memcpy_toio_aligned_cb(struct efx_nic *efx, u8 __iomem **piobuf,
151 u8 *data, int len,
152 struct efx_short_copy_buffer *copy_buf)
153{
154 if (copy_buf->used) {
155 /* if the copy buffer is partially full, fill it up and write */
156 int copy_to_buf =
157 min_t(int, sizeof(copy_buf->buf) - copy_buf->used, len);
158
159 memcpy(copy_buf->buf + copy_buf->used, data, copy_to_buf);
160 copy_buf->used += copy_to_buf;
161
162 /* if we didn't fill it up then we're done for now */
163 if (copy_buf->used < sizeof(copy_buf->buf))
164 return;
165
166 __iowrite64_copy(*piobuf, copy_buf->buf,
167 sizeof(copy_buf->buf) >> 3);
168 *piobuf += sizeof(copy_buf->buf);
169 data += copy_to_buf;
170 len -= copy_to_buf;
171 copy_buf->used = 0;
172 }
173
174 efx_memcpy_toio_aligned(efx, piobuf, data, len, copy_buf);
175}
176
177static void efx_flush_copy_buffer(struct efx_nic *efx, u8 __iomem *piobuf,
178 struct efx_short_copy_buffer *copy_buf)
179{
180 /* if there's anything in it, write the whole buffer, including junk */
181 if (copy_buf->used)
182 __iowrite64_copy(piobuf, copy_buf->buf,
183 sizeof(copy_buf->buf) >> 3);
184}
185
186/* Traverse skb structure and copy fragments in to PIO buffer.
187 * Advances piobuf pointer.
188 */
189static void efx_skb_copy_bits_to_pio(struct efx_nic *efx, struct sk_buff *skb,
190 u8 __iomem **piobuf,
191 struct efx_short_copy_buffer *copy_buf)
192{
193 int i;
194
195 efx_memcpy_toio_aligned(efx, piobuf, skb->data, skb_headlen(skb),
196 copy_buf);
197
198 for (i = 0; i < skb_shinfo(skb)->nr_frags; ++i) {
199 skb_frag_t *f = &skb_shinfo(skb)->frags[i];
200 u8 *vaddr;
201
202 vaddr = kmap_local_page(skb_frag_page(f));
203
204 efx_memcpy_toio_aligned_cb(efx, piobuf, vaddr + skb_frag_off(f),
205 skb_frag_size(f), copy_buf);
206 kunmap_local(vaddr);
207 }
208
209 EFX_WARN_ON_ONCE_PARANOID(skb_shinfo(skb)->frag_list);
210}
211
212static int efx_enqueue_skb_pio(struct efx_tx_queue *tx_queue,
213 struct sk_buff *skb)
214{
215 struct efx_tx_buffer *buffer =
216 efx_tx_queue_get_insert_buffer(tx_queue);
217 u8 __iomem *piobuf = tx_queue->piobuf;
218
219 /* Copy to PIO buffer. Ensure the writes are padded to the end
220 * of a cache line, as this is required for write-combining to be
221 * effective on at least x86.
222 */
223
224 if (skb_shinfo(skb)->nr_frags) {
225 /* The size of the copy buffer will ensure all writes
226 * are the size of a cache line.
227 */
228 struct efx_short_copy_buffer copy_buf;
229
230 copy_buf.used = 0;
231
232 efx_skb_copy_bits_to_pio(tx_queue->efx, skb,
233 &piobuf, ©_buf);
234 efx_flush_copy_buffer(tx_queue->efx, piobuf, ©_buf);
235 } else {
236 /* Pad the write to the size of a cache line.
237 * We can do this because we know the skb_shared_info struct is
238 * after the source, and the destination buffer is big enough.
239 */
240 BUILD_BUG_ON(L1_CACHE_BYTES >
241 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)));
242 __iowrite64_copy(tx_queue->piobuf, skb->data,
243 ALIGN(skb->len, L1_CACHE_BYTES) >> 3);
244 }
245
246 buffer->skb = skb;
247 buffer->flags = EFX_TX_BUF_SKB | EFX_TX_BUF_OPTION;
248
249 EFX_POPULATE_QWORD_5(buffer->option,
250 ESF_DZ_TX_DESC_IS_OPT, 1,
251 ESF_DZ_TX_OPTION_TYPE, ESE_DZ_TX_OPTION_DESC_PIO,
252 ESF_DZ_TX_PIO_CONT, 0,
253 ESF_DZ_TX_PIO_BYTE_CNT, skb->len,
254 ESF_DZ_TX_PIO_BUF_ADDR,
255 tx_queue->piobuf_offset);
256 ++tx_queue->insert_count;
257 return 0;
258}
259
260/* Decide whether we can use TX PIO, ie. write packet data directly into
261 * a buffer on the device. This can reduce latency at the expense of
262 * throughput, so we only do this if both hardware and software TX rings
263 * are empty, including all queues for the channel. This also ensures that
264 * only one packet at a time can be using the PIO buffer. If the xmit_more
265 * flag is set then we don't use this - there'll be another packet along
266 * shortly and we want to hold off the doorbell.
267 */
268static bool efx_tx_may_pio(struct efx_tx_queue *tx_queue)
269{
270 struct efx_channel *channel = tx_queue->channel;
271
272 if (!tx_queue->piobuf)
273 return false;
274
275 EFX_WARN_ON_ONCE_PARANOID(!channel->efx->type->option_descriptors);
276
277 efx_for_each_channel_tx_queue(tx_queue, channel)
278 if (!efx_nic_tx_is_empty(tx_queue, tx_queue->packet_write_count))
279 return false;
280
281 return true;
282}
283#endif /* EFX_USE_PIO */
284
285/* Send any pending traffic for a channel. xmit_more is shared across all
286 * queues for a channel, so we must check all of them.
287 */
288static void efx_tx_send_pending(struct efx_channel *channel)
289{
290 struct efx_tx_queue *q;
291
292 efx_for_each_channel_tx_queue(q, channel) {
293 if (q->xmit_pending)
294 efx_nic_push_buffers(q);
295 }
296}
297
298/*
299 * Add a socket buffer to a TX queue
300 *
301 * This maps all fragments of a socket buffer for DMA and adds them to
302 * the TX queue. The queue's insert pointer will be incremented by
303 * the number of fragments in the socket buffer.
304 *
305 * If any DMA mapping fails, any mapped fragments will be unmapped,
306 * the queue's insert pointer will be restored to its original value.
307 *
308 * This function is split out from efx_hard_start_xmit to allow the
309 * loopback test to direct packets via specific TX queues.
310 *
311 * Returns NETDEV_TX_OK.
312 * You must hold netif_tx_lock() to call this function.
313 */
314netdev_tx_t __efx_enqueue_skb(struct efx_tx_queue *tx_queue, struct sk_buff *skb)
315{
316 unsigned int old_insert_count = tx_queue->insert_count;
317 bool xmit_more = netdev_xmit_more();
318 bool data_mapped = false;
319 unsigned int segments;
320 unsigned int skb_len;
321 int rc;
322
323 skb_len = skb->len;
324 segments = skb_is_gso(skb) ? skb_shinfo(skb)->gso_segs : 0;
325 if (segments == 1)
326 segments = 0; /* Don't use TSO for a single segment. */
327
328 /* Handle TSO first - it's *possible* (although unlikely) that we might
329 * be passed a packet to segment that's smaller than the copybreak/PIO
330 * size limit.
331 */
332 if (segments) {
333 switch (tx_queue->tso_version) {
334 case 1:
335 rc = efx_enqueue_skb_tso(tx_queue, skb, &data_mapped);
336 break;
337 case 2:
338 rc = efx_ef10_tx_tso_desc(tx_queue, skb, &data_mapped);
339 break;
340 case 0: /* No TSO on this queue, SW fallback needed */
341 default:
342 rc = -EINVAL;
343 break;
344 }
345 if (rc == -EINVAL) {
346 rc = efx_tx_tso_fallback(tx_queue, skb);
347 tx_queue->tso_fallbacks++;
348 if (rc == 0)
349 return 0;
350 }
351 if (rc)
352 goto err;
353#ifdef EFX_USE_PIO
354 } else if (skb_len <= efx_piobuf_size && !xmit_more &&
355 efx_tx_may_pio(tx_queue)) {
356 /* Use PIO for short packets with an empty queue. */
357 if (efx_enqueue_skb_pio(tx_queue, skb))
358 goto err;
359 tx_queue->pio_packets++;
360 data_mapped = true;
361#endif
362 } else if (skb->data_len && skb_len <= EFX_TX_CB_SIZE) {
363 /* Pad short packets or coalesce short fragmented packets. */
364 if (efx_enqueue_skb_copy(tx_queue, skb))
365 goto err;
366 tx_queue->cb_packets++;
367 data_mapped = true;
368 }
369
370 /* Map for DMA and create descriptors if we haven't done so already. */
371 if (!data_mapped && (efx_tx_map_data(tx_queue, skb, segments)))
372 goto err;
373
374 efx_tx_maybe_stop_queue(tx_queue);
375
376 tx_queue->xmit_pending = true;
377
378 /* Pass off to hardware */
379 if (__netdev_tx_sent_queue(tx_queue->core_txq, skb_len, xmit_more))
380 efx_tx_send_pending(tx_queue->channel);
381
382 if (segments) {
383 tx_queue->tso_bursts++;
384 tx_queue->tso_packets += segments;
385 tx_queue->tx_packets += segments;
386 } else {
387 tx_queue->tx_packets++;
388 }
389
390 return NETDEV_TX_OK;
391
392
393err:
394 efx_enqueue_unwind(tx_queue, old_insert_count);
395 dev_kfree_skb_any(skb);
396
397 /* If we're not expecting another transmit and we had something to push
398 * on this queue or a partner queue then we need to push here to get the
399 * previous packets out.
400 */
401 if (!xmit_more)
402 efx_tx_send_pending(tx_queue->channel);
403
404 return NETDEV_TX_OK;
405}
406
407/* Transmit a packet from an XDP buffer
408 *
409 * Returns number of packets sent on success, error code otherwise.
410 * Runs in NAPI context, either in our poll (for XDP TX) or a different NIC
411 * (for XDP redirect).
412 */
413int efx_xdp_tx_buffers(struct efx_nic *efx, int n, struct xdp_frame **xdpfs,
414 bool flush)
415{
416 struct efx_tx_buffer *tx_buffer;
417 struct efx_tx_queue *tx_queue;
418 struct xdp_frame *xdpf;
419 dma_addr_t dma_addr;
420 unsigned int len;
421 int space;
422 int cpu;
423 int i = 0;
424
425 if (unlikely(n && !xdpfs))
426 return -EINVAL;
427 if (unlikely(!n))
428 return 0;
429
430 cpu = raw_smp_processor_id();
431 if (unlikely(cpu >= efx->xdp_tx_queue_count))
432 return -EINVAL;
433
434 tx_queue = efx->xdp_tx_queues[cpu];
435 if (unlikely(!tx_queue))
436 return -EINVAL;
437
438 if (!tx_queue->initialised)
439 return -EINVAL;
440
441 if (efx->xdp_txq_queues_mode != EFX_XDP_TX_QUEUES_DEDICATED)
442 HARD_TX_LOCK(efx->net_dev, tx_queue->core_txq, cpu);
443
444 /* If we're borrowing net stack queues we have to handle stop-restart
445 * or we might block the queue and it will be considered as frozen
446 */
447 if (efx->xdp_txq_queues_mode == EFX_XDP_TX_QUEUES_BORROWED) {
448 if (netif_tx_queue_stopped(tx_queue->core_txq))
449 goto unlock;
450 efx_tx_maybe_stop_queue(tx_queue);
451 }
452
453 /* Check for available space. We should never need multiple
454 * descriptors per frame.
455 */
456 space = efx->txq_entries +
457 tx_queue->read_count - tx_queue->insert_count;
458
459 for (i = 0; i < n; i++) {
460 xdpf = xdpfs[i];
461
462 if (i >= space)
463 break;
464
465 /* We'll want a descriptor for this tx. */
466 prefetchw(__efx_tx_queue_get_insert_buffer(tx_queue));
467
468 len = xdpf->len;
469
470 /* Map for DMA. */
471 dma_addr = dma_map_single(&efx->pci_dev->dev,
472 xdpf->data, len,
473 DMA_TO_DEVICE);
474 if (dma_mapping_error(&efx->pci_dev->dev, dma_addr))
475 break;
476
477 /* Create descriptor and set up for unmapping DMA. */
478 tx_buffer = efx_tx_map_chunk(tx_queue, dma_addr, len);
479 tx_buffer->xdpf = xdpf;
480 tx_buffer->flags = EFX_TX_BUF_XDP |
481 EFX_TX_BUF_MAP_SINGLE;
482 tx_buffer->dma_offset = 0;
483 tx_buffer->unmap_len = len;
484 tx_queue->tx_packets++;
485 }
486
487 /* Pass mapped frames to hardware. */
488 if (flush && i > 0)
489 efx_nic_push_buffers(tx_queue);
490
491unlock:
492 if (efx->xdp_txq_queues_mode != EFX_XDP_TX_QUEUES_DEDICATED)
493 HARD_TX_UNLOCK(efx->net_dev, tx_queue->core_txq);
494
495 return i == 0 ? -EIO : i;
496}
497
498/* Initiate a packet transmission. We use one channel per CPU
499 * (sharing when we have more CPUs than channels).
500 *
501 * Context: non-blocking.
502 * Should always return NETDEV_TX_OK and consume the skb.
503 */
504netdev_tx_t efx_hard_start_xmit(struct sk_buff *skb,
505 struct net_device *net_dev)
506{
507 struct efx_nic *efx = efx_netdev_priv(net_dev);
508 struct efx_tx_queue *tx_queue;
509 unsigned index, type;
510
511 EFX_WARN_ON_PARANOID(!netif_device_present(net_dev));
512 index = skb_get_queue_mapping(skb);
513 type = efx_tx_csum_type_skb(skb);
514
515 /* PTP "event" packet */
516 if (unlikely(efx_xmit_with_hwtstamp(skb)) &&
517 ((efx_ptp_use_mac_tx_timestamps(efx) && efx->ptp_data) ||
518 unlikely(efx_ptp_is_ptp_tx(efx, skb)))) {
519 /* There may be existing transmits on the channel that are
520 * waiting for this packet to trigger the doorbell write.
521 * We need to send the packets at this point.
522 */
523 efx_tx_send_pending(efx_get_tx_channel(efx, index));
524 return efx_ptp_tx(efx, skb);
525 }
526
527 tx_queue = efx_get_tx_queue(efx, index, type);
528 if (WARN_ON_ONCE(!tx_queue)) {
529 /* We don't have a TXQ of the right type.
530 * This should never happen, as we don't advertise offload
531 * features unless we can support them.
532 */
533 dev_kfree_skb_any(skb);
534 /* If we're not expecting another transmit and we had something to push
535 * on this queue or a partner queue then we need to push here to get the
536 * previous packets out.
537 */
538 if (!netdev_xmit_more())
539 efx_tx_send_pending(efx_get_tx_channel(efx, index));
540 return NETDEV_TX_OK;
541 }
542
543 return __efx_enqueue_skb(tx_queue, skb);
544}
545
546void efx_xmit_done_single(struct efx_tx_queue *tx_queue)
547{
548 unsigned int xdp_pkts_compl = 0, xdp_bytes_compl = 0;
549 unsigned int pkts_compl = 0, bytes_compl = 0;
550 unsigned int efv_pkts_compl = 0;
551 unsigned int read_ptr;
552 bool finished = false;
553
554 read_ptr = tx_queue->read_count & tx_queue->ptr_mask;
555
556 while (!finished) {
557 struct efx_tx_buffer *buffer = &tx_queue->buffer[read_ptr];
558
559 if (!efx_tx_buffer_in_use(buffer)) {
560 struct efx_nic *efx = tx_queue->efx;
561
562 netif_err(efx, hw, efx->net_dev,
563 "TX queue %d spurious single TX completion\n",
564 tx_queue->queue);
565 efx_schedule_reset(efx, RESET_TYPE_TX_SKIP);
566 return;
567 }
568
569 /* Need to check the flag before dequeueing. */
570 if (buffer->flags & EFX_TX_BUF_SKB)
571 finished = true;
572 efx_dequeue_buffer(tx_queue, buffer, &pkts_compl, &bytes_compl,
573 &efv_pkts_compl, &xdp_pkts_compl,
574 &xdp_bytes_compl);
575
576 ++tx_queue->read_count;
577 read_ptr = tx_queue->read_count & tx_queue->ptr_mask;
578 }
579
580 tx_queue->pkts_compl += pkts_compl;
581 tx_queue->bytes_compl += bytes_compl;
582 tx_queue->complete_xdp_packets += xdp_pkts_compl;
583 tx_queue->complete_xdp_bytes += xdp_bytes_compl;
584
585 EFX_WARN_ON_PARANOID(pkts_compl + efv_pkts_compl != 1);
586
587 efx_xmit_done_check_empty(tx_queue);
588}
589
590void efx_init_tx_queue_core_txq(struct efx_tx_queue *tx_queue)
591{
592 struct efx_nic *efx = tx_queue->efx;
593
594 /* Must be inverse of queue lookup in efx_hard_start_xmit() */
595 tx_queue->core_txq =
596 netdev_get_tx_queue(efx->net_dev,
597 tx_queue->channel->channel);
598}