Loading...
1/*
2 * include/asm-sh/dma.h
3 *
4 * Copyright (C) 2003, 2004 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#ifndef __ASM_SH_DMA_H
11#define __ASM_SH_DMA_H
12#ifdef __KERNEL__
13
14#include <linux/spinlock.h>
15#include <linux/wait.h>
16#include <linux/sched.h>
17#include <linux/sysdev.h>
18#include <cpu/dma.h>
19#include <asm-generic/dma.h>
20
21#ifdef CONFIG_NR_DMA_CHANNELS
22# define MAX_DMA_CHANNELS (CONFIG_NR_DMA_CHANNELS)
23#elif defined(CONFIG_NR_ONCHIP_DMA_CHANNELS)
24# define MAX_DMA_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS)
25#else
26# define MAX_DMA_CHANNELS 0
27#endif
28
29/*
30 * Read and write modes can mean drastically different things depending on the
31 * channel configuration. Consult your DMAC documentation and module
32 * implementation for further clues.
33 */
34#define DMA_MODE_READ 0x00
35#define DMA_MODE_WRITE 0x01
36#define DMA_MODE_MASK 0x01
37
38#define DMA_AUTOINIT 0x10
39
40/*
41 * DMAC (dma_info) flags
42 */
43enum {
44 DMAC_CHANNELS_CONFIGURED = 0x01,
45 DMAC_CHANNELS_TEI_CAPABLE = 0x02, /* Transfer end interrupt */
46};
47
48/*
49 * DMA channel capabilities / flags
50 */
51enum {
52 DMA_CONFIGURED = 0x01,
53
54 /*
55 * Transfer end interrupt, inherited from DMAC.
56 * wait_queue used in dma_wait_for_completion.
57 */
58 DMA_TEI_CAPABLE = 0x02,
59};
60
61extern spinlock_t dma_spin_lock;
62
63struct dma_channel;
64
65struct dma_ops {
66 int (*request)(struct dma_channel *chan);
67 void (*free)(struct dma_channel *chan);
68
69 int (*get_residue)(struct dma_channel *chan);
70 int (*xfer)(struct dma_channel *chan);
71 int (*configure)(struct dma_channel *chan, unsigned long flags);
72 int (*extend)(struct dma_channel *chan, unsigned long op, void *param);
73};
74
75struct dma_channel {
76 char dev_id[16]; /* unique name per DMAC of channel */
77
78 unsigned int chan; /* DMAC channel number */
79 unsigned int vchan; /* Virtual channel number */
80
81 unsigned int mode;
82 unsigned int count;
83
84 unsigned long sar;
85 unsigned long dar;
86
87 const char **caps;
88
89 unsigned long flags;
90 atomic_t busy;
91
92 wait_queue_head_t wait_queue;
93
94 struct sys_device dev;
95 void *priv_data;
96};
97
98struct dma_info {
99 struct platform_device *pdev;
100
101 const char *name;
102 unsigned int nr_channels;
103 unsigned long flags;
104
105 struct dma_ops *ops;
106 struct dma_channel *channels;
107
108 struct list_head list;
109 int first_channel_nr;
110 int first_vchannel_nr;
111};
112
113struct dma_chan_caps {
114 int ch_num;
115 const char **caplist;
116};
117
118#define to_dma_channel(channel) container_of(channel, struct dma_channel, dev)
119
120/* arch/sh/drivers/dma/dma-api.c */
121extern int dma_xfer(unsigned int chan, unsigned long from,
122 unsigned long to, size_t size, unsigned int mode);
123
124#define dma_write(chan, from, to, size) \
125 dma_xfer(chan, from, to, size, DMA_MODE_WRITE)
126#define dma_write_page(chan, from, to) \
127 dma_write(chan, from, to, PAGE_SIZE)
128
129#define dma_read(chan, from, to, size) \
130 dma_xfer(chan, from, to, size, DMA_MODE_READ)
131#define dma_read_page(chan, from, to) \
132 dma_read(chan, from, to, PAGE_SIZE)
133
134extern int request_dma_bycap(const char **dmac, const char **caps,
135 const char *dev_id);
136extern int get_dma_residue(unsigned int chan);
137extern struct dma_info *get_dma_info(unsigned int chan);
138extern struct dma_channel *get_dma_channel(unsigned int chan);
139extern void dma_wait_for_completion(unsigned int chan);
140extern void dma_configure_channel(unsigned int chan, unsigned long flags);
141
142extern int register_dmac(struct dma_info *info);
143extern void unregister_dmac(struct dma_info *info);
144extern struct dma_info *get_dma_info_by_name(const char *dmac_name);
145
146extern int dma_extend(unsigned int chan, unsigned long op, void *param);
147extern int register_chan_caps(const char *dmac, struct dma_chan_caps *capslist);
148
149/* arch/sh/drivers/dma/dma-sysfs.c */
150extern int dma_create_sysfs_files(struct dma_channel *, struct dma_info *);
151extern void dma_remove_sysfs_files(struct dma_channel *, struct dma_info *);
152
153#ifdef CONFIG_PCI
154extern int isa_dma_bridge_buggy;
155#else
156#define isa_dma_bridge_buggy (0)
157#endif
158
159#endif /* __KERNEL__ */
160#endif /* __ASM_SH_DMA_H */
1/* SPDX-License-Identifier: GPL-2.0
2 *
3 * include/asm-sh/dma.h
4 *
5 * Copyright (C) 2003, 2004 Paul Mundt
6 */
7#ifndef __ASM_SH_DMA_H
8#define __ASM_SH_DMA_H
9
10#include <linux/spinlock.h>
11#include <linux/wait.h>
12#include <linux/sched.h>
13#include <linux/device.h>
14#include <asm-generic/dma.h>
15
16/*
17 * Read and write modes can mean drastically different things depending on the
18 * channel configuration. Consult your DMAC documentation and module
19 * implementation for further clues.
20 */
21#define DMA_MODE_READ 0x00
22#define DMA_MODE_WRITE 0x01
23#define DMA_MODE_MASK 0x01
24
25#define DMA_AUTOINIT 0x10
26
27/*
28 * DMAC (dma_info) flags
29 */
30enum {
31 DMAC_CHANNELS_CONFIGURED = 0x01,
32 DMAC_CHANNELS_TEI_CAPABLE = 0x02, /* Transfer end interrupt */
33};
34
35/*
36 * DMA channel capabilities / flags
37 */
38enum {
39 DMA_CONFIGURED = 0x01,
40
41 /*
42 * Transfer end interrupt, inherited from DMAC.
43 * wait_queue used in dma_wait_for_completion.
44 */
45 DMA_TEI_CAPABLE = 0x02,
46};
47
48extern spinlock_t dma_spin_lock;
49
50struct dma_channel;
51
52struct dma_ops {
53 int (*request)(struct dma_channel *chan);
54 void (*free)(struct dma_channel *chan);
55
56 int (*get_residue)(struct dma_channel *chan);
57 int (*xfer)(struct dma_channel *chan);
58 int (*configure)(struct dma_channel *chan, unsigned long flags);
59};
60
61struct dma_channel {
62 char dev_id[16]; /* unique name per DMAC of channel */
63
64 unsigned int chan; /* DMAC channel number */
65 unsigned int vchan; /* Virtual channel number */
66
67 unsigned int mode;
68 unsigned int count;
69
70 unsigned long sar;
71 unsigned long dar;
72
73 const char **caps;
74
75 unsigned long flags;
76 atomic_t busy;
77
78 wait_queue_head_t wait_queue;
79
80 struct device dev;
81 void *priv_data;
82};
83
84struct dma_info {
85 struct platform_device *pdev;
86
87 const char *name;
88 unsigned int nr_channels;
89 unsigned long flags;
90
91 struct dma_ops *ops;
92 struct dma_channel *channels;
93
94 struct list_head list;
95 int first_channel_nr;
96 int first_vchannel_nr;
97};
98
99struct dma_chan_caps {
100 int ch_num;
101 const char **caplist;
102};
103
104#define to_dma_channel(channel) container_of(channel, struct dma_channel, dev)
105
106/* arch/sh/drivers/dma/dma-api.c */
107extern int dma_xfer(unsigned int chan, unsigned long from,
108 unsigned long to, size_t size, unsigned int mode);
109
110#define dma_write(chan, from, to, size) \
111 dma_xfer(chan, from, to, size, DMA_MODE_WRITE)
112#define dma_write_page(chan, from, to) \
113 dma_write(chan, from, to, PAGE_SIZE)
114
115#define dma_read(chan, from, to, size) \
116 dma_xfer(chan, from, to, size, DMA_MODE_READ)
117#define dma_read_page(chan, from, to) \
118 dma_read(chan, from, to, PAGE_SIZE)
119
120extern int get_dma_residue(unsigned int chan);
121extern struct dma_info *get_dma_info(unsigned int chan);
122extern struct dma_channel *get_dma_channel(unsigned int chan);
123extern void dma_wait_for_completion(unsigned int chan);
124extern void dma_configure_channel(unsigned int chan, unsigned long flags);
125
126extern int register_dmac(struct dma_info *info);
127extern void unregister_dmac(struct dma_info *info);
128
129/* arch/sh/drivers/dma/dma-sysfs.c */
130extern int dma_create_sysfs_files(struct dma_channel *, struct dma_info *);
131extern void dma_remove_sysfs_files(struct dma_channel *, struct dma_info *);
132
133#endif /* __ASM_SH_DMA_H */