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1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#ifndef _I810_DRM_H_
3#define _I810_DRM_H_
4
5#include "drm.h"
6
7#if defined(__cplusplus)
8extern "C" {
9#endif
10
11/* WARNING: These defines must be the same as what the Xserver uses.
12 * if you change them, you must change the defines in the Xserver.
13 */
14
15#ifndef _I810_DEFINES_
16#define _I810_DEFINES_
17
18#define I810_DMA_BUF_ORDER 12
19#define I810_DMA_BUF_SZ (1<<I810_DMA_BUF_ORDER)
20#define I810_DMA_BUF_NR 256
21#define I810_NR_SAREA_CLIPRECTS 8
22
23/* Each region is a minimum of 64k, and there are at most 64 of them.
24 */
25#define I810_NR_TEX_REGIONS 64
26#define I810_LOG_MIN_TEX_REGION_SIZE 16
27#endif
28
29#define I810_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */
30#define I810_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */
31#define I810_UPLOAD_CTX 0x4
32#define I810_UPLOAD_BUFFERS 0x8
33#define I810_UPLOAD_TEX0 0x10
34#define I810_UPLOAD_TEX1 0x20
35#define I810_UPLOAD_CLIPRECTS 0x40
36
37/* Indices into buf.Setup where various bits of state are mirrored per
38 * context and per buffer. These can be fired at the card as a unit,
39 * or in a piecewise fashion as required.
40 */
41
42/* Destbuffer state
43 * - backbuffer linear offset and pitch -- invarient in the current dri
44 * - zbuffer linear offset and pitch -- also invarient
45 * - drawing origin in back and depth buffers.
46 *
47 * Keep the depth/back buffer state here to accommodate private buffers
48 * in the future.
49 */
50#define I810_DESTREG_DI0 0 /* CMD_OP_DESTBUFFER_INFO (2 dwords) */
51#define I810_DESTREG_DI1 1
52#define I810_DESTREG_DV0 2 /* GFX_OP_DESTBUFFER_VARS (2 dwords) */
53#define I810_DESTREG_DV1 3
54#define I810_DESTREG_DR0 4 /* GFX_OP_DRAWRECT_INFO (4 dwords) */
55#define I810_DESTREG_DR1 5
56#define I810_DESTREG_DR2 6
57#define I810_DESTREG_DR3 7
58#define I810_DESTREG_DR4 8
59#define I810_DEST_SETUP_SIZE 10
60
61/* Context state
62 */
63#define I810_CTXREG_CF0 0 /* GFX_OP_COLOR_FACTOR */
64#define I810_CTXREG_CF1 1
65#define I810_CTXREG_ST0 2 /* GFX_OP_STIPPLE */
66#define I810_CTXREG_ST1 3
67#define I810_CTXREG_VF 4 /* GFX_OP_VERTEX_FMT */
68#define I810_CTXREG_MT 5 /* GFX_OP_MAP_TEXELS */
69#define I810_CTXREG_MC0 6 /* GFX_OP_MAP_COLOR_STAGES - stage 0 */
70#define I810_CTXREG_MC1 7 /* GFX_OP_MAP_COLOR_STAGES - stage 1 */
71#define I810_CTXREG_MC2 8 /* GFX_OP_MAP_COLOR_STAGES - stage 2 */
72#define I810_CTXREG_MA0 9 /* GFX_OP_MAP_ALPHA_STAGES - stage 0 */
73#define I810_CTXREG_MA1 10 /* GFX_OP_MAP_ALPHA_STAGES - stage 1 */
74#define I810_CTXREG_MA2 11 /* GFX_OP_MAP_ALPHA_STAGES - stage 2 */
75#define I810_CTXREG_SDM 12 /* GFX_OP_SRC_DEST_MONO */
76#define I810_CTXREG_FOG 13 /* GFX_OP_FOG_COLOR */
77#define I810_CTXREG_B1 14 /* GFX_OP_BOOL_1 */
78#define I810_CTXREG_B2 15 /* GFX_OP_BOOL_2 */
79#define I810_CTXREG_LCS 16 /* GFX_OP_LINEWIDTH_CULL_SHADE_MODE */
80#define I810_CTXREG_PV 17 /* GFX_OP_PV_RULE -- Invarient! */
81#define I810_CTXREG_ZA 18 /* GFX_OP_ZBIAS_ALPHAFUNC */
82#define I810_CTXREG_AA 19 /* GFX_OP_ANTIALIAS */
83#define I810_CTX_SETUP_SIZE 20
84
85/* Texture state (per tex unit)
86 */
87#define I810_TEXREG_MI0 0 /* GFX_OP_MAP_INFO (4 dwords) */
88#define I810_TEXREG_MI1 1
89#define I810_TEXREG_MI2 2
90#define I810_TEXREG_MI3 3
91#define I810_TEXREG_MF 4 /* GFX_OP_MAP_FILTER */
92#define I810_TEXREG_MLC 5 /* GFX_OP_MAP_LOD_CTL */
93#define I810_TEXREG_MLL 6 /* GFX_OP_MAP_LOD_LIMITS */
94#define I810_TEXREG_MCS 7 /* GFX_OP_MAP_COORD_SETS ??? */
95#define I810_TEX_SETUP_SIZE 8
96
97/* Flags for clear ioctl
98 */
99#define I810_FRONT 0x1
100#define I810_BACK 0x2
101#define I810_DEPTH 0x4
102
103typedef enum _drm_i810_init_func {
104 I810_INIT_DMA = 0x01,
105 I810_CLEANUP_DMA = 0x02,
106 I810_INIT_DMA_1_4 = 0x03
107} drm_i810_init_func_t;
108
109/* This is the init structure after v1.2 */
110typedef struct _drm_i810_init {
111 drm_i810_init_func_t func;
112 unsigned int mmio_offset;
113 unsigned int buffers_offset;
114 int sarea_priv_offset;
115 unsigned int ring_start;
116 unsigned int ring_end;
117 unsigned int ring_size;
118 unsigned int front_offset;
119 unsigned int back_offset;
120 unsigned int depth_offset;
121 unsigned int overlay_offset;
122 unsigned int overlay_physical;
123 unsigned int w;
124 unsigned int h;
125 unsigned int pitch;
126 unsigned int pitch_bits;
127} drm_i810_init_t;
128
129/* This is the init structure prior to v1.2 */
130typedef struct _drm_i810_pre12_init {
131 drm_i810_init_func_t func;
132 unsigned int mmio_offset;
133 unsigned int buffers_offset;
134 int sarea_priv_offset;
135 unsigned int ring_start;
136 unsigned int ring_end;
137 unsigned int ring_size;
138 unsigned int front_offset;
139 unsigned int back_offset;
140 unsigned int depth_offset;
141 unsigned int w;
142 unsigned int h;
143 unsigned int pitch;
144 unsigned int pitch_bits;
145} drm_i810_pre12_init_t;
146
147/* Warning: If you change the SAREA structure you must change the Xserver
148 * structure as well */
149
150typedef struct _drm_i810_tex_region {
151 unsigned char next, prev; /* indices to form a circular LRU */
152 unsigned char in_use; /* owned by a client, or free? */
153 int age; /* tracked by clients to update local LRU's */
154} drm_i810_tex_region_t;
155
156typedef struct _drm_i810_sarea {
157 unsigned int ContextState[I810_CTX_SETUP_SIZE];
158 unsigned int BufferState[I810_DEST_SETUP_SIZE];
159 unsigned int TexState[2][I810_TEX_SETUP_SIZE];
160 unsigned int dirty;
161
162 unsigned int nbox;
163 struct drm_clip_rect boxes[I810_NR_SAREA_CLIPRECTS];
164
165 /* Maintain an LRU of contiguous regions of texture space. If
166 * you think you own a region of texture memory, and it has an
167 * age different to the one you set, then you are mistaken and
168 * it has been stolen by another client. If global texAge
169 * hasn't changed, there is no need to walk the list.
170 *
171 * These regions can be used as a proxy for the fine-grained
172 * texture information of other clients - by maintaining them
173 * in the same lru which is used to age their own textures,
174 * clients have an approximate lru for the whole of global
175 * texture space, and can make informed decisions as to which
176 * areas to kick out. There is no need to choose whether to
177 * kick out your own texture or someone else's - simply eject
178 * them all in LRU order.
179 */
180
181 drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS + 1];
182 /* Last elt is sentinal */
183 int texAge; /* last time texture was uploaded */
184 int last_enqueue; /* last time a buffer was enqueued */
185 int last_dispatch; /* age of the most recently dispatched buffer */
186 int last_quiescent; /* */
187 int ctxOwner; /* last context to upload state */
188
189 int vertex_prim;
190
191 int pf_enabled; /* is pageflipping allowed? */
192 int pf_active;
193 int pf_current_page; /* which buffer is being displayed? */
194} drm_i810_sarea_t;
195
196/* WARNING: If you change any of these defines, make sure to change the
197 * defines in the Xserver file (xf86drmMga.h)
198 */
199
200/* i810 specific ioctls
201 * The device specific ioctl range is 0x40 to 0x79.
202 */
203#define DRM_I810_INIT 0x00
204#define DRM_I810_VERTEX 0x01
205#define DRM_I810_CLEAR 0x02
206#define DRM_I810_FLUSH 0x03
207#define DRM_I810_GETAGE 0x04
208#define DRM_I810_GETBUF 0x05
209#define DRM_I810_SWAP 0x06
210#define DRM_I810_COPY 0x07
211#define DRM_I810_DOCOPY 0x08
212#define DRM_I810_OV0INFO 0x09
213#define DRM_I810_FSTATUS 0x0a
214#define DRM_I810_OV0FLIP 0x0b
215#define DRM_I810_MC 0x0c
216#define DRM_I810_RSTATUS 0x0d
217#define DRM_I810_FLIP 0x0e
218
219#define DRM_IOCTL_I810_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I810_INIT, drm_i810_init_t)
220#define DRM_IOCTL_I810_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_I810_VERTEX, drm_i810_vertex_t)
221#define DRM_IOCTL_I810_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_I810_CLEAR, drm_i810_clear_t)
222#define DRM_IOCTL_I810_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_I810_FLUSH)
223#define DRM_IOCTL_I810_GETAGE DRM_IO( DRM_COMMAND_BASE + DRM_I810_GETAGE)
224#define DRM_IOCTL_I810_GETBUF DRM_IOWR(DRM_COMMAND_BASE + DRM_I810_GETBUF, drm_i810_dma_t)
225#define DRM_IOCTL_I810_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_I810_SWAP)
226#define DRM_IOCTL_I810_COPY DRM_IOW( DRM_COMMAND_BASE + DRM_I810_COPY, drm_i810_copy_t)
227#define DRM_IOCTL_I810_DOCOPY DRM_IO( DRM_COMMAND_BASE + DRM_I810_DOCOPY)
228#define DRM_IOCTL_I810_OV0INFO DRM_IOR( DRM_COMMAND_BASE + DRM_I810_OV0INFO, drm_i810_overlay_t)
229#define DRM_IOCTL_I810_FSTATUS DRM_IO ( DRM_COMMAND_BASE + DRM_I810_FSTATUS)
230#define DRM_IOCTL_I810_OV0FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I810_OV0FLIP)
231#define DRM_IOCTL_I810_MC DRM_IOW( DRM_COMMAND_BASE + DRM_I810_MC, drm_i810_mc_t)
232#define DRM_IOCTL_I810_RSTATUS DRM_IO ( DRM_COMMAND_BASE + DRM_I810_RSTATUS)
233#define DRM_IOCTL_I810_FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I810_FLIP)
234
235typedef struct _drm_i810_clear {
236 int clear_color;
237 int clear_depth;
238 int flags;
239} drm_i810_clear_t;
240
241/* These may be placeholders if we have more cliprects than
242 * I810_NR_SAREA_CLIPRECTS. In that case, the client sets discard to
243 * false, indicating that the buffer will be dispatched again with a
244 * new set of cliprects.
245 */
246typedef struct _drm_i810_vertex {
247 int idx; /* buffer index */
248 int used; /* nr bytes in use */
249 int discard; /* client is finished with the buffer? */
250} drm_i810_vertex_t;
251
252typedef struct _drm_i810_copy_t {
253 int idx; /* buffer index */
254 int used; /* nr bytes in use */
255 void *address; /* Address to copy from */
256} drm_i810_copy_t;
257
258#define PR_TRIANGLES (0x0<<18)
259#define PR_TRISTRIP_0 (0x1<<18)
260#define PR_TRISTRIP_1 (0x2<<18)
261#define PR_TRIFAN (0x3<<18)
262#define PR_POLYGON (0x4<<18)
263#define PR_LINES (0x5<<18)
264#define PR_LINESTRIP (0x6<<18)
265#define PR_RECTS (0x7<<18)
266#define PR_MASK (0x7<<18)
267
268typedef struct drm_i810_dma {
269 void *virtual;
270 int request_idx;
271 int request_size;
272 int granted;
273} drm_i810_dma_t;
274
275typedef struct _drm_i810_overlay_t {
276 unsigned int offset; /* Address of the Overlay Regs */
277 unsigned int physical;
278} drm_i810_overlay_t;
279
280typedef struct _drm_i810_mc {
281 int idx; /* buffer index */
282 int used; /* nr bytes in use */
283 int num_blocks; /* number of GFXBlocks */
284 int *length; /* List of lengths for GFXBlocks (FUTURE) */
285 unsigned int last_render; /* Last Render Request */
286} drm_i810_mc_t;
287
288#if defined(__cplusplus)
289}
290#endif
291
292#endif /* _I810_DRM_H_ */