1#ifndef __GENERIC_IO_H
 2#define __GENERIC_IO_H
 3
 4#include <linux/linkage.h>
 5#include <asm/byteorder.h>
 6
 7/*
 8 * These are the "generic" interfaces for doing new-style
 9 * memory-mapped or PIO accesses. Architectures may do
10 * their own arch-optimized versions, these just act as
11 * wrappers around the old-style IO register access functions:
12 * read[bwl]/write[bwl]/in[bwl]/out[bwl]
13 *
14 * Don't include this directly, include it from <asm/io.h>.
15 */
16
17/*
18 * Read/write from/to an (offsettable) iomem cookie. It might be a PIO
19 * access or a MMIO access, these functions don't care. The info is
20 * encoded in the hardware mapping set up by the mapping functions
21 * (or the cookie itself, depending on implementation and hw).
22 *
23 * The generic routines just encode the PIO/MMIO as part of the
24 * cookie, and coldly assume that the MMIO IO mappings are not
25 * in the low address range. Architectures for which this is not
26 * true can't use this generic implementation.
27 */
28extern unsigned int ioread8(void __iomem *);
29extern unsigned int ioread16(void __iomem *);
30extern unsigned int ioread16be(void __iomem *);
31extern unsigned int ioread32(void __iomem *);
32extern unsigned int ioread32be(void __iomem *);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
33
34extern void iowrite8(u8, void __iomem *);
35extern void iowrite16(u16, void __iomem *);
36extern void iowrite16be(u16, void __iomem *);
37extern void iowrite32(u32, void __iomem *);
38extern void iowrite32be(u32, void __iomem *);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
39
40/*
41 * "string" versions of the above. Note that they
42 * use native byte ordering for the accesses (on
43 * the assumption that IO and memory agree on a
44 * byte order, and CPU byteorder is irrelevant).
45 *
46 * They do _not_ update the port address. If you
47 * want MMIO that copies stuff laid out in MMIO
48 * memory across multiple ports, use "memcpy_toio()"
49 * and friends.
50 */
51extern void ioread8_rep(void __iomem *port, void *buf, unsigned long count);
52extern void ioread16_rep(void __iomem *port, void *buf, unsigned long count);
53extern void ioread32_rep(void __iomem *port, void *buf, unsigned long count);
54
55extern void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count);
56extern void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count);
57extern void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count);
58
59#ifdef CONFIG_HAS_IOPORT
60/* Create a virtual mapping cookie for an IO port range */
61extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
62extern void ioport_unmap(void __iomem *);
63#endif
64
65#ifndef ARCH_HAS_IOREMAP_WC
66#define ioremap_wc ioremap_nocache
 
 
 
 
67#endif
68
69#ifdef CONFIG_PCI
70/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
71struct pci_dev;
72extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
73extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
74#else
75struct pci_dev;
76static inline void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max)
77{
78	return NULL;
79}
80static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
81{ }
82#endif
 
 
83
84#endif

  1/* SPDX-License-Identifier: GPL-2.0 */
  2#ifndef __GENERIC_IO_H
  3#define __GENERIC_IO_H
  4
  5#include <linux/linkage.h>
  6#include <asm/byteorder.h>
  7
  8/*
  9 * These are the "generic" interfaces for doing new-style
 10 * memory-mapped or PIO accesses. Architectures may do
 11 * their own arch-optimized versions, these just act as
 12 * wrappers around the old-style IO register access functions:
 13 * read[bwl]/write[bwl]/in[bwl]/out[bwl]
 14 *
 15 * Don't include this directly, include it from <asm/io.h>.
 16 */
 17
 18/*
 19 * Read/write from/to an (offsettable) iomem cookie. It might be a PIO
 20 * access or a MMIO access, these functions don't care. The info is
 21 * encoded in the hardware mapping set up by the mapping functions
 22 * (or the cookie itself, depending on implementation and hw).
 23 *
 24 * The generic routines just encode the PIO/MMIO as part of the
 25 * cookie, and coldly assume that the MMIO IO mappings are not
 26 * in the low address range. Architectures for which this is not
 27 * true can't use this generic implementation.
 28 */
 29extern unsigned int ioread8(const void __iomem *);
 30extern unsigned int ioread16(const void __iomem *);
 31extern unsigned int ioread16be(const void __iomem *);
 32extern unsigned int ioread32(const void __iomem *);
 33extern unsigned int ioread32be(const void __iomem *);
 34#ifdef CONFIG_64BIT
 35extern u64 ioread64(const void __iomem *);
 36extern u64 ioread64be(const void __iomem *);
 37#endif
 38
 39#ifdef readq
 40#define ioread64_lo_hi ioread64_lo_hi
 41#define ioread64_hi_lo ioread64_hi_lo
 42#define ioread64be_lo_hi ioread64be_lo_hi
 43#define ioread64be_hi_lo ioread64be_hi_lo
 44extern u64 ioread64_lo_hi(const void __iomem *addr);
 45extern u64 ioread64_hi_lo(const void __iomem *addr);
 46extern u64 ioread64be_lo_hi(const void __iomem *addr);
 47extern u64 ioread64be_hi_lo(const void __iomem *addr);
 48#endif
 49
 50extern void iowrite8(u8, void __iomem *);
 51extern void iowrite16(u16, void __iomem *);
 52extern void iowrite16be(u16, void __iomem *);
 53extern void iowrite32(u32, void __iomem *);
 54extern void iowrite32be(u32, void __iomem *);
 55#ifdef CONFIG_64BIT
 56extern void iowrite64(u64, void __iomem *);
 57extern void iowrite64be(u64, void __iomem *);
 58#endif
 59
 60#ifdef writeq
 61#define iowrite64_lo_hi iowrite64_lo_hi
 62#define iowrite64_hi_lo iowrite64_hi_lo
 63#define iowrite64be_lo_hi iowrite64be_lo_hi
 64#define iowrite64be_hi_lo iowrite64be_hi_lo
 65extern void iowrite64_lo_hi(u64 val, void __iomem *addr);
 66extern void iowrite64_hi_lo(u64 val, void __iomem *addr);
 67extern void iowrite64be_lo_hi(u64 val, void __iomem *addr);
 68extern void iowrite64be_hi_lo(u64 val, void __iomem *addr);
 69#endif
 70
 71/*
 72 * "string" versions of the above. Note that they
 73 * use native byte ordering for the accesses (on
 74 * the assumption that IO and memory agree on a
 75 * byte order, and CPU byteorder is irrelevant).
 76 *
 77 * They do _not_ update the port address. If you
 78 * want MMIO that copies stuff laid out in MMIO
 79 * memory across multiple ports, use "memcpy_toio()"
 80 * and friends.
 81 */
 82extern void ioread8_rep(const void __iomem *port, void *buf, unsigned long count);
 83extern void ioread16_rep(const void __iomem *port, void *buf, unsigned long count);
 84extern void ioread32_rep(const void __iomem *port, void *buf, unsigned long count);
 85
 86extern void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count);
 87extern void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count);
 88extern void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count);
 89
 90#ifdef CONFIG_HAS_IOPORT_MAP
 91/* Create a virtual mapping cookie for an IO port range */
 92extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
 93extern void ioport_unmap(void __iomem *);
 94#endif
 95
 96#ifndef ARCH_HAS_IOREMAP_WC
 97#define ioremap_wc ioremap
 98#endif
 99
100#ifndef ARCH_HAS_IOREMAP_WT
101#define ioremap_wt ioremap
102#endif
103
104#ifdef CONFIG_PCI
105/* Destroy a virtual mapping cookie for a PCI BAR (memory or IO) */
106struct pci_dev;
 
107extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
108#elif defined(CONFIG_GENERIC_IOMAP)
109struct pci_dev;
 
 
 
 
110static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
111{ }
112#endif
113
114#include <asm-generic/pci_iomap.h>
115
116#endif